Andrey Korolyov wrote:
tap 0.5mm pitched packages - how it could be done
Buy another chip, make a breakout board, remove onboard chip, connect probes to breakout board, connect breakout board to mainboard.
i945, so initial porting has been done with very small effort, but
..
raminit run after first poweron fails (device turns off within a half of second):
PM1_CNT: 00001c00 SMBus controller enabled. Setting up RAM controller. This mainboard supports Dual Channel Operation. DDR II Channel 0 Socket 0: x8DS DDR II Channel 0 Socket 1: N/A DDR II Channel 1 Socket 0: x8DS DDR II Channel 1 Socket 1: N/A SLP S4# Assertion Width Violation. Reset required.
when second power-on goes just well
This is documented behavior of the chipset.
"SLP S4# Assertion Width Violation" is the hardware telling the firmware (you) that the hardware has not been in S4# long enough, and simply isn't ready just yet.
Chipset docs specify how long firmware should wait, before it can try to power the platform up again.
coreboot on the X60 (also i945) does this on cold boot, leading to a second or so delay after power button until coreboot fully starts.
You could also delay much shorter, effectively busy-waiting on the bit, but with full power cycles.
//Peter