Hi,
probably several people in the list met the same struggle to tap 0.5mm pitched packages (almost all SIOs and at least all H8/300 chips) - how it could be done without using micromanipulator or sticking flat cable with an equal pitch size on side of a chip? While it is possible to solder a single wire with regular equipment on a leg, doing the same for neighboring legs is virtually impossible, so the only somewhat reliable alternative is to use small LVDS cable.
As an example, I may consider Getac/Mitac A790 [0] - it is based on i945, so initial porting has been done with very small effort, but after fixing ACPI tables and polishing a rest of the port I`ve stuck with EC-related issue where raminit run after first poweron fails (device turns off within a half of second):
PM1_CNT: 00001c00 SMBus controller enabled. Setting up RAM controller. This mainboard supports Dual Channel Operation. DDR II Channel 0 Socket 0: x8DS DDR II Channel 0 Socket 1: N/A DDR II Channel 1 Socket 0: x8DS DDR II Channel 1 Socket 1: N/A SLP S4# Assertion Width Violation. Reset required.
when second power-on goes just well (e.g. every second power-on succeeds). I have made a dump of entire interaction between the EEPROM and south bridge, but it seems that this idea was bad because it is based on an assumption that the EEPROM accesses would not be shadowed after first read. At this moment I am absolutely sure that this weird behavior is caused by EC, but laptop`s construction does not allow any kind of access to LPC pins with a regular soldering or top-hat socket (which is unavailable anyway).
Any suggestions on how tapping of a TFP-100 and simular packages should be done are greatly welcomed.
[0]. The device itself is pretty interesting, it does contain *three* SIO chips, W83628F/W83629D and SIO10N268 and detachable PCI bridge in the extension dock.
Thanks!