Uwe Hermann wrote:
We should add a MEM_TRAIN_SEQ comment or help text, it's unclear to me what it is supposed to do. Is it a per-chipset, per-cpu, or per-board option? What do the values of the variable mean?
Regardless of that, it seems like it should be a user-visible option in menuconfig
Shouldn't we clarify what it does _before_ deciding it should be user visible? ;-)
Just an idea....
Going through the AMD ram init code it loops like the code is used to trigger certain code paths during ram init.
It does look somewhat random to me, but I guess it's due to board requirements to choose one or the other option. In which case adding it as a user visible option just creates another way to produce a non-booting image without any real gain..
The Tyan s2912 uses 1, the s2912_fam10 uses 2.
Maybe we can even drop the option completely?
Going through more code I see a lot of this:
#if CONFIG_MEM_TRAIN_SEQ == 0 #define DQS_DELAY_COPY NODE_NUMS #else // #define DQS_DELAY_COPY 1 #define DQS_DELAY_COPY NODE_NUMS #endif
which is about as good as
#define DQS_DELAY_COPY NODE_NUMS
Anyone knows more details what the option is good for?
Stefan