What is INTEL IOTG support?
Never mind, I wanted to say that INTEL will not support Penryn, either Merom, or Nehalem (over 9 years in production).
No idea, but I can certainly try it.
Yes, you can. Ether using source code, but other that that (if you have some sort of problems), you just need to find it in Coreboot .rom file the proper place (WBINVD is 0F 09 opcode, while INVD is just 0F 08)! ;-)
What I don't understand is that this is just southbridge code which is used by other boards too and that this instruction causes no issues to those other boards in the coreboot tree (like thinkpad x60).
As you have said/wrote, higher FREQ could be the showstopper. Above written (with INVD) is also good enough as canary test. :-)
Having read all the i945 raminit code (this is not MRC but native coreboot code AFAIK) it does seem to be written with 667MHz fsb (945gm laptops like thinkpad x60)and 533MHz fsb (945gc inteld945gclf) in mind.
Ahhhhh... I missed this part over the years!?!? So, there is Open Source initram code, but for very old CORE families (0 - pre CORE, 1 and some 2s). Thank you for enlightening me.
So I will soon try to confirm this theory with 533MHz fsb cpu.
I look forward/am interested to hearing from you (if you also do extras for 667MHz with INVD, Full House)! :thumb up:
Thank you, Zoran
On Mon, Oct 10, 2016 at 9:25 AM, Arthur Heymans arthur@aheymans.xyz wrote:
Zoran Stojsavljevic zoran.stojsavljevic@gmail.com writes:
Hello Arthur,
CPUID 1067x? Penryn? https://en.wikipedia.org/wiki/Penryn_(microprocessor) ?!
This is indeed the cpu which I used to run tests with. This board should also work with older LGA775 cpu I think. (even though coreboot has problems with CAR on this P4 HT 630 I also tried)
It is long time off any radar screen for INTEL IOTG support, I can tell
to you this... Started production in 2007! :-(( WTH you need Coreboot on this one? What is INTEL IOTG support?
"The WBINVD instruction is a privileged instruction. When the processor
is running in protected mode, the CPL of a program or procedure must be 0 to
execute this instruction. This instruction is also a serializing
instruction (see "Serializing Instructions" in Chapter 8 of the IA-32 Intel Architecture Software
Developer's Manual, Volume 3)."
Question to you: do you execute this instruction (WBINVD) in Ring 0
(kernel) mode? If you do, and it still hangs, I have for you a good suggestion: try to replace
WBINVD with INVD and see if you'll hang (simple logic stands behind what I read there: http://x86.renejeschke.de/html/file_module_x86_id_325.html).
No idea, but I can certainly try it.
If you hang: your problem is for sure/100% NOT raminit (in other words
MRC);
If you do NOT hang, and continue: raminit (MRC) might be (but not certainly???) your problem. If you hang later (while accessing DDRAM), then it is obvious! ;-)
What I don't understand is that this is just southbridge code which is used by other boards too and that this instruction causes no issues to those other boards in the coreboot tree (like thinkpad x60).
Having read all the i945 raminit code (this is not MRC but native coreboot code AFAIK) it does seem to be written with 667MHz fsb (945gm laptops like thinkpad x60)and 533MHz fsb (945gc inteld945gclf) in mind. So I will soon try to confirm this theory with 533MHz fsb cpu.
Good luck with this one, Zoran
Kind regards
Arthur Heymans