Wolfgang Kamp (wmkamp@datakamp.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2626
-gerrit
commit 70ec76c9f9d7d323cb12ed47726548a240bd9dab Author: Wolfgang Kamp wmkamp@datakamp.de Date: Mon Mar 11 16:35:42 2013 +0100
Super i/o W83627DHG UARTB could not function properly.
Pins 78-85 are set to GPIO after power on or reset. Pins must be redirected to UARTB if enabled.
Change-Id: I12b094a60d9c5cb2447a553be4679a4605e19845 Signed-off-by: Wolfgang Kamp wmkamp@datakamp.de --- src/superio/winbond/w83627dhg/superio.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/src/superio/winbond/w83627dhg/superio.c b/src/superio/winbond/w83627dhg/superio.c index 26f2921..04e9e18 100644 --- a/src/superio/winbond/w83627dhg/superio.c +++ b/src/superio/winbond/w83627dhg/superio.c @@ -14,7 +14,7 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
#include <arch/io.h> @@ -37,6 +37,16 @@ void pnp_exit_ext_func_mode(device_t dev) outb(0xaa, dev->path.pnp.port); }
+ static void w83627dhg_enable_UR2(device_t dev) { + u8 reg8; + + pnp_enter_ext_func_mode(dev); + reg8 = pnp_read_config(dev, 0x2c); + reg8 |= (0x3); + pnp_write_config(dev, 0x2c, reg8); // Set pins 78-85-> UART B + pnp_exit_ext_func_mode(dev); +} + static void w83627dhg_init(device_t dev) { struct superio_winbond_w83627dhg_config *conf = dev->chip_info; @@ -45,6 +55,9 @@ static void w83627dhg_init(device_t dev) return;
switch(dev->path.pnp.device) { + case W83627DHG_SP2: + w83627dhg_enable_UR2(dev); + break; case W83627DHG_KBC: pc_keyboard_init(&conf->keyboard); break;