Re: [coreboot] Fix M57SLI interrupts, again

[Ward Vandewege]

Hi Torsten,

On Sun, May 25, 2008 at 11:42:09PM +0200, Torsten Duwe wrote:
> Please test, especially on v2.x
>
> With current code, the primary PCIe slot is no longer bus#6, but 7.

I'm not sure I follow. On a v1 board:

coreboot v3360: primary PCIe slot:

0000:07:00.0 VGA compatible controller: nVidia Corporation: Unknown device
0392 (rev a1)

coreboot v3360: secondary PCIe slot:

0000:02:00.0 VGA compatible controller: nVidia Corporation: Unknown device
0392 (rev a1)

proprietary bios (F5): primary PCIe slot:

0000:02:00.0 VGA compatible controller: nVidia Corporation: Unknown device
0392 (rev a1)

proprietary bios (F5): secondary PCIe slot:

0000:02:00.0 VGA compatible controller: nVidia Corporation: Unknown device
0392 (rev a1)

That's right, the same bus id. In fact, the only difference in lcpsi when
switching the vga card to the other PCIe slot under the proprietary bios is:

-0000:00:0f.0 PCI bridge: nVidia Corporation: Unknown device 0377 (rev a2)
  +0000:00:0a.0 PCI bridge: nVidia Corporation: Unknown device 0376 (rev a2)
> This patch makes the graphics card,

Do you mean it fixes the proprietary Nvidia driver's IRQ problem? With the
free nvida driver both PCIe slots work for me. I have not tested the
proprietary driver.
> as well as both PCI slots' INT A,
> work again, at least on my V1.0 board.

That's the other thing I'm not entirely sure of; both PCI slots seem to work
for me with stock 3306. I've plugged network cards in both and they seem to
be happy.

Can you elaborate a bit more on the problems you are seeing?

Thanks,
Ward.
> Signed-off-by: Torsten Duwe
>
> --- CVS/coreboot-v2/src/mainboard/gigabyte/m57sli/mptable.c	2008-01-27 23:45:00.000000000 +0100
> +++ tmp/coreboot-v2/src/mainboard/gigabyte/m57sli/mptable.c	2008-05-19 10:49:05.000000000 +0200
> @@ -3,6 +3,7 @@
> Copyright (C) 2007 AMD
> Written by Yinghai Lu  for AMD.
> Copyright (C) 2007,2008 Torsten Duwe
> This program is free software; you can redistribute it and/or modify
> it under the terms of the GNU General Public License as published by
>
> @@ -140,7 +141,7 @@
>    for(j=7; j>=2; j--) {
>    	if(!bus_mcp55[j]) continue;
>            for(i=0;i<4;i++) { /* map all functions */
>    	        PCI_INT(j,0,i, 16+(1+j+i)%4);
>    	        PCI_INT(j,0,i, 16+(j+i)%4);
>    	}
> }
> !DSPAM:4839dd4526894879134247!