Carl-Daniel Hailfinger wrote:
On 28.06.2008 19:37, Stefan Reinauer wrote:
I was having a cleanup of the whole SPI/LPC bus handling in mind:
we have _1_ global variable (per instance of "flashes"?) instead of one per supported chipset.
This variable is an ENUM
enum flash_bus { FLASH_BUS_LPC, FLASH_BUS_ICH7_SPI, FLASH_BUS_ICH9_SPI, FLASH_BUS_VIA_SPI, FLASH_BUS_IT87_SPI }
Looks nice. Can we add a bus for those old (29*) parallel flash chips? I assume differentiating between LPC and FWH will be difficult because FWH is just a LPC variant and some chipsets do not allow us to detect FWH/LPC
I don't think it makes much sense to differentiate between 29* types, lpc and fwh: The physical bus looks exactly the same from a software perspective; until after you scanned the bus and know which category the chip you found belongs to. And then the data is not exactly interesting anymore.
I think this matches the physical actualities much better than the design-less hack that is used at the moment. Also the code could be much nicer in many places, as we could use case statements instead of endless if () else if () else if() statements
What happens if there is more than one flash bus? Do we call the probe functions compatible with the bus once per bus? If we do that, we can stop after the first detected chip.
Not necessarily. You can have multiple chips on the same FWH "bus", so stopping after you find the first chip is not an option.
But, I suggest we consider multiple flash busses once we see that happen in the real world. At least the ICH is always strapped to either FWH _or_ SPI.
Stefan