[coreboot] [patch][v2] Fam10 GART table walk

-- Marc Jones Senior Firmware Engineer (970) 226-9684 Office mailto:Marc.Jones@amd.com http://www.amd.com/embeddedprocessors Enables MCA reportingof GART cache table walks which encounter a GART PTE entry which is invalid. Useful for GART debugging and profiling. Make AMD BTS register checking tool happy. Signed-off-by: Marc Jones marc.jones@amd.com Index: coreboot-v2/src/cpu/amd/model_10xxx/defaults.h =================================================================== --- coreboot-v2.orig/src/cpu/amd/model_10xxx/defaults.h 2008-04-23 17:08:42.000000000 -0600 +++ coreboot-v2/src/cpu/amd/model_10xxx/defaults.h 2008-04-23 17:10:19.000000000 -0600 @@ -46,6 +46,10 @@ 0xF << 19, 0x00000000, 0xF << 19, 0x00000000 }, /* [RtryHt[0..3]]=1 */ + { MC4_CTL_MASK, AMD_DR_ALL, AMD_PTYPE_ALL, + 0x1 << 10, 0x00000000, + 0x1 << 10, 0x00000000 }, /* [GartTblWkEn]=1 */ + { DC_CFG, AMD_DR_ALL, AMD_PTYPE_SVR, 0x00000000, 0x00000004, 0x00000000, 0x0000000C }, /* [REQ_CTR] = 1 for Server */