coreboot

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New Defects reported by Coverity Scan for coreboot
by scan-admin＠coverity.com 28 Jun '22

28 Jun '22

Hi, Please find the latest report on new defect(s) introduced to coreboot found with Coverity Scan. 2 new defect(s) introduced to coreboot found with Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 2 of 2 defect(s) ** CID 1490278: Integer handling issues (OVERFLOW_BEFORE_WIDEN) /src/soc/rockchip/rk3288/soc.c: 16 in soc_init() ________________________________________________________________________________________________________ *** CID 1490278: Integer handling issues (OVERFLOW_BEFORE_WIDEN) /src/soc/rockchip/rk3288/soc.c: 16 in soc_init() 10 #include <symbols.h> 11 12 #include "chip.h" 13 14 static void soc_init(struct device *dev) 15 { >>> CID 1490278: Integer handling issues (OVERFLOW_BEFORE_WIDEN) >>> Potentially overflowing expression "sdram_size_mb() * 1048576U" with type "unsigned int" (32 bits, unsigned) is evaluated using 32-bit arithmetic, and then used in a context that expects an expression of type "uint64_t" (64 bits, unsigned). 16 ram_range(dev, 0, (uintptr_t)_dram, sdram_size_mb() * MiB); 17 if (display_init_required()) 18 rk_display_init(dev, (uintptr_t)_framebuffer, 19 REGION_SIZE(framebuffer)); 20 else 21 printk(BIOS_INFO, "Skipping display init.\n"); ** CID 1490277: Integer handling issues (OVERFLOW_BEFORE_WIDEN) /src/mainboard/emulation/qemu-armv7/mainboard.c: 42 in mainboard_enable() ________________________________________________________________________________________________________ *** CID 1490277: Integer handling issues (OVERFLOW_BEFORE_WIDEN) /src/mainboard/emulation/qemu-armv7/mainboard.c: 42 in mainboard_enable() 36 printk(BIOS_EMERG, "No dev0; die\n"); 37 halt(); 38 } 39 40 discovered = probe_ramsize((uintptr_t)_dram, CONFIG_DRAM_SIZE_MB); 41 printk(BIOS_DEBUG, "%d MiB of RAM discovered\n", discovered); >>> CID 1490277: Integer handling issues (OVERFLOW_BEFORE_WIDEN) >>> Potentially overflowing expression "discovered * 1048576" with type "int" (32 bits, signed) is evaluated using 32-bit arithmetic, and then used in a context that expects an expression of type "uint64_t" (64 bits, unsigned). 42 ram_range(dev, 0, 0x60000000, discovered * MiB); 43 init_gfx(); 44 } 45 46 struct chip_operations mainboard_ops = { 47 .enable_dev = mainboard_enable, ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://u15810271.ct.sendgrid.net/ls/click?upn=HRESupC-2F2Czv4BOaCWWCy7my0P…

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[coreboot - Bug #393] (New) T500 restarts rather than waking up from suspend
by Robert Gruber 28 Jun '22

28 Jun '22

Issue #393 has been reported by Robert Gruber. ---------------------------------------- Bug #393: T500 restarts rather than waking up from suspend https://ticket.coreboot.org/issues/393 * Author: Robert Gruber * Status: New * Priority: Normal * Target version: master * Start date: 2022-06-28 * Affected versions: master * Related links: https://ticket.coreboot.org/issues/167 * Affected hardware: Lenovo Thinkpad T500 * Affected OS: xubuntu 22.04 LTS ---------------------------------------- I have a similar issue like Bug #167 on an T500 with coreboot master (c2b4f44100e3f4ee84ba40cf96305eb32a0def76). System is working fine except this issue. When I go to suspend the moon LED is shining but when I power on again the system reboots from scratch (but not always). I tried CONFIG_CONSOLE_SERIAL=n but this does not solve this issue. I did not have any moon LED blinking. Instead sometimes the moon LED is shining persistent after reboot. Does anybody have an idea why the system sometimes reboots after suspend to ram and sometimes the suspend to ram works just as it should ? -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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Is coreboot participating in 2023 Google Summer of Code?
by tunabomber 25 Jun '22

25 Jun '22

If yes, what sort of projects would be up? I am considering buying a micro-controller to start tinkering around with embedded systems and firmware programming. Is there any specific hardware (affordable by student standards) I could buy and work with that would be beneficial for the project? Furthermore, Is there any thing I could work on to get started and familiarize myself with the coreboot ecosystem? (I am comfortable with the C language, linux and coreutils and will be working on a hobby-proof-of-concept-psuedo-device driver for the linux kernel once exams are concluded) Also, how relevant are 2022 projects now? Thank You

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[RFH] Test Lenovo X230 with master?
by Paul Menzel 24 Jun '22

24 Jun '22

Dear coreboot folks, In #coreboot(a)irc.libera.chat a user reported, that flashing coreboot built from master (commit aa8b1f8b38 (mb/system76: Configure I2C HID IRQs as level triggered)) to SPI2 does not boot. > Display black but lit, no display output. I don't have coreboot logs. > Blinking power button + micmute button. Unfortunately, the user does not have any equipment to get any logs, and SPI flash console is not supported. Could somebody with such equipment please verify, and provide the logs? Kind regards, Paul PS: `defconfig`: ``` CONFIG_VENDOR_LENOVO=y CONFIG_CBFS_SIZE=0x400000 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_BOARD_LENOVO_X230=y CONFIG_UART_PCI_ADDR=0x0 CONFIG_VALIDATE_INTEL_DESCRIPTOR=y CONFIG_H8_SUPPORT_BT_ON_WIFI=y CONFIG_HAVE_ME_BIN=y CONFIG_CHECK_ME=y CONFIG_USE_ME_CLEANER=y CONFIG_HAVE_GBE_BIN=y CONFIG_LOCK_MANAGEMENT_ENGINE=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_PCIEXP_HOTPLUG_IO=0x2000 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 CONFIG_POST_IO_PORT=0x80 CONFIG_PAYLOAD_GRUB2=y CONFIG_GRUB2_REVISION=y CONFIG_GRUB2_REVISION_ID="grub-2.06" CONFIG_GRUB2_EXTRA_MODULES="nativedisk crypto cryptodisk luks luks2 gcry_serpent gcry_twofish gcry_rijndael gcry_sha1 gcry_sha256 gcry_sha512 gcry_crc password_pbkdf2 part_gpt btrfs cat bsd png gfxterm_background all_video usbserial_ftdi usbserial_pl2303" CONFIG_COREINFO_SECONDARY_PAYLOAD=y CONFIG_MEMTEST_SECONDARY_PAYLOAD=y CONFIG_NVRAMCUI_SECONDARY_PAYLOAD=y ```

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Removing Absolute BIOS (a commercial backdoor) from a Home Computer
by keith.krohn＠use.startmail.com 24 Jun '22

24 Jun '22

Hello, I would like to run coreboot on my home computer to disable Absolute BIOS. I didn't want it but had little choice when I got my new Lenovo PC. I see the download page on your site, but I am not really sure how to make coreboot work on my computer as the download doesn't appear to have an executable, but various components that are implemented according to specific steps which I don't want to screw up and brick my new computer. XD Please advise and thank you in advance! Best, Keith Krohn

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Support for new serial console boards
by ratatouille gamer 22 Jun '22

22 Jun '22

Coreboot have just a support for PCIe OXPCIe952 card and it's complete deprecated and old board. the price of uart boards compatible with coreboot, have a complete expensive price and all is used. All these problems, that makes hard to use coreboot with Serial console. Serial console use can help computer without compatibility of USB EMbedded Controller Console. Serial console is complete important for both old and new boards ports and fixes. Please if coreboot can support new cheap common serial console PCIe boards in future, it's can be great for future ports and fixes in olders boards include in the use for best 64BIT coreboot table support in the most boards.

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I think I misconfigured my Coreboot ROM, what did I do wrong?
by Tristan Young 20 Jun '22

20 Jun '22

Today, I internally flashed a Coreboot ROM that I partially built myself to the motherboard of my ThinkPad T440p. But when I restarted my computer, it started constantly beeping, and turning it off and on didn't change that result. Luckily, I fixed it by flashing my previous Coreboot BIOS (SeaBIOS) to the top 4 MiB chip externally using my Raspberry Pi. But there are some things that were different in the build configuration for the newer BIOS, such as trying to use a bootorder file to make SeaBIOS try to boot from my HDD first instead of my CD/DVD drive, as well as setting the options to clear the DRAM on each boot. I also didn't use the cleanbuild option after different build attempts for the newer BIOS. Should I send my .config file so that you can tell if any of the config settings or combinations of them that I chose wouldn't work on my specific model of ThinkPad? And should I also send over an actual 4MiB binary of the BIOS I flashed that didn't work?

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[coreboot - Bug #327] MBOX3, OperationRegion (OPRG, SystemMemory, ASLS, 0x2000) causes windows uefi tianocore BSOD ACPI_BIOS_ERROR
by Mat Phillips 20 Jun '22

20 Jun '22

Issue #327 has been updated by Mat Phillips. Paul Menzel wrote in #note-9: > @Mat, on what board did you test? > Thinkpad x230. I7 CPU (doubt that's relevant though) The dmesg file attached to this ticket is from that laptop. ---------------------------------------- Bug #327: MBOX3, OperationRegion (OPRG, SystemMemory, ASLS, 0x2000) causes windows uefi tianocore BSOD ACPI_BIOS_ERROR https://ticket.coreboot.org/issues/327#change-980 * Author: xinhua wang * Status: New * Priority: Normal * Start date: 2021-12-30 ---------------------------------------- https://review.coreboot.org/c/coreboot/+/27711/7/src/drivers/intel/gma/acpi… this line .. OperationRegion (OPRG, SystemMemory, ASLS, 0x2000) the 0x2000 will cause BSOD ACPI_BIOS_ERROR when booting installer, os, etc When set to 0x1000 windows UEFI tianocore mode boots fine ---Files-------------------------------- dmesg.txt (76.9 KB) results.log (204 KB) -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #327] MBOX3, OperationRegion (OPRG, SystemMemory, ASLS, 0x2000) causes windows uefi tianocore BSOD ACPI_BIOS_ERROR
by Paul Menzel 20 Jun '22

20 Jun '22

Issue #327 has been updated by Paul Menzel. @Mat, on what board did you test? @Pawel, please do not post unrelated questions to this issue here. This issue (#327) is not about a regression as far as I know. ---------------------------------------- Bug #327: MBOX3, OperationRegion (OPRG, SystemMemory, ASLS, 0x2000) causes windows uefi tianocore BSOD ACPI_BIOS_ERROR https://ticket.coreboot.org/issues/327#change-977 * Author: xinhua wang * Status: New * Priority: Normal * Start date: 2021-12-30 ---------------------------------------- https://review.coreboot.org/c/coreboot/+/27711/7/src/drivers/intel/gma/acpi… this line .. OperationRegion (OPRG, SystemMemory, ASLS, 0x2000) the 0x2000 will cause BSOD ACPI_BIOS_ERROR when booting installer, os, etc When set to 0x1000 windows UEFI tianocore mode boots fine ---Files-------------------------------- dmesg.txt (76.9 KB) results.log (204 KB) -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #327] MBOX3, OperationRegion (OPRG, SystemMemory, ASLS, 0x2000) causes windows uefi tianocore BSOD ACPI_BIOS_ERROR
by Pawel Radomychelski 20 Jun '22

20 Jun '22

Issue #327 has been updated by Pawel Radomychelski. Matt DeVillier wrote in #note-6: > > When set to 0x1000 windows UEFI tianocore mode boots fine > > This seems to be a board-specific issue rather than platform or tree-wide issue. The IGD OpRegion spec published by Intel themselves specifies that the reserved region starting at ASLS is 0x2000 in size - see: https://01.org/sites/default/files/documentation/acpi_igd_opregion_spec_0.p… p16. > > Additionally, other SNB/IVB boards (such as google/link and samsung/stumpy) have no issues booting Windows via Tianocore with the correct OpRegion size set. > > So, I suspect something else in the x230 ACPI code is overlapping with the IGD OpRegion and causing the BSOD Thanks for the info and clarification. Is it possible to find out what changed between Coreboot 4.15 and 4.16 and replace the changed files with the ones from 4.15 Branch? Otherwise i am forced still to use CoreBoot 4.15 until the bug is solved.... ---------------------------------------- Bug #327: MBOX3, OperationRegion (OPRG, SystemMemory, ASLS, 0x2000) causes windows uefi tianocore BSOD ACPI_BIOS_ERROR https://ticket.coreboot.org/issues/327#change-974 * Author: xinhua wang * Status: New * Priority: Normal * Start date: 2021-12-30 ---------------------------------------- https://review.coreboot.org/c/coreboot/+/27711/7/src/drivers/intel/gma/acpi… this line .. OperationRegion (OPRG, SystemMemory, ASLS, 0x2000) the 0x2000 will cause BSOD ACPI_BIOS_ERROR when booting installer, os, etc When set to 0x1000 windows UEFI tianocore mode boots fine ---Files-------------------------------- dmesg.txt (76.9 KB) results.log (204 KB) -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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