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39699 discussions

Shadow ROM memory PROBLEM
by Adam Agnew 30 Oct '02

30 Oct '02

Hello. In our PCBIOS efforts, we're running into a snag. We're experience corruption of our shadow memory region, even after we've set it to read only (using the sis630). mov eax, #0x80000070 mov dx, #0x0cf8 out dx, eax mov eax, #0x0000FFFF mov dx, #0x0cfc out dx, eax we're not doing any pci writes at this point (once we've set it to read only), so does anyone else have any theories on what could cause this? Here's an example of the insanity going on: Here, the bios has finished and we're ready to run lilo. The shadow memory is correct: 000F3189L 260F015408 LGDT fword ptr ES:[SI]+08 000F318EL 2E0F011E69F8 LIDT fword ptr CS:[f869] 000F3194L B002 MOV AL,02 000F3196L E680 OUT 80,AL Then, we run lilo and we load an unmodified linux kernel. After a random amount of calls to int13 and int15 to copy the kernel into memory (sometimes it just takes 20 or so, sometimes 58, and sometimes it doesn't happen at all) the shadow memory gets corrupted. and we get stuff like this: 000F3199L 260F01B002E6 LMSW word ptr ES:[BX+SI]+e602 000F319FL 80011E ADD byte ptr [BX+DI],1e 000F31A2L 69F883C8 IMUL DI,AX,c883 As you see, its all scrambled. The op codes get into a weird order. I'll try to illustrate with this mapping.. 260F015408 2E0F011E69F8 B002 E680 1111111111 222222222222 3333 4444 260F01B002E6 80011E 69F883C8 111111333344 442222 2222 and the addresses in general are all shifted down. Any ideas, suggestions, insights? - Adam Agnew

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Flashing the Tyan S2642?
by Bill Rugolsky Jr. 30 Oct '02

30 Oct '02

[ This is a resend; I inadvertently posted it the first time from a defunct e-mail acct. ] Last weekend I was looking at installing LinuxBIOS on my Tyan S2462, and got to the point of building the romimage, but couldn't figure out how to flash it. devbios (from CVS) reported (in /proc/bios) that it was an unsupported Macronix part, and flash_rom (from linuxbios CVS) didn't appear to recognize it either. Am I doing something really stupid or simply looking in the wrong place? Thanks, Bill Rugolsky

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Re: [Etherboot-developers] RE: Bug in etherboot 5.1.2rc7
by ebiederman＠lnxi.com 30 Oct '02

30 Oct '02

hcyun(a)etri.re.kr writes: > Strange.. > > I tried to put kernel.elf on the first partition but it failed. > I organized my 1G hdd as follows. > > Disk /dev/hda: 16 heads, 63 sectors, 2100 cylinders > Units = cylinders of 1008 * 512 bytes > > Device Boot Start End Blocks Id System > /dev/hda1 1 3 1480+ 83 Linux > /dev/hda2 4 2100 1056888 83 Linux > > In the hda1 I placed kernel.elf with dd if=kernel.elf of=/dev/hda1 and > placed rootfs on hda2 > But It fails to find elf image. > What did I wrong? > I make kernel.elf with mkelfImage version 1.16. Try that in units of sectors. If you are not careful some versions of fdisk will cylinder align your partitions, and will start your first partition at 63 sectors. Which is a little to far on the disk. You should be able to force it though using units of sectors. Eric

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Bug in etherboot 5.1.2rc7
by hcyun＠etri.re.kr 30 Oct '02

30 Oct '02

I recently check out etherboot from the cvs to do boot from ide. At the first try, It could't found ide controller with saying "No adaptor found" After tracking down the codes I found the reason in scan_bus() function in pci.c The problem was that it skips to probe my ide controller. My board is organized as follows. 00:02.3 <-- UBS controller 00:02.4 <-- empty 00:02.5 <-- IDE controller When scan_bus probes all devfn, after reading PCI_VENDOR_ID from empty 00:02.4 it set hdr_type=0. therefore it skip to probe rest of functions including 00:02.5. To avoid this situation I modified the code as follows to prevent to set hdr_type = 0. I'm not sure why original code set hdr_type = 0 when the slot return null vendor_id. But anyway I can boot from the disk by just removing this line. static void scan_bus(int type, struct pci_device *dev) { . . buses=256; for (bus = first_bus; bus < buses; ++bus) { for (devfn = first_devfn; devfn < 0xff; ++devfn) { if (PCI_FUNC (devfn) == 0) pcibios_read_config_byte(bus, devfn, PCI_HEADER_TYPE, &hdr_type); else if (!(hdr_type & 0x80)) /* not a multi- function device */ continue; pcibios_read_config_dword(bus, devfn, PCI_VENDOR_ID, &l); /* some broken boards return 0 if a slot is empty: */ if (l == 0xffffffff || l == 0x00000000) { // hdr_type = 0; // <- I removed this line. hcyun. continue; } . . Now I can boot from IDE. but I have a question. It seems that current etherboot ide support doesn't support partition or filesystem. So now I just installed kernel image without creating any partition (dd kernel.elf of=/dev/hda), but it is too wasteful. Is there any way to place both kernel and root filesystem on the same ide disk? - HeeChul Yun, Embedded S/W Team at ETRI e-mail: hcyun(a)etri.re.kr phone: +82-42-860-1673

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Re: Re: bios savior for via eden
by Ronald G Minnich 29 Oct '02

29 Oct '02

On Wed, 30 Oct 2002, belkajm wrote: > Thanks. This is all completely new to me, as i haven't messed about > with bios's before at all. I have a via epia system being used as an > adsl router, and when i get the time, will be creating my own linux > system to run it (atm it's running on nt4 :( ), with a CF card being > used as the hd. After coming across the linuxbios site, i thought it > would be quite nice to use that as well, reducing boot time to an > absolute minimum. and if you send me pictures and text and such I will gladly give you major real estate on the linuxbios page. This offer is open to all of you good hackers out there! ron

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Re: bios size
by Andrew Ip 29 Oct '02

29 Oct '02

Jody, > How big is the linuxbios? and how much space is available on the epia > boards? if it's not enough, what is the cheapest chip that can be used? 2Mb is fine. -Andrew -- Andrew Ip Email: aip(a)cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en.

2 1

LTSP + LinuxBios
by Ricardo Strauch 29 Oct '02

29 Oct '02

Hi: Someone has experience working with LTSP and Linuxbios? Ltsp (www.ltsp.org) is a powerfull Thin Client solution, were the server makes the hard work. LinuxBios looks like the perfetc tool to buil expensive cluster servers for LTSP solutions. Regards Ricardo Strauch --------------------------------- Do You Yahoo!? Todo lo que quieres saber de Estados Unidos, América Latina y el resto del Mundo. Visíta Yahoo! Noticias.

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Re: [Etherboot-developers] LinuxWorld NY 2003
by Gregg C Levine 29 Oct '02

29 Oct '02

Hello again from Gregg C Levine Any that works will be good. I am rather board agnostic at this point, so all is necessary, as that it works, with out a complaint from itself, rather then the actual vendor. Gregg C Levine drwho8(a)worldnet.att.net "Oh my!" The Second Doctor's nearly favorite phrase. ----- Original Message ----- From: "Ronald G Minnich" <rminnich(a)lanl.gov> To: <jam(a)McQuil.com> Cc: "Gregg C Levine" <drwho8(a)worldnet.att.net>; "Marty Connor" <marty(a)etherboot.org>; "Etherboot Users" <etherboot-users(a)lists.sourceforge.net>; "Etherboot Developers" <etherboot-developers(a)lists.sourceforge.net> Sent: Tuesday, October 29, 2002 6:48 PM Subject: Re: [Etherboot-developers] LinuxWorld NY 2003 > On Tue, 29 Oct 2002 jam(a)McQuil.com wrote: > > > How about an EPIA running linuxbios, etherboot and booting up LTSP ? > > That would be *really* fine, but what about graphics? Do graphics work > easily on that board? > > I could try to set that up on an M810LMR I have here? > > ron > >

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[COMMIT] upx E7500 etc
by ebiederman＠lnxi.com 29 Oct '02

29 Oct '02

I have committed so many files today I can barely track what I am doing. The result is that all of my oustanding code has now been pushed to the LinuxBIOS tree. So the supermicro/p4dpr and supermicro/p4dpe should now be stable ports of linuxBIOS. I would say so in the status file, but there isn't a single one in the whole tree. Things other people will notice. The upx compressor code was integrated and is on by default. So you will get smaller linuxbios rom images. I accomplished this by explicitly factoring linuxbios into a C part that runs in ram and an assembly part that runs directly out of flash. The seperation was there before but now it is explicit. This greatly simplifies the linker scripts, so we are actually less likely to run into LD bugs now than before. The config option is CONFIG_COMPRESS if you want to turn it off. Other things of note. cmos.conf was renamed cmos.layout to reduce confusion. And a new checksum entry was added to the LinuxBIOS table so external programs can find the checksum that protects the LinuxBIOS options. My code has been synced with the changes Steve James made for the Clearwater port. There are microcode updates in the tree, and some other cpu fixups for the pentium 4. Have fun, and hopefully nothing broke except the p4dc6, as they way it utilized the cache as ram trick depended on the muddy watters between code that ran in rom and ram. The code is fixable, if I turn off compression. It just requires a little magic to find the cache as ram entry point... Eric

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Re: bios size
by Ronald G Minnich 29 Oct '02

29 Oct '02

On Wed, 30 Oct 2002, belkajm wrote: > How big is the linuxbios? and how much space is available on the epia > boards? if it's not enough, what is the cheapest chip that can be used? linuxbios is something like 32-47K, depending on options. The part on the epia is quite large enough. ron

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