coreboot November 2011

coreboot@coreboot.org

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432 discussions

Re: [coreboot] I DID IT!!!
by Saku Sammakko 28 Nov '11

28 Nov '11

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Patch set updated for coreboot: e50d8e9 Use MMCONF for all AMD family 10 CPUs.
by Marc Jones 28 Nov '11

28 Nov '11

Marc Jones (marcj303(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/455 -gerrit commit e50d8e9242f0eadfe24d6a5f1f3fe8247c8f3afa Author: Marc Jones <marcj303(a)gmail.com> Date: Wed Nov 23 17:49:19 2011 -0700 Use MMCONF for all AMD family 10 CPUs. This fixes problems in AP init when multiple APs are trying to access PCI config space. All Fam10 CPUs setup and support MMCONF. Change-Id: I00a25bbf4e4152c89024f14a3c4c1c36b48d0128 Signed-off-by: Marc Jones <marcj303(a)gmail.com> --- src/cpu/amd/model_10xxx/Kconfig | 9 +++++++-- 1 files changed, 7 insertions(+), 2 deletions(-) diff --git a/src/cpu/amd/model_10xxx/Kconfig b/src/cpu/amd/model_10xxx/Kconfig index 6aab30a..6c00243 100644 --- a/src/cpu/amd/model_10xxx/Kconfig +++ b/src/cpu/amd/model_10xxx/Kconfig @@ -48,8 +48,7 @@ config SET_FIDVID_CORE_RANGE int default 0 -endif -endif +endif # SET_FIDVID config UPDATE_CPU_MICROCODE bool @@ -82,3 +81,9 @@ config UPDATE_CPU_MICROCODE Note that some operating system include these same microcode patches, so you may need to also disable microcode updates in your operating system in order for this option to matter. + +config MMCONF_SUPPORT_DEFAULT + bool + default y + +endif # CPU_AMD_MODEL_10XXX

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Re: [coreboot] Contribute: USB debug port info
by Peter Stuge 27 Nov '11

27 Nov '11

Fred . wrote: > $ lspci|grep EHCI|cut -f1 -d' ' > 00:1a.7 > 00:1d.7 > > $ sudo lspci -vs 00:1a.7 > 00:1a.7 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB2 > EHCI Controller #2 (prog-if 20 [EHCI]) > Subsystem: Giga-byte Technology GA-EP45-DS5 Motherboard > Flags: bus master, medium devsel, latency 0, IRQ 18 > Memory at fdfff000 (32-bit, non-prefetchable) [size=1K] > Capabilities: [50] Power Management version 2 > Kernel driver in use: ehci_hcd > > $ sudo lspci -ns 00:1a.7 > 00:1a.7 0c03: 8086:3a3c And what about 1d.7? //Peter

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New patch to review for coreboot: 2687844 M4A785T-M: fix ACPI's P-States Table
by Denis Carikli 27 Nov '11

27 Nov '11

Denis Carikli (GNUtoo(a)no-log.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/458 -gerrit commit 2687844d07b04894bc411d221efd1b98929f4562 Author: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org> Date: Sun Nov 27 22:04:02 2011 +0100 M4A785T-M: fix ACPI's P-States Table Without that fix the linux kernel cannot change the frequency of the CPUs with cpufreq. Change-Id: Ie00e4b11b2561356952d8ae28bd0a00523b6d85f Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org> --- src/mainboard/asus/m4a785t-m/acpi/cpstate.asl | 36 +++++++++++++++++++----- 1 files changed, 28 insertions(+), 8 deletions(-) diff --git a/src/mainboard/asus/m4a785t-m/acpi/cpstate.asl b/src/mainboard/asus/m4a785t-m/acpi/cpstate.asl index 6a1b002..0ee537d 100644 --- a/src/mainboard/asus/m4a785t-m/acpi/cpstate.asl +++ b/src/mainboard/asus/m4a785t-m/acpi/cpstate.asl @@ -46,22 +46,42 @@ DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001) Name(_PSS, Package(){ Package () { - 0x00000AF0, - 0x0000BF81, - 0x00000002, - 0x00000002, + 0x00000BB8, + 0x000078D9, + 0x00000004, + 0x00000004, 0x00000000, 0x00000000 }, Package () { - 0x00000578, - 0x000076F2, - 0x00000002, - 0x00000002, + 0x000008FC, + 0x0000659A, + 0x00000004, + 0x00000004, 0x00000001, 0x00000001 + }, + + Package () + { + 0x00000708, + 0x000056BF, + 0x00000004, + 0x00000004, + 0x00000002, + 0x00000002 + }, + + Package () + { + 0x00000320, + 0x00001FA1, + 0x00000004, + 0x00000004, + 0x00000003, + 0x00000003 } })

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Contribute: USB debug port info
by Fred . 27 Nov '11

27 Nov '11

$ lspci|grep EHCI|cut -f1 -d' ' 00:1a.7 00:1d.7 $ sudo lspci -vs 00:1a.7 00:1a.7 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #2 (prog-if 20 [EHCI]) Subsystem: Giga-byte Technology GA-EP45-DS5 Motherboard Flags: bus master, medium devsel, latency 0, IRQ 18 Memory at fdfff000 (32-bit, non-prefetchable) [size=1K] Capabilities: [50] Power Management version 2 Kernel driver in use: ehci_hcd $ sudo lspci -ns 00:1a.7 00:1a.7 0c03: 8086:3a3c $ sudo ./attachment.sh The following PCI devices support a USB debug port (says lspci): None Possible reasons: lspci not run as root, lspci too old, USB controller does not support a debug device The following PCI devices support a USB debug port (says the kernel): None Possible reasons: dmesg scrolled off, kernel too old, USB controller does not support a debug device No USB controller with debug capability found http://www.coreboot.org/EHCI_Debug_Port

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New patch to review for coreboot: e8d0122 RS780: print the vgainfo
by Denis Carikli 27 Nov '11

27 Nov '11

Denis Carikli (GNUtoo(a)no-log.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/456 -gerrit commit e8d0122db0712a3a188c9ca85e1fb6325f2eb592 Author: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org> Date: Sun Nov 27 13:43:16 2011 +0100 RS780: print the vgainfo Change-Id: I17c2a13ab52a0f78588f812d4f42f45f9a7b7524 Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org> --- src/southbridge/amd/rs780/gfx.c | 80 +++++++++++++++++++++++++++++++++++++++ 1 files changed, 80 insertions(+), 0 deletions(-) diff --git a/src/southbridge/amd/rs780/gfx.c b/src/southbridge/amd/rs780/gfx.c index 65a5e2b..29a6394 100644 --- a/src/southbridge/amd/rs780/gfx.c +++ b/src/southbridge/amd/rs780/gfx.c @@ -575,6 +575,86 @@ static void internal_gfx_pci_dev_init(struct device *dev) /* Poweron DDI Lanes */ poweron_ddi_lanes(nb_dev); + printk(BIOS_DEBUG,"vgainfo:\n" + " ulBootUpEngineClock:%lu \n" + " ulBootUpUMAClock:%lu \n" + " ulBootUpSidePortClock:%lu \n" + " ulMinSidePortClock:%lu \n" + " ulSystemConfig:%lu \n" + " ulBootUpReqDisplayVector:%lu \n" + " ulOtherDisplayMisc:%lu \n" + " ulDDISlot1Config:%lu \n" + " ulDDISlot2Config:%lu \n" + + " ucMemoryType:%u \n" + " ucUMAChannelNumber:%u \n" + " ucDockingPinBit:%u \n" + " ucDockingPinPolarity:%u \n" + + " ulDockingPinCFGInfo:%lu \n" + " ulCPUCapInfo: %lu \n" + + " usNumberOfCyclesInPeriod:%hu \n" + " usMaxNBVoltage:%hu \n" + " usMinNBVoltage:%hu \n" + " usBootUpNBVoltage:%hu \n" + + " ulHTLinkFreq:%lu \n" + + " usMinHTLinkWidth:%hu \n" + " usMaxHTLinkWidth:%hu \n" + " usUMASyncStartDelay:%hu \n" + " usUMADataReturnTime:%hu \n" + " usLinkStatusZeroTime:%hu \n" + + " ulHighVoltageHTLinkFreq:%lu \n" + " ulLowVoltageHTLinkFreq:%lu \n" + + " usMaxUpStreamHTLinkWidth:%hu \n" + " usMaxDownStreamHTLinkWidth:%hu \n" + " usMinUpStreamHTLinkWidth:%hu \n" + " usMinDownStreamHTLinkWidth:%hu \n", + + (unsigned long)vgainfo.ulBootUpEngineClock, + (unsigned long)vgainfo.ulBootUpUMAClock, + (unsigned long)vgainfo.ulBootUpSidePortClock, + (unsigned long)vgainfo.ulMinSidePortClock, + (unsigned long)vgainfo.ulSystemConfig, + (unsigned long)vgainfo.ulBootUpReqDisplayVector, + (unsigned long)vgainfo.ulOtherDisplayMisc, + (unsigned long)vgainfo.ulDDISlot1Config, + (unsigned long)vgainfo.ulDDISlot2Config, + + vgainfo.ucMemoryType, + vgainfo.ucUMAChannelNumber, + vgainfo.ucDockingPinBit, + vgainfo.ucDockingPinPolarity, + + (unsigned long)vgainfo.ulDockingPinCFGInfo, + (unsigned long)vgainfo.ulCPUCapInfo, + + vgainfo.usNumberOfCyclesInPeriod, + vgainfo.usMaxNBVoltage, + vgainfo.usMinNBVoltage, + vgainfo.usBootUpNBVoltage, + + (unsigned long)vgainfo.ulHTLinkFreq, + + vgainfo.usMinHTLinkWidth, + vgainfo.usMaxHTLinkWidth, + vgainfo.usUMASyncStartDelay, + vgainfo.usUMADataReturnTime, + vgainfo.usLinkStatusZeroTime, + + (unsigned long)vgainfo.ulHighVoltageHTLinkFreq, + (unsigned long)vgainfo.ulLowVoltageHTLinkFreq, + + vgainfo.usMaxUpStreamHTLinkWidth, + vgainfo.usMaxDownStreamHTLinkWidth, + vgainfo.usMinUpStreamHTLinkWidth, + vgainfo.usMinDownStreamHTLinkWidth); + + /* Transfer the Table to VBIOS. */ pointer = (u32 *)&vgainfo; for(i=0; i<sizeof(ATOM_INTEGRATED_SYSTEM_INFO_V2); i+=4)

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Re: [coreboot] VGA issues on ASUS M4A785T-M
by Denis 'GNUtoo' Carikli 26 Nov '11

26 Nov '11

>The VGA bios sometimes does not work, and my suggestion is trying to cat >the VGA bios under Linux shell. What do you mean exactly? If you mean running the command advised at the end of www.coreboot.org/VGA_support, I've already done that with the bios shipped with my mainboard and the last version of it. should I look if the images changes (with md5sum) between 2 extractions after reboots ? Denis.

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Re: [coreboot] Lenovo T60p 8742 Y19 - Black screen
by Matias Jose Seco 26 Nov '11

26 Nov '11

>Did you extract and add a VGA BIOS image? Note that you have to capture >the vgabios during runtime from Linux, because >the Lenovo BIOS does some Table patching at boot to enable the LVDS >(=TFT) Display port. Manual didn't says that if i have a video card upon PCIe interface, any action for Video config. is requiered? Thanks, Matias _______________________________________________________________ Care2 makes it easy for everyone to live a healthy, green lifestyle and impact the causes you care about most. Over 12 Million members! http://www.care2.com Feed a child by searching the web! Learn how http://www.care2.com/toolbar

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Re: [coreboot] Lenovo T60p 8742 Y19 - Black screen
by Matias Jose Seco 26 Nov '11

26 Nov '11

>Was your gcc and binutils built with USE=vanilla? If not, it is >completely possible that your toolchain produced a broken image. >I've had this happen with some gcc versions. I didn't use that flag, but flashrom returned no error after veryfing emage, but i think this don't excludes broken image? >> - Dont save config options >CMOS/NVRAM? That may need to be enabled for image to work. if this is enabled by defualt, i left it enabled it (the one i mentioned is 'INCLUDE_CONFIG_FILE') >> - mmx,smp,sse,sse2 > >How did you set this exactly? I don't remember^^, but if i dont remember bad, i've enabled them under some section (im sure about smp) >Get a docking station, port replicator or ultrabay superio module, so >that you get a serial port, and connect that to another computer. >coreboot should output debug information there when starting, and it >may be clear what the problem is. I will ;) >Also, does it seem like the system boots? Is there some hard drive >access after you power on? The HD led it just blink ones when switched on... >And, does caps lock work after you power on? no :( >Finally, did you include a VGA BIOS into your coreboot.rom? This is >easiest done by configuring the filename in menuconfig. Note that >coreboot should not execute the VGA BIOS, the file should only be >added. You may need to change the defaults for this. But the manual said that if my video card was upon a PCIe interface, ishould't do anything, right? Thanks, Matias _______________________________________________________________ Care2 makes it easy for everyone to live a healthy, green lifestyle and impact the causes you care about most. Over 12 Million members! http://www.care2.com Feed a child by searching the web! Learn how http://www.care2.com/toolbar

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[RFC] what new motherboard should I get (buy/donate)?
by Rudolf Marek 25 Nov '11

25 Nov '11

Hi all I think to get new motherboard for some more recent CPU/Chipset. Any clue what should I get? Also is willing someone to donate? How it looks like with datasheets for A75 SB900 or later? Does it make sense to buy some socket FM1 board? Thanks Rudolf

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coreboot November 2011