coreboot February 2010

coreboot@coreboot.org

61 participants
310 discussions

k8/ck804 resource allocator trouble
by Jonathan A. Kollasch 12 Feb '10

12 Feb '10

Hi, I've been making sure msi/ms7135 is working in v4, having some trouble. The resource allocator fails to place lots of stuff between the keyboard and hardware monitor ports, then dies. I last had tested coreboot on this board in the r3xxx era. I noticed in my IRC logs that Uwe has had similar trouble on asus/a8n_e recently. Attached is a log of ms7135 from r5117 (with a few local modifications to the DCACHE_RAM_* configs to get it to not completely fail to do anything). I also tested r5088 w/ newconfig and experienced a similar problem. Jonathan Kollasch

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build service results for r5119
by coreboot information 12 Feb '10

12 Feb '10

Dear coreboot readers! This is the automatic build system of coreboot. The developer "oxygene" checked in revision 5119 to the coreboot repository. This caused the following changes: Change Log: Fix AUTO_XIP_ROM_BASE issues on AMD boards with certain compilers, and expose the error earlier in the build. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Build Log: Compilation of amd:serengeti_cheetah_fam10 has been fixed Compilation of asus:m2v-mx_se has been fixed Compilation of supermicro:h8dmr_fam10 has been fixed Compilation of supermicro:h8qme_fam10 has been fixed Compilation of tyan:s2912_fam10 has been fixed If something broke during this checkin please be a pain in oxygene's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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[commit] r5119 - in trunk/src: arch/i386 cpu/amd/mtrr cpu/x86/mtrr
by repository service 12 Feb '10

12 Feb '10

Author: oxygene Date: Fri Feb 12 00:00:10 2010 New Revision: 5119 URL: http://tracker.coreboot.org/trac/coreboot/changeset/5119 Log: Fix AUTO_XIP_ROM_BASE issues on AMD boards with certain compilers, and expose the error earlier in the build. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Modified: trunk/src/arch/i386/Makefile.inc trunk/src/cpu/amd/mtrr/amd_earlymtrr.c trunk/src/cpu/x86/mtrr/earlymtrr.c Modified: trunk/src/arch/i386/Makefile.inc ============================================================================== --- trunk/src/arch/i386/Makefile.inc Thu Feb 11 22:51:04 2010 (r5118) +++ trunk/src/arch/i386/Makefile.inc Fri Feb 12 00:00:10 2010 (r5119) @@ -87,8 +87,10 @@ $(CC) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@ $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h - $(CC) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -include $(obj)/build.h -I$(src) -I. -c -S $< -o - | sed -e 's/\.rodata/.rom.data/g' -e 's/\.text/.section .rom.text/g' > $@.tmp + $(CC) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -include $(obj)/build.h -I$(src) -I. -c -S $< -o $@.tmp1 + sed -e 's/\.rodata/.rom.data/g' -e 's/\.text/.section .rom.text/g' $@.tmp1 > $@.tmp mv $@.tmp $@ + rm -f $@.tmp1 endif endif Modified: trunk/src/cpu/amd/mtrr/amd_earlymtrr.c ============================================================================== --- trunk/src/cpu/amd/mtrr/amd_earlymtrr.c Thu Feb 11 22:51:04 2010 (r5118) +++ trunk/src/cpu/amd/mtrr/amd_earlymtrr.c Fri Feb 12 00:00:10 2010 (r5119) @@ -43,6 +43,7 @@ #if defined(CONFIG_XIP_ROM_SIZE) #if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK +extern unsigned long AUTO_XIP_ROM_BASE; #define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE #else #define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE Modified: trunk/src/cpu/x86/mtrr/earlymtrr.c ============================================================================== --- trunk/src/cpu/x86/mtrr/earlymtrr.c Thu Feb 11 22:51:04 2010 (r5118) +++ trunk/src/cpu/x86/mtrr/earlymtrr.c Fri Feb 12 00:00:10 2010 (r5119) @@ -101,6 +101,7 @@ #if defined(CONFIG_XIP_ROM_SIZE) #if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK +extern unsigned long AUTO_XIP_ROM_BASE; #define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE #else #define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE

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build service results for r5118
by coreboot information 11 Feb '10

11 Feb '10

Dear coreboot readers! This is the automatic build system of coreboot. The developer "oxygene" checked in revision 5118 to the coreboot repository. This caused the following changes: Change Log: Adapt all uses of CONFIG_XIP_ROM_BASE to use AUTO_XIP_ROM_BASE (as implemented for tinybootblock) if available. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of amd:serengeti_cheetah_fam10 has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5118&device=serengeti_chee… Compilation of asus:m2v-mx_se has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5118&device=m2v-mx_se&vend… Compilation of supermicro:h8dmr_fam10 has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5118&device=h8dmr_fam10&ve… Compilation of supermicro:h8qme_fam10 has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5118&device=h8qme_fam10&ve… Compilation of tyan:s2912_fam10 has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5118&device=s2912_fam10&ve… If something broke during this checkin please be a pain in oxygene's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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[commit] r5118 - in trunk/src: arch/i386/init cpu/amd/mtrr cpu/via/car cpu/x86/car cpu/x86/mtrr
by repository service 11 Feb '10

11 Feb '10

Author: oxygene Date: Thu Feb 11 22:51:04 2010 New Revision: 5118 URL: http://tracker.coreboot.org/trac/coreboot/changeset/5118 Log: Adapt all uses of CONFIG_XIP_ROM_BASE to use AUTO_XIP_ROM_BASE (as implemented for tinybootblock) if available. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/src/arch/i386/init/car.S trunk/src/cpu/amd/mtrr/amd_earlymtrr.c trunk/src/cpu/via/car/cache_as_ram.inc trunk/src/cpu/x86/car/cache_as_ram.inc trunk/src/cpu/x86/mtrr/earlymtrr.c Modified: trunk/src/arch/i386/init/car.S ============================================================================== --- trunk/src/arch/i386/init/car.S Thu Feb 11 13:12:19 2010 (r5117) +++ trunk/src/arch/i386/init/car.S Thu Feb 11 22:51:04 2010 (r5118) @@ -236,12 +236,18 @@ wrmsr #if defined(CONFIG_XIP_ROM_SIZE) && defined(CONFIG_XIP_ROM_BASE) +#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK +#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE +#else +#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE +#endif /* enable write base caching so we can do execute in place * on the flash rom. */ movl $0x202, %ecx xorl %edx, %edx - movl $(CONFIG_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax + movl $REAL_XIP_ROM_BASE, %eax + orl $MTRR_TYPE_WRBACK, %eax wrmsr movl $0x203, %ecx Modified: trunk/src/cpu/amd/mtrr/amd_earlymtrr.c ============================================================================== --- trunk/src/cpu/amd/mtrr/amd_earlymtrr.c Thu Feb 11 13:12:19 2010 (r5117) +++ trunk/src/cpu/amd/mtrr/amd_earlymtrr.c Thu Feb 11 22:51:04 2010 (r5118) @@ -42,10 +42,15 @@ wrmsr(TOP_MEM, msr); #if defined(CONFIG_XIP_ROM_SIZE) +#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK +#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE +#else +#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE +#endif /* enable write through caching so we can do execute in place * on the flash rom. */ - set_var_mtrr(1, CONFIG_XIP_ROM_BASE, CONFIG_XIP_ROM_SIZE, MTRR_TYPE_WRBACK); + set_var_mtrr(1, REAL_XIP_ROM_BASE, CONFIG_XIP_ROM_SIZE, MTRR_TYPE_WRBACK); #endif /* Set the default memory type and enable fixed and variable MTRRs Modified: trunk/src/cpu/via/car/cache_as_ram.inc ============================================================================== --- trunk/src/cpu/via/car/cache_as_ram.inc Thu Feb 11 13:12:19 2010 (r5117) +++ trunk/src/cpu/via/car/cache_as_ram.inc Thu Feb 11 22:51:04 2010 (r5118) @@ -83,7 +83,13 @@ /* MTRRPhysBase */ movl $0x202, %ecx xorl %edx, %edx - movl $(CONFIG_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax +#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK +#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE +#else +#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE +#endif + movl $REAL_XIP_ROM_BASE, %eax + orl $MTRR_TYPE_WRBACK, %eax wrmsr /* MTRRPhysMask */ Modified: trunk/src/cpu/x86/car/cache_as_ram.inc ============================================================================== --- trunk/src/cpu/x86/car/cache_as_ram.inc Thu Feb 11 13:12:19 2010 (r5117) +++ trunk/src/cpu/x86/car/cache_as_ram.inc Thu Feb 11 22:51:04 2010 (r5118) @@ -200,12 +200,18 @@ #endif /* CONFIG_USE_FALLBACK_IMAGE == 1*/ #if defined(CONFIG_XIP_ROM_SIZE) && defined(CONFIG_XIP_ROM_BASE) +#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK +#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE +#else +#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE +#endif /* enable write base caching so we can do execute in place * on the flash rom. */ movl $0x202, %ecx xorl %edx, %edx - movl $(CONFIG_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax + movl $REAL_XIP_ROM_BASE, %eax + orl $MTRR_TYPE_WRBACK, %eax wrmsr movl $0x203, %ecx Modified: trunk/src/cpu/x86/mtrr/earlymtrr.c ============================================================================== --- trunk/src/cpu/x86/mtrr/earlymtrr.c Thu Feb 11 13:12:19 2010 (r5117) +++ trunk/src/cpu/x86/mtrr/earlymtrr.c Thu Feb 11 22:51:04 2010 (r5118) @@ -100,10 +100,15 @@ } #if defined(CONFIG_XIP_ROM_SIZE) +#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK +#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE +#else +#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE +#endif /* enable write through caching so we can do execute in place * on the flash rom. */ - set_var_mtrr(1, CONFIG_XIP_ROM_BASE, CONFIG_XIP_ROM_SIZE, MTRR_TYPE_WRBACK); + set_var_mtrr(1, REAL_XIP_ROM_BASE, CONFIG_XIP_ROM_SIZE, MTRR_TYPE_WRBACK); #endif /* Set the default memory type and enable fixed and variable MTRRs

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Patch to add MSI MS-9652 support to CoreBoot
by tpearson＠raptorengineeringinc.com 11 Feb '10

11 Feb '10

Attached is a patch to add support for the MSI MS-9652 board to CoreBoot. The PCI routing tables and ACPI implementation are incomplete; I have all the functionality I need at this time so I will probably not be fixing them. The board boots and the following items work under the newconfig build system * Two quad core Opteron Barcelona processors (with previously sent patch) * ECC DDR2 memory, all DIMM slots are functional * Both on-board NIC cards, with factory MAC addresses being read properly * Serial port * PS2 keyboard/mouse * All four on-board USB ports * The flashrom utility, all functions What does not work * PCI/PCIe slot IRQs * ACPI * SMP, without previously sent patch SeaBIOS/gPXE load properly and Linux boots up over PXE with no problems. An attempt was made to port the board to KConfig, however this port is untested and may or may not function correctly. Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- Re-sending as requested, this time WITH the patch attached! ;-) Timothy Pearson Raptor Engineering

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Patch to add MSI MS-9652 support to CoreBoot
by tpearson＠raptorengineeringinc.com 11 Feb '10

11 Feb '10

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[PATCH]Use proper XIP_ROM_BASE everywhere
by Patrick Georgi 11 Feb '10

11 Feb '10

Hi, attached patch adapts all uses of CONFIG_XIP_ROM_BASE to use AUTO_XIP_ROM_BASE (as implemented for tinybootblock) instead if available. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de>

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[commit] r5117 - trunk
by repository service 11 Feb '10

11 Feb '10

Author: oxygene Date: Thu Feb 11 13:12:19 2010 New Revision: 5117 URL: http://tracker.coreboot.org/trac/coreboot/changeset/5117 Log: Don't remove config.h on "make clean" Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Modified: trunk/Makefile Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Thu Feb 11 12:13:32 2010 (r5116) +++ trunk/Makefile Thu Feb 11 13:12:19 2010 (r5117) @@ -279,7 +279,7 @@ rm -f $(objs) $(initobjs) $(drivers) $(smmobjs) .xcompile rm -f $(obj)/coreboot_ram* $(obj)/coreboot.romstage $(obj)/coreboot.pre* $(obj)/coreboot.bootblock $(obj)/coreboot.a rm -rf $(obj)/bootblock* $(obj)/romstage* $(obj)/location.* - rm -f $(obj)/option_table.* $(obj)/crt0_includes.h $(obj)/ldscript $(obj)/config.h + rm -f $(obj)/option_table.* $(obj)/crt0_includes.h $(obj)/ldscript rm -f $(obj)/mainboard/$(MAINBOARDDIR)/static.c $(obj)/mainboard/$(MAINBOARDDIR)/config.py $(obj)/mainboard/$(MAINBOARDDIR)/static.dot rm -f $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s $(obj)/mainboard/$(MAINBOARDDIR)/crt0.disasm rmdir -p $(alldirs) 2>/dev/null >/dev/null || true

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[PATCH] drop quotes
by Stefan Reinauer 11 Feb '10

11 Feb '10

without this patch coreboot's romstage will come up with coreboot-4.0" <date>. starting.. The patch removes the " Not sure what causes this, but I think romcc assumes that "" is a protected " instead of an empty string (Better fix might be to fix that) Acked-by: Stefan Reinauer <stepan(a)coresystems.de> -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info(a)coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866

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coreboot February 2010