coreboot September 2003

coreboot@coreboot.org

68 participants
171 discussions

MSI ???
by spidermantm＠freenet.de 27 Sep '03

27 Sep '03

Hello ? am new to this mailinglist. does anybody know about linuxbios and MSI mainboards ? thanks for hint. regards. spidey. -- 60% Onlinekosten sparen! Jetzt Premium Mitglied bei freenet.de werden und mit dem Tarifnavigator guenstiger surfen. http://www.freenet.de/tipp/premium/tarif/index.html

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sis740
by Andre Dias 27 Sep '03

27 Sep '03

Has anyone tried using linuxbios with SiS740/SiS962L chipset? (eg, pcchips new m810dlu series) ======================== Andre Dias Gerente Ponto-i Equipamentos e Serviços www.ponto-i.net

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V2 via/epia
by ron minnich 27 Sep '03

27 Sep '03

I think I've got the last kinks out on 8601; we'll find out monday. ron

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V2 via epia
by ron minnich 26 Sep '03

26 Sep '03

Closer. I'm getting through all of the 8601 setup. But the values are bogus: Good VIA! 00: 06 11 01 06 06 00 90 a2 05 00 00 06 00 40 00 00 10: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: ac 08 80 00 00 00 20 20 80 00 10 20 20 20 20 20 60: 3f ff ff f0 e4 e4 e4 00 42 ac 65 0d 08 7f 00 00 70: c0 88 ec 0c 0e 81 52 00 01 f0 00 00 00 00 00 00 80: 00 41 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 02 00 20 00 03 02 00 07 00 00 00 00 08 02 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 01 01 00 42 00 b0 00 00 00 00 Bad VIA! Bad! Bad doggy! 00:06 11 01 06 06 00 90 22 05 00 00 06 00 00 00 00 10:08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30:00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00 40:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50:ac 08 80 00 00 00 ff ff 00 00 ff ff ff ff ff ff 60:3f 00 00 00 e4 e4 e4 00 42 ac 65 0d 08 7f 00 00 70:00 00 00 00 00 00 00 00 01 f0 00 00 00 00 00 00 80:00 c1 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0:02 00 20 00 03 02 00 07 00 00 00 00 08 02 00 00 b0:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0:00 00 00 00 00 00 01 01 00 00 00 00 00 00 00 00 ah well. I can ship my tree to those of you who want it again. We're working on a solution to the CVS problem, and unlike the sourceforge solutions, we think this one will actually work. So hang in there, we hope next week. ron

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keyboard idle - sis730
by Andre Dias 26 Sep '03

26 Sep '03

Dear fellows, I use linuxbios with m810 but sometimes, when I am not typing on the keyboard (when it is idle), the keyboard no longer responds (otherwise it works ok). Did you have such problem? Any solution, say disable something in kernel? Thanks in advance ======================== Andre Dias Gerente Ponto-i Equipamentos e Serviços www.ponto-i.net

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bug in pci_locate_device?
by ron minnich 26 Sep '03

26 Sep '03

interesting. This: north = pci_locate_device(PCI_ID(0x1106, 0x8601), 0); returned: 00000800 Which is Wrong. And the 8601 reads ok, but writes fail in config space. Once I just set it to 0, things got a lot better! But it still fails :-) ron

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V2 via/epia: stuck on north bridge.
by ron minnich 26 Sep '03

26 Sep '03

OK, here is where I am. Here is the start of the key function in src/northbridge/via/vt8601/raminit.c static void sdram_set_registers(const struct mem_controller *ctrl) { static const uint16_t raminit_ma_reg_table[] = { /* Values for MA type register to try */ 0x0000, 0x8088, 0xe0ee, 0xffff // end mark }; device_t north = 0; uint8_t c, r; print_err("vt8601 init starting\n"); north = pci_locate_device(PCI_ID(0x1106, 0x8601), 0); print_err_hex32(north); print_err(" is the north\n"); print_err_hex16(pci_read_config16(north, 0)); print_err(" "); print_err_hex16(pci_read_config16(north, 2)); print_err("\r\n"); // memory clk enable. We are not using ECC pci_write_config8(north,0x78, 0x01); print_err_hex8(pci_read_config8(north, 0x78)); . . . Here's what is going wrong. LinuxBIOS-1.1.4.0Fallback Fri Sep 26 16:44:17 MDT 2003 starting... SMBus controller enabled vt8601 init starting 00000800 is the north 1106 8601 00 That 00 is the result of reading register 78. Note that I tried to set it to 1. Somehow, none of my config writes to any register are working. Not one. The reads read back fine. That 1106/8601 you see is the result of a config read from the north bridge. But the writes all fail. Any idea why this would be? Seems like something is locked somehow. I've looked at the assembly code and it actually looks ok. This is pretty odd. The sequence of writes is taken directly from the V1 code. here's a dump of the north bridge after ALL the writes have been tried. 00:06 11 01 86 07 00 30 02 00 00 04 06 00 00 01 00 10:00 00 00 00 00 00 00 00 00 00 00 00 f0 00 00 00 20:f0 ff 00 00 f0 ff 00 00 00 00 00 00 00 00 00 00 30:00 00 00 00 80 00 00 00 00 00 00 00 00 00 00 00 40:00 00 00 22 00 00 00 00 00 00 00 00 00 00 00 00 50:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80:01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 90:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 One thing I definitely don't understand: why is the north 00000800? I would have expected it to be 0. But it works: reads from 'north' return sensible values. Still ... thanks ron

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Re: config tool + tree enumeration
by YhLu 26 Sep '03

26 Sep '03

It should work with Arima. And It works with S2880/S2882. If some MB connect link0 with 8131/8111, and connect link2 to 8151. So it will get troble again. So I add one MACRO define. We can add the option in config.lb of MB. Option HT_LINK_REVERSE_SCAN=1 Regards YH -----邮件原件----- 发件人: Stefan Reinauer [mailto:stepan@suse.de] 发送时间: 2003年9月26日 15:12 收件人: YhLu 抄送: linuxbios(a)clustermatic.org 主题: Re: config tool + tree enumeration * YhLu <YhLu(a)tyan.com> [030926 18:24]: > Stefan, > > Change that to 1 seems no use. > > For Tyan S2885, the 8131 and 8111 is connected to CPU0 Link2, and 8151 is > linked to CPU0 link0. > > I have to manual to change src/device/hypertransport.c 's > hypertransport_scan_chain the link scan sequence from "0 to 2" to "2 to 0". > > I think it works for your case to. This did help indeed. Is there any good reason not to reverse the probing per default? Ron, Eric? If there is, I suggest we make this a config variable Stefan -- Architecture Team SuSE Linux AG

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V2 VIA EPIA output
by ron minnich 26 Sep '03

26 Sep '03

here is what I get: 0 LinuxBIOS-1.1.4.0Fallback Fri Sep 26 16:04:07 MDT 2003 starting... SMBus controller enabled vt8601 init starting 00000800 is the north vt8601 done LinuxBIOS-1.1.4.0Fallback Fri Sep 26 16:04:07 MDT 2003 starting... Copying LinuxBIOS to ram. Jumping to LinuxBIOS. That first '0' is just the early setup code for the southbridge serial. Then you can see the smbus controller, then the various 8601 gyrations (which don't actually do any good, it seems :0) ron

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V2 and via epia
by ron minnich 26 Sep '03

26 Sep '03

getting serial output. Dies after copy to ram. Gee, what a shock :-) ron

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coreboot September 2003