SeaBIOS

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[PATCH 1/3] Convert AHCI code to use GET/SET_LOWFLAT().
by Kevin O'Connor 26 May '12

26 May '12

Convert from GET/SET_FLATPTR() to GET/SET_LOWFLAT() - the latter produces better code. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/ahci.c | 60 ++++++++++++++++++++++++++++++------------------------------ 1 files changed, 30 insertions(+), 30 deletions(-) diff --git a/src/ahci.c b/src/ahci.c index 1176dcc..1d7dbf8 100644 --- a/src/ahci.c +++ b/src/ahci.c @@ -29,7 +29,7 @@ static void sata_prep_simple(struct sata_cmd_fis *fis, u8 command) { memset_fl(fis, 0, sizeof(*fis)); - SET_FLATPTR(fis->command, command); + SET_LOWFLAT(fis->command, command); } static void sata_prep_readwrite(struct sata_cmd_fis *fis, @@ -41,10 +41,10 @@ static void sata_prep_readwrite(struct sata_cmd_fis *fis, memset_fl(fis, 0, sizeof(*fis)); if (op->count >= (1<<8) || lba + op->count >= (1<<28)) { - SET_FLATPTR(fis->sector_count2, op->count >> 8); - SET_FLATPTR(fis->lba_low2, lba >> 24); - SET_FLATPTR(fis->lba_mid2, lba >> 32); - SET_FLATPTR(fis->lba_high2, lba >> 40); + SET_LOWFLAT(fis->sector_count2, op->count >> 8); + SET_LOWFLAT(fis->lba_low2, lba >> 24); + SET_LOWFLAT(fis->lba_mid2, lba >> 32); + SET_LOWFLAT(fis->lba_high2, lba >> 40); lba &= 0xffffff; command = (iswrite ? ATA_CMD_WRITE_DMA_EXT : ATA_CMD_READ_DMA_EXT); @@ -52,22 +52,22 @@ static void sata_prep_readwrite(struct sata_cmd_fis *fis, command = (iswrite ? ATA_CMD_WRITE_DMA : ATA_CMD_READ_DMA); } - SET_FLATPTR(fis->feature, 1); /* dma */ - SET_FLATPTR(fis->command, command); - SET_FLATPTR(fis->sector_count, op->count); - SET_FLATPTR(fis->lba_low, lba); - SET_FLATPTR(fis->lba_mid, lba >> 8); - SET_FLATPTR(fis->lba_high, lba >> 16); - SET_FLATPTR(fis->device, ((lba >> 24) & 0xf) | ATA_CB_DH_LBA); + SET_LOWFLAT(fis->feature, 1); /* dma */ + SET_LOWFLAT(fis->command, command); + SET_LOWFLAT(fis->sector_count, op->count); + SET_LOWFLAT(fis->lba_low, lba); + SET_LOWFLAT(fis->lba_mid, lba >> 8); + SET_LOWFLAT(fis->lba_high, lba >> 16); + SET_LOWFLAT(fis->device, ((lba >> 24) & 0xf) | ATA_CB_DH_LBA); } static void sata_prep_atapi(struct sata_cmd_fis *fis, u16 blocksize) { memset_fl(fis, 0, sizeof(*fis)); - SET_FLATPTR(fis->command, ATA_CMD_PACKET); - SET_FLATPTR(fis->feature, 1); /* dma */ - SET_FLATPTR(fis->lba_mid, blocksize); - SET_FLATPTR(fis->lba_high, blocksize >> 8); + SET_LOWFLAT(fis->command, ATA_CMD_PACKET); + SET_LOWFLAT(fis->feature, 1); /* dma */ + SET_LOWFLAT(fis->lba_mid, blocksize); + SET_LOWFLAT(fis->lba_high, blocksize >> 8); } // ahci register access helpers @@ -115,20 +115,20 @@ static int ahci_command(struct ahci_port_s *port, int iswrite, int isatapi, u32 pnr = GET_GLOBAL(port->pnr); u64 end; - SET_FLATPTR(cmd->fis.reg, 0x27); - SET_FLATPTR(cmd->fis.pmp_type, (1 << 7)); /* cmd fis */ - SET_FLATPTR(cmd->prdt[0].base, ((u32)buffer)); - SET_FLATPTR(cmd->prdt[0].baseu, 0); - SET_FLATPTR(cmd->prdt[0].flags, bsize-1); + SET_LOWFLAT(cmd->fis.reg, 0x27); + SET_LOWFLAT(cmd->fis.pmp_type, (1 << 7)); /* cmd fis */ + SET_LOWFLAT(cmd->prdt[0].base, ((u32)buffer)); + SET_LOWFLAT(cmd->prdt[0].baseu, 0); + SET_LOWFLAT(cmd->prdt[0].flags, bsize-1); flags = ((1 << 16) | /* one prd entry */ (iswrite ? (1 << 6) : 0) | (isatapi ? (1 << 5) : 0) | (5 << 0)); /* fis length (dwords) */ - SET_FLATPTR(list[0].flags, flags); - SET_FLATPTR(list[0].bytes, 0); - SET_FLATPTR(list[0].base, ((u32)(cmd))); - SET_FLATPTR(list[0].baseu, 0); + SET_LOWFLAT(list[0].flags, flags); + SET_LOWFLAT(list[0].bytes, 0); + SET_LOWFLAT(list[0].base, ((u32)(cmd))); + SET_LOWFLAT(list[0].baseu, 0); dprintf(8, "AHCI/%d: send cmd ...\n", pnr); intbits = ahci_port_readl(ctrl, pnr, PORT_IRQ_STAT); @@ -144,13 +144,13 @@ static int ahci_command(struct ahci_port_s *port, int iswrite, int isatapi, if (intbits) { ahci_port_writel(ctrl, pnr, PORT_IRQ_STAT, intbits); if (intbits & 0x02) { - status = GET_FLATPTR(fis->psfis[2]); - error = GET_FLATPTR(fis->psfis[3]); + status = GET_LOWFLAT(fis->psfis[2]); + error = GET_LOWFLAT(fis->psfis[3]); break; } if (intbits & 0x01) { - status = GET_FLATPTR(fis->rfis[2]); - error = GET_FLATPTR(fis->rfis[3]); + status = GET_LOWFLAT(fis->rfis[2]); + error = GET_LOWFLAT(fis->rfis[3]); break; } } @@ -229,7 +229,7 @@ int ahci_cmd_data(struct disk_op_s *op, void *cdbcmd, u16 blocksize) sata_prep_atapi(&cmd->fis, blocksize); for (i = 0; i < CDROM_CDB_SIZE; i++) { - SET_FLATPTR(cmd->atapi[i], atapi[i]); + SET_LOWFLAT(cmd->atapi[i], atapi[i]); } rc = ahci_command(port, 0, 1, op->buf_fl, op->count * blocksize); -- 1.7.6.5

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[PATCH 0/6] pci patches
by Gerd Hoffmann 25 May '12

25 May '12

Hi, Here is my pci patch collection, mostly but not completely related to 64bit pci support. It brings back the ressource entry for the 64bit pci i/o window. It is (with all patches applied) only present in case seabios actually mapped something high to avoid confusing old guests for no reason. Tested with Linux, windows xp (32bit maps only) and windows 7, all working fine. Ressources show up as they should. Linux: check /proc/{iomem,ioports}. Windows: device manager -> system devices -> pci bus -> properties -> ressources. please review & test, Gerd The following changes since commit 0c8f58d78543a06a57f4280dd3498807a1d9005d: pci: handle bridge irq mapping (2012-05-12 14:15:35 -0400) are available in the git repository at: git://git.kraxel.org/seabios pci64 Gerd Hoffmann (6): remove iasl-generated hex files from git repo pci: init all devices update bios date pciinit: make pci ressources configurable update dsdt ressources at runtime pci: runtime i/o window sizing Makefile | 2 +- src/.gitignore | 1 + src/acpi-dsdt.dsl | 63 +- src/acpi-dsdt.hex | 4387 ---------------------------------------------------- src/acpi.c | 28 +- src/pci.h | 2 + src/pciinit.c | 41 +- src/smbios.c | 2 +- src/ssdt-pcihp.hex | 1672 -------------------- src/ssdt-proc.hex | 134 -- 10 files changed, 123 insertions(+), 6209 deletions(-) create mode 100644 src/.gitignore delete mode 100644 src/acpi-dsdt.hex delete mode 100644 src/ssdt-pcihp.hex delete mode 100644 src/ssdt-proc.hex

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[PATCH 2/2] Remove disk GET/SET_INT13DPT and GET/SET_INT13EXT macros.
by Kevin O'Connor 25 May '12

25 May '12

The code generation is better if explicit 'struct int13ext_s' and 'struct int13dpt_s' pointers are used instead. The code is a little easier to understand as well. This patch also forces disk_1348 to not be inlined. If it gets inlined into its caller it can increase the stack usage for all disk calls. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/disk.c | 115 +++++++++++++++++++++++++++++++----------------------------- src/disk.h | 10 ----- 2 files changed, 59 insertions(+), 66 deletions(-) diff --git a/src/disk.c b/src/disk.c index 9f02a21..080d6cd 100644 --- a/src/disk.c +++ b/src/disk.c @@ -122,8 +122,9 @@ static void noinline extended_access(struct bregs *regs, struct drive_s *drive_g, u16 command) { struct disk_op_s dop; + struct int13ext_s *param_far = (struct int13ext_s*)(regs->si+0); // Get lba and check. - dop.lba = GET_INT13EXT(regs, lba); + dop.lba = GET_FARVAR(regs->ds, param_far->lba); dop.command = command; dop.drive_g = drive_g; if (dop.lba >= GET_GLOBAL(drive_g->sectors)) { @@ -132,8 +133,8 @@ extended_access(struct bregs *regs, struct drive_s *drive_g, u16 command) return; } - dop.buf_fl = SEGOFF_TO_FLATPTR(GET_INT13EXT(regs, data)); - dop.count = GET_INT13EXT(regs, count); + dop.buf_fl = SEGOFF_TO_FLATPTR(GET_FARVAR(regs->ds, param_far->data)); + dop.count = GET_FARVAR(regs->ds, param_far->count); if (! dop.count) { // Nothing to do. disk_ret(regs, DISK_RET_SUCCESS); @@ -142,7 +143,7 @@ extended_access(struct bregs *regs, struct drive_s *drive_g, u16 command) int status = send_disk_op(&dop); - SET_INT13EXT(regs, count, dop.count); + SET_FARVAR(regs->ds, param_far->count, dop.count); disk_ret(regs, status); } @@ -500,10 +501,12 @@ disk_1347(struct bregs *regs, struct drive_s *drive_g) } // IBM/MS get drive parameters -static void +static void noinline disk_1348(struct bregs *regs, struct drive_s *drive_g) { - u16 size = GET_INT13DPT(regs, size); + u16 seg = regs->ds; + struct int13dpt_s *param_far = (struct int13dpt_s*)(regs->si+0); + u16 size = GET_FARVAR(seg, param_far->size); u16 t13 = size == 74; // Buffer is too small @@ -524,27 +527,27 @@ disk_1348(struct bregs *regs, struct drive_s *drive_g) dprintf(DEBUG_HDL_13, "disk_1348 size=%d t=%d chs=%d,%d,%d lba=%d bs=%d\n" , size, type, npc, nph, npspt, (u32)lba, blksize); - SET_INT13DPT(regs, size, 26); + SET_FARVAR(seg, param_far->size, 26); if (type == DTYPE_ATAPI) { // 0x74 = removable, media change, lockable, max values - SET_INT13DPT(regs, infos, 0x74); - SET_INT13DPT(regs, cylinders, 0xffffffff); - SET_INT13DPT(regs, heads, 0xffffffff); - SET_INT13DPT(regs, spt, 0xffffffff); - SET_INT13DPT(regs, sector_count, (u64)-1); + SET_FARVAR(seg, param_far->infos, 0x74); + SET_FARVAR(seg, param_far->cylinders, 0xffffffff); + SET_FARVAR(seg, param_far->heads, 0xffffffff); + SET_FARVAR(seg, param_far->spt, 0xffffffff); + SET_FARVAR(seg, param_far->sector_count, (u64)-1); } else { if (lba > (u64)npspt*nph*0x3fff) { - SET_INT13DPT(regs, infos, 0x00); // geometry is invalid - SET_INT13DPT(regs, cylinders, 0x3fff); + SET_FARVAR(seg, param_far->infos, 0x00); // geometry is invalid + SET_FARVAR(seg, param_far->cylinders, 0x3fff); } else { - SET_INT13DPT(regs, infos, 0x02); // geometry is valid - SET_INT13DPT(regs, cylinders, (u32)npc); + SET_FARVAR(seg, param_far->infos, 0x02); // geometry is valid + SET_FARVAR(seg, param_far->cylinders, (u32)npc); } - SET_INT13DPT(regs, heads, (u32)nph); - SET_INT13DPT(regs, spt, (u32)npspt); - SET_INT13DPT(regs, sector_count, lba); + SET_FARVAR(seg, param_far->heads, (u32)nph); + SET_FARVAR(seg, param_far->spt, (u32)npspt); + SET_FARVAR(seg, param_far->sector_count, lba); } - SET_INT13DPT(regs, blksize, blksize); + SET_FARVAR(seg, param_far->blksize, blksize); if (size < 30 || (type != DTYPE_ATA && type != DTYPE_ATAPI && @@ -559,9 +562,9 @@ disk_1348(struct bregs *regs, struct drive_s *drive_g) u16 iobase1 = 0; u64 device_path = 0; u8 channel = 0; - SET_INT13DPT(regs, size, 30); + SET_FARVAR(seg, param_far->size, 30); if (type == DTYPE_ATA || type == DTYPE_ATAPI) { - SET_INT13DPT(regs, dpte, SEGOFF(SEG_LOW, (u32)&DefaultDPTE)); + SET_FARVAR(seg, param_far->dpte, SEGOFF(SEG_LOW, (u32)&DefaultDPTE)); // Fill in dpte struct atadrive_s *adrive_g = container_of( @@ -610,7 +613,7 @@ disk_1348(struct bregs *regs, struct drive_s *drive_g) u8 sum = checksum_far(SEG_LOW, &DefaultDPTE, 15); SET_LOW(DefaultDPTE.checksum, -sum); } else { - SET_INT13DPT(regs, dpte.segoff, 0); + SET_FARVAR(seg, param_far->dpte.segoff, 0); bdf = GET_GLOBAL(drive_g->cntl_id); } @@ -620,60 +623,60 @@ disk_1348(struct bregs *regs, struct drive_s *drive_g) } // EDD 3.x - SET_INT13DPT(regs, key, 0xbedd); - SET_INT13DPT(regs, dpi_length, t13 ? 44 : 36); - SET_INT13DPT(regs, reserved1, 0); - SET_INT13DPT(regs, reserved2, 0); + SET_FARVAR(seg, param_far->key, 0xbedd); + SET_FARVAR(seg, param_far->dpi_length, t13 ? 44 : 36); + SET_FARVAR(seg, param_far->reserved1, 0); + SET_FARVAR(seg, param_far->reserved2, 0); if (bdf != -1) { - SET_INT13DPT(regs, host_bus[0], 'P'); - SET_INT13DPT(regs, host_bus[1], 'C'); - SET_INT13DPT(regs, host_bus[2], 'I'); - SET_INT13DPT(regs, host_bus[3], ' '); + SET_FARVAR(seg, param_far->host_bus[0], 'P'); + SET_FARVAR(seg, param_far->host_bus[1], 'C'); + SET_FARVAR(seg, param_far->host_bus[2], 'I'); + SET_FARVAR(seg, param_far->host_bus[3], ' '); u32 path = (pci_bdf_to_bus(bdf) | (pci_bdf_to_dev(bdf) << 8) | (pci_bdf_to_fn(bdf) << 16)); if (t13) path |= channel << 24; - SET_INT13DPT(regs, iface_path, path); + SET_FARVAR(seg, param_far->iface_path, path); } else { // ISA - SET_INT13DPT(regs, host_bus[0], 'I'); - SET_INT13DPT(regs, host_bus[1], 'S'); - SET_INT13DPT(regs, host_bus[2], 'A'); - SET_INT13DPT(regs, host_bus[3], ' '); + SET_FARVAR(seg, param_far->host_bus[0], 'I'); + SET_FARVAR(seg, param_far->host_bus[1], 'S'); + SET_FARVAR(seg, param_far->host_bus[2], 'A'); + SET_FARVAR(seg, param_far->host_bus[3], ' '); - SET_INT13DPT(regs, iface_path, iobase1); + SET_FARVAR(seg, param_far->iface_path, iobase1); } if (type != DTYPE_VIRTIO_BLK) { - SET_INT13DPT(regs, iface_type[0], 'A'); - SET_INT13DPT(regs, iface_type[1], 'T'); - SET_INT13DPT(regs, iface_type[2], 'A'); - SET_INT13DPT(regs, iface_type[3], ' '); + SET_FARVAR(seg, param_far->iface_type[0], 'A'); + SET_FARVAR(seg, param_far->iface_type[1], 'T'); + SET_FARVAR(seg, param_far->iface_type[2], 'A'); + SET_FARVAR(seg, param_far->iface_type[3], ' '); } else { - SET_INT13DPT(regs, iface_type[0], 'S'); - SET_INT13DPT(regs, iface_type[1], 'C'); - SET_INT13DPT(regs, iface_type[2], 'S'); - SET_INT13DPT(regs, iface_type[3], 'I'); + SET_FARVAR(seg, param_far->iface_type[0], 'S'); + SET_FARVAR(seg, param_far->iface_type[1], 'C'); + SET_FARVAR(seg, param_far->iface_type[2], 'S'); + SET_FARVAR(seg, param_far->iface_type[3], 'I'); } - SET_INT13DPT(regs, iface_type[4], ' '); - SET_INT13DPT(regs, iface_type[5], ' '); - SET_INT13DPT(regs, iface_type[6], ' '); - SET_INT13DPT(regs, iface_type[7], ' '); + SET_FARVAR(seg, param_far->iface_type[4], ' '); + SET_FARVAR(seg, param_far->iface_type[5], ' '); + SET_FARVAR(seg, param_far->iface_type[6], ' '); + SET_FARVAR(seg, param_far->iface_type[7], ' '); if (t13) { - SET_INT13DPT(regs, t13.device_path[0], device_path); - SET_INT13DPT(regs, t13.device_path[1], 0); + SET_FARVAR(seg, param_far->t13.device_path[0], device_path); + SET_FARVAR(seg, param_far->t13.device_path[1], 0); - SET_INT13DPT(regs, t13.checksum - , -checksum_far(regs->ds, (void*)(regs->si+30), 43)); + SET_FARVAR(seg, param_far->t13.checksum + , -checksum_far(seg, (void*)param_far+30, 43)); } else { - SET_INT13DPT(regs, phoenix.device_path, device_path); + SET_FARVAR(seg, param_far->phoenix.device_path, device_path); - SET_INT13DPT(regs, phoenix.checksum - , -checksum_far(regs->ds, (void*)(regs->si+30), 35)); + SET_FARVAR(seg, param_far->phoenix.checksum + , -checksum_far(seg, (void*)param_far+30, 35)); } disk_ret(regs, DISK_RET_SUCCESS); diff --git a/src/disk.h b/src/disk.h index 6c7d8fe..68e866d 100644 --- a/src/disk.h +++ b/src/disk.h @@ -40,11 +40,6 @@ struct int13ext_s { u64 lba; } PACKED; -#define GET_INT13EXT(regs,var) \ - GET_FARVAR((regs)->ds, ((struct int13ext_s*)((regs)->si+0))->var) -#define SET_INT13EXT(regs,var,val) \ - SET_FARVAR((regs)->ds, ((struct int13ext_s*)((regs)->si+0))->var, (val)) - // DPTE definition struct dpte_s { u16 iobase1; @@ -94,11 +89,6 @@ struct int13dpt_s { }; } PACKED; -#define GET_INT13DPT(regs,var) \ - GET_FARVAR((regs)->ds, ((struct int13dpt_s*)((regs)->si+0))->var) -#define SET_INT13DPT(regs,var,val) \ - SET_FARVAR((regs)->ds, ((struct int13dpt_s*)((regs)->si+0))->var, (val)) - // Floppy "Disk Base Table" struct floppy_dbt_s { u8 specify1; -- 1.7.6.5

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[PATCH 1/2] Use inline functions instead of macros for GET/SET_SEG segment manipulation.
by Kevin O'Connor 25 May '12

25 May '12

It appears that gcc does a better job of optimization when the SET_SEG() segment assignment assembler code is contained in an inline function. With the code in a function gcc appears to be able to optimize out many redundant segment register loads. Removing some of these unnecessarily loads makes the code both smaller and faster. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/farptr.h | 30 ++++++++++++++++++++++-------- 1 files changed, 22 insertions(+), 8 deletions(-) diff --git a/src/farptr.h b/src/farptr.h index 3dbf545..3a85c6b 100644 --- a/src/farptr.h +++ b/src/farptr.h @@ -79,15 +79,29 @@ extern void __force_link_error__unknown_type(void); __force_link_error__unknown_type(); \ } while (0) +#define DECL_SEGFUNCS(SEG) \ +static inline void __set_seg_##SEG(u16 seg) { \ + __asm__("movw %w1, %%" #SEG : "=m"(__segment_##SEG) \ + : "rm"(seg)); \ +} \ +static inline u16 __get_seg_##SEG(void) { \ + u16 res; \ + __asm__("movw %%" #SEG ", %w0" : "=rm"(res) \ + : "m"(__segment_##SEG)); \ + return res; \ +} +DECL_SEGFUNCS(CS) +DECL_SEGFUNCS(DS) +DECL_SEGFUNCS(ES) +DECL_SEGFUNCS(FS) +DECL_SEGFUNCS(GS) +DECL_SEGFUNCS(SS) + // Low level macros for getting/setting a segment register. -#define __SET_SEG(SEG, value) \ - __asm__("movw %w1, %%" #SEG : "=m"(__segment_ ## SEG) \ - : "rm"(value)) -#define __GET_SEG(SEG) ({ \ - u16 __seg; \ - __asm__("movw %%" #SEG ", %w0" : "=rm"(__seg) \ - : "m"(__segment_ ## SEG)); \ - __seg;}) +#define __SET_SEG(SEG, value) \ + __set_seg_##SEG(value) +#define __GET_SEG(SEG) \ + __get_seg_##SEG() // Macros for accessing a variable in another segment. (They // automatically update the %es segment and then make the appropriate -- 1.7.6.5

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Upgrading a W98SE box to QEMU/SeaBIOS
by nap 24 May '12

24 May '12

The goal was to use QEMU/SeaBIOS as an upgrade from a crashed old box, using the surviving HDD, the installation medias, and an old box configuration description. The result is a working installation, but with a long login procedure. A backup of the HDD has been made to be able to recover if necessary (it has been necessary to recover). The first step was to choose the QEMU command parameters to mimic as precisely as possible the old box configuration and get some insight. Thanks Kevin for your suggestions. The basic command is: > qemu-system-x86_64 -localtime -cpu pentium -m 160 hdd2GoWIP -chardev stdio,id=seabios -device isa-debugcon,iobase=0x402,chardev=seabios we will need the W98SE installation Startup floppy for getting the famous MS-DOS cdrom driver: > qemu-system-x86_64 -localtime -cpu pentium -m 160 -fda W98SESUfd hdd2GoWIP -chardev stdio,id=seabios -device isa-debugcon,iobase=0x402,chardev=seabios and we will need the W98SE installation cdrom for the upgrade (I have not really checked that): > qemu-system-x86_64 -localtime -cpu pentium -m 160 -cdrom W98SEcdrom hdd2GoWIP -chardev stdio,id=seabios -device isa-debugcon,iobase=0x402,chardev=seabios The basic command worked, but to go to the Blue Screen of Death (BSD). Going to the MS-DOS mode at startup, I found that the cdrom was not here. Most probably because of a driver problem. So I asked this mailinglist for help - Searching for an MS-DOS CD driver - because a SeaBIOS bios is in real contact with the OS and its drivers. Thanks Fred for the pointers, which were useful per se and have pointed me to the following Microsoft Support page, which was very helpful. http://support.microsoft.com/kb/190303 Article ID: 190303 - Last Review: January 23, 2007 - Revision: 1.2 How to Use Real-Mode CD-ROM Drivers from Windows 98 Startup Disk After reading it and its annexes, the problem was most probably the fact the old box CDROM was not standard and only its real mode driver had been installed as a cdrom driver. Following the procedure with the W98SE Startup (floppy) disk, I got a HDD with the necessary CDROM driver and annexes to access the cdrom device on the command line. I was able to boot from HDD to the BSD and the Windows startup menu, alternatively. After some testing, I found that the good route was to choose the Step by Step mode. It has helped me adjusting the CONFIG.SYS file relatively to what the Microsoft Support Page states (syntax of the DEVICEHIGH lines). The pnp call arg1=40 appears just after the ASPI2DOS.SYS loading. To get further, when you get to the WIN command, say Y and also say Y for loading all the Windows drivers (in fact it gives you the opportunity to choose loading or not loading each driver), say Y to each all. The pnp call arg1=0 appears just after the last one, nsmouse.vxd. He will now upgrade the configuration correctly, that is, following its already known peculiar way. Other paths have curious outcomes, e.g. let the CPU spin to 100% and you need to kill -9 the qemu process. The end result is: I am able to boot from HDD with the basic QEMU command, but yet to the BSD and the Windows startup menu, alternatively. And from the Windows startup menu I have to go each time through the Step by Step procedure. That said it really works, way more quickly. Kudos to QEMU/SeaBIOS !!! I have to check USB, printing, networking, USB floppy, CD/DVD, etc... The BOOTLOG.TXT file did not ever change. For the curious boot cycle, W98SE or QEMU/SeaBIOS ? -Nap Here are the logs of three cases: ########################## # boot from HDD, the Windows splash appears quickly, 0.5 sec later pnp call arg1=5, 3 second later pnp call arg1=40, 5 sec later the screen blink one time, 6 sec later pnp call arg1=0 and the BSD. Close the window. qemu-system-x86_64 -localtime -cpu pentium -m 160 -cdrom W98SEcdrom hdd2GoWIP -chardev stdio,id=seabios -device isa-debugcon,iobase=0x402,chardev=seabios Start bios (version 1.6.3) Ram Size=0x0a000000 (0x0000000000000000 high) Relocating init from 0x000e3b20 to 0x09fe12e0 (size 60412) CPU Mhz=2795 === PCI bus & bridge init === PCI: pci_bios_init_bus_rec bus = 0x0 === PCI device probing === Found 6 PCI devices (max PCI bus is 00) === PCI new allocation pass #1 === PCI: check devices bus 0 === PCI new allocation pass #2 === PCI: init bases bus 0 (primary) type io max 100 sum 110 base c000 size 100: 1 bar(s), c000 -> c0ff size 10: 1 bar(s), c100 -> c10f type mem max 10000 sum 22000 base febd0000 size 10000: 2 bar(s), febd0000 -> febeffff size 1000: 2 bar(s), febf0000 -> febf1fff type prefmem max 2000000 sum 2000000 base fc000000 size 2000000: 1 bar(s), fc000000 -> fdffffff PCI: map device bus 0, bfd 0x0 PCI: map device bus 0, bfd 0x8 PCI: map device bus 0, bfd 0x9 bar 4, addr c100, size 10 [io] PCI: map device bus 0, bfd 0xb PCI: map device bus 0, bfd 0x10 bar 0, addr fc000000, size 2000000 [mem] bar 1, addr febf0000, size 1000 [mem] bar 6, addr febd0000, size 10000 [mem] PCI: map device bus 0, bfd 0x18 bar 0, addr c000, size 100 [io] bar 1, addr febf1000, size 100 [mem] bar 6, addr febe0000, size 10000 [mem] PCI: bus=0 devfn=0x00: vendor_id=0x8086 device_id=0x1237 PCI: bus=0 devfn=0x08: vendor_id=0x8086 device_id=0x7000 PCI: bus=0 devfn=0x09: vendor_id=0x8086 device_id=0x7010 PCI: bus=0 devfn=0x0b: vendor_id=0x8086 device_id=0x7113 PCI: bus=0 devfn=0x10: vendor_id=0x1013 device_id=0x00b8 PCI: bus=0 devfn=0x18: vendor_id=0x10ec device_id=0x8139 PIIX3/PIIX4 init: elcr=00 0c Found 1 cpu(s) max supported 1 cpu(s) MP table addr=0x000fd630 MPC table addr=0x000fd640 size=224 SMBIOS ptr=0x000fd610 table=0x000fd500 size=263 ACPI tables: RSDP=0x000fd4d0 RSDT=0x09ffd7b0 Scan for VGA option rom Running option rom at c000:0003 Turning on vga text mode console SeaBIOS (version 1.6.3) Found 1 lpt ports Found 1 serial ports ATA controller 1 at 1f0/3f4/0 (irq 14 dev 9) ATA controller 2 at 170/374/0 (irq 15 dev 9) ata0-0: QEMU HARDDISK ATA-7 Hard-Disk (2014 MiBytes) Searching bootorder for: /pci@i0cf8/*@1,1/drive@0/disk@0 DVD/CD [ata1-0: QEMU DVD-ROM ATAPI-4 DVD/CD] Searching bootorder for: /pci@i0cf8/*@1,1/drive@1/disk@0 PS2 keyboard initialized All threads complete. Scan for option roms Running option rom at c900:0003 pmm call arg1=1 pmm call arg1=0 pmm call arg1=1 pmm call arg1=0 Searching bootorder for: /pci@i0cf8/*@3 Searching bootorder for: /rom(a)genroms/vapic.bin drive 0x000fd480: PCHS=4092/16/63 translation=large LCHS=1023/64/63 s=4124736 Running option rom at ca00:0003 ebda moved from 9fc00 to 9f400 Returned 53248 bytes of ZoneHigh e820 map has 7 items: 0: 0000000000000000 - 000000000009f400 = 1 RAM 1: 000000000009f400 - 00000000000a0000 = 2 RESERVED 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED 3: 0000000000100000 - 0000000009ffd000 = 1 RAM 4: 0000000009ffd000 - 000000000a000000 = 2 RESERVED 5: 00000000feffc000 - 00000000ff000000 = 2 RESERVED 6: 00000000fffc0000 - 0000000100000000 = 2 RESERVED enter handle_19: NULL Booting from Hard Disk... Booting from 0000:7c00 pnp call arg1=5 pnp call arg1=40 pnp call arg1=0 ########################## # after a BSD # boot from HDD, the menu appear with the No Error entry (3) selected and the pnp call arg1=5; close the window before time-out.. qemu-system-x86_64 -localtime -machine pc-0.12 -cpu pentium -m 160 -cdrom W98SEcdrom hdd2GoWIP -chardev stdio,id=seabios -device isa-debugcon,iobase=0x402,chardev=seabios Start bios (version 1.6.3) Ram Size=0x0a000000 (0x0000000000000000 high) Relocating init from 0x000e3b20 to 0x09fe12e0 (size 60412) CPU Mhz=2795 === PCI bus & bridge init === PCI: pci_bios_init_bus_rec bus = 0x0 === PCI device probing === Found 6 PCI devices (max PCI bus is 00) === PCI new allocation pass #1 === PCI: check devices bus 0 === PCI new allocation pass #2 === PCI: init bases bus 0 (primary) type io max 100 sum 110 base c000 size 100: 1 bar(s), c000 -> c0ff size 10: 1 bar(s), c100 -> c10f type mem max 10000 sum 22000 base febd0000 size 10000: 2 bar(s), febd0000 -> febeffff size 1000: 2 bar(s), febf0000 -> febf1fff type prefmem max 2000000 sum 2000000 base fc000000 size 2000000: 1 bar(s), fc000000 -> fdffffff PCI: map device bus 0, bfd 0x0 PCI: map device bus 0, bfd 0x8 PCI: map device bus 0, bfd 0x9 bar 4, addr c100, size 10 [io] PCI: map device bus 0, bfd 0xb PCI: map device bus 0, bfd 0x10 bar 0, addr fc000000, size 2000000 [mem] bar 1, addr febf0000, size 1000 [mem] bar 6, addr febd0000, size 10000 [mem] PCI: map device bus 0, bfd 0x18 bar 0, addr c000, size 100 [io] bar 1, addr febf1000, size 100 [mem] bar 6, addr febe0000, size 10000 [mem] PCI: bus=0 devfn=0x00: vendor_id=0x8086 device_id=0x1237 PCI: bus=0 devfn=0x08: vendor_id=0x8086 device_id=0x7000 PCI: bus=0 devfn=0x09: vendor_id=0x8086 device_id=0x7010 PCI: bus=0 devfn=0x0b: vendor_id=0x8086 device_id=0x7113 PCI: bus=0 devfn=0x10: vendor_id=0x1013 device_id=0x00b8 PCI: bus=0 devfn=0x18: vendor_id=0x10ec device_id=0x8139 PIIX3/PIIX4 init: elcr=00 0c Found 1 cpu(s) max supported 1 cpu(s) MP table addr=0x000fd630 MPC table addr=0x000fd640 size=224 SMBIOS ptr=0x000fd610 table=0x000fd500 size=263 ACPI tables: RSDP=0x000fd4d0 RSDT=0x09ffd7b0 Scan for VGA option rom Running option rom at c000:0003 Turning on vga text mode console SeaBIOS (version 1.6.3) Found 1 lpt ports Found 1 serial ports ATA controller 1 at 1f0/3f4/0 (irq 14 dev 9) ATA controller 2 at 170/374/0 (irq 15 dev 9) ata0-0: QEMU HARDDISK ATA-7 Hard-Disk (2014 MiBytes) Searching bootorder for: /pci@i0cf8/*@1,1/drive@0/disk@0 DVD/CD [ata1-0: QEMU DVD-ROM ATAPI-4 DVD/CD] Searching bootorder for: /pci@i0cf8/*@1,1/drive@1/disk@0 PS2 keyboard initialized All threads complete. Scan for option roms Running option rom at c900:0003 pmm call arg1=1 pmm call arg1=0 pmm call arg1=1 pmm call arg1=0 Searching bootorder for: /pci@i0cf8/*@3 Searching bootorder for: /rom(a)genroms/vapic.bin drive 0x000fd480: PCHS=4092/16/63 translation=large LCHS=1023/64/63 s=4124736 Running option rom at ca00:0003 ebda moved from 9fc00 to 9f400 Returned 53248 bytes of ZoneHigh e820 map has 7 items: 0: 0000000000000000 - 000000000009f400 = 1 RAM 1: 000000000009f400 - 00000000000a0000 = 2 RESERVED 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED 3: 0000000000100000 - 0000000009ffd000 = 1 RAM 4: 0000000009ffd000 - 000000000a000000 = 2 RESERVED 5: 00000000feffc000 - 00000000ff000000 = 2 RESERVED 6: 00000000fffc0000 - 0000000100000000 = 2 RESERVED enter handle_19: NULL Booting from Hard Disk... Booting from 0000:7c00 pnp call arg1=5 ########################## # after a BSD # boot from HDD, the menu appear with the No Error entry (3) selected and pnp call arg1=5, choose the Step by Step entry (5); the pnp call arg1=40 appears after saying Y to the DEVICE=C:\RMCD\ASPI2DOS.sys LINE OF CONFIG.SYS; WIN: No; > D:\install.exe; CPU spin, kill. qemu-system-x86_64 -localtime -machine pc-0.12 -cpu pentium -m 160 -cdrom W98SEcdrom hdd2GoWIP -chardev stdio,id=seabios -device isa-debugcon,iobase=0x402,chardev=seabios Start bios (version 1.6.3) Ram Size=0x0a000000 (0x0000000000000000 high) Relocating init from 0x000e3b20 to 0x09fe12e0 (size 60412) CPU Mhz=2795 === PCI bus & bridge init === PCI: pci_bios_init_bus_rec bus = 0x0 === PCI device probing === Found 6 PCI devices (max PCI bus is 00) === PCI new allocation pass #1 === PCI: check devices bus 0 === PCI new allocation pass #2 === PCI: init bases bus 0 (primary) type io max 100 sum 110 base c000 size 100: 1 bar(s), c000 -> c0ff size 10: 1 bar(s), c100 -> c10f type mem max 10000 sum 22000 base febd0000 size 10000: 2 bar(s), febd0000 -> febeffff size 1000: 2 bar(s), febf0000 -> febf1fff type prefmem max 2000000 sum 2000000 base fc000000 size 2000000: 1 bar(s), fc000000 -> fdffffff PCI: map device bus 0, bfd 0x0 PCI: map device bus 0, bfd 0x8 PCI: map device bus 0, bfd 0x9 bar 4, addr c100, size 10 [io] PCI: map device bus 0, bfd 0xb PCI: map device bus 0, bfd 0x10 bar 0, addr fc000000, size 2000000 [mem] bar 1, addr febf0000, size 1000 [mem] bar 6, addr febd0000, size 10000 [mem] PCI: map device bus 0, bfd 0x18 bar 0, addr c000, size 100 [io] bar 1, addr febf1000, size 100 [mem] bar 6, addr febe0000, size 10000 [mem] PCI: bus=0 devfn=0x00: vendor_id=0x8086 device_id=0x1237 PCI: bus=0 devfn=0x08: vendor_id=0x8086 device_id=0x7000 PCI: bus=0 devfn=0x09: vendor_id=0x8086 device_id=0x7010 PCI: bus=0 devfn=0x0b: vendor_id=0x8086 device_id=0x7113 PCI: bus=0 devfn=0x10: vendor_id=0x1013 device_id=0x00b8 PCI: bus=0 devfn=0x18: vendor_id=0x10ec device_id=0x8139 PIIX3/PIIX4 init: elcr=00 0c Found 1 cpu(s) max supported 1 cpu(s) MP table addr=0x000fd630 MPC table addr=0x000fd640 size=224 SMBIOS ptr=0x000fd610 table=0x000fd500 size=263 ACPI tables: RSDP=0x000fd4d0 RSDT=0x09ffd7b0 Scan for VGA option rom Running option rom at c000:0003 Turning on vga text mode console SeaBIOS (version 1.6.3) Found 1 lpt ports Found 1 serial ports ATA controller 1 at 1f0/3f4/0 (irq 14 dev 9) ATA controller 2 at 170/374/0 (irq 15 dev 9) ata0-0: QEMU HARDDISK ATA-7 Hard-Disk (2014 MiBytes) Searching bootorder for: /pci@i0cf8/*@1,1/drive@0/disk@0 DVD/CD [ata1-0: QEMU DVD-ROM ATAPI-4 DVD/CD] Searching bootorder for: /pci@i0cf8/*@1,1/drive@1/disk@0 PS2 keyboard initialized All threads complete. Scan for option roms Running option rom at c900:0003 pmm call arg1=1 pmm call arg1=0 pmm call arg1=1 pmm call arg1=0 Searching bootorder for: /pci@i0cf8/*@3 Searching bootorder for: /rom(a)genroms/vapic.bin drive 0x000fd480: PCHS=4092/16/63 translation=large LCHS=1023/64/63 s=4124736 Running option rom at ca00:0003 ebda moved from 9fc00 to 9f400 Returned 53248 bytes of ZoneHigh e820 map has 7 items: 0: 0000000000000000 - 000000000009f400 = 1 RAM 1: 000000000009f400 - 00000000000a0000 = 2 RESERVED 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED 3: 0000000000100000 - 0000000009ffd000 = 1 RAM 4: 0000000009ffd000 - 000000000a000000 = 2 RESERVED 5: 00000000feffc000 - 00000000ff000000 = 2 RESERVED 6: 00000000fffc0000 - 0000000100000000 = 2 RESERVED enter handle_19: NULL Booting from Hard Disk... Booting from 0000:7c00 pnp call arg1=5 pnp call arg1=40 Process stopped

1 0

Searching for an MS-DOS CD driver
by nap 24 May '12

24 May '12

My old W98SE box has died of a rough handling, but the HDD has survived the crash. For continuity of service and fun, I have chosen to try to use QEMU, with SeaBIOS. As a validation try, I have created an image of FreeDOS1.1 without any problem. Next I booted an image of the HDD. All is going fine, but the MS-DOS of W98SE is not able to access the installation CD of W98SE needed to adjust to the new hardware configuration because of the absence of a proper driver. SeaBIOS is able to access a CD drive. So my question is: Do you know if there exist some MS-DOS W98SE CD driver using the SeaBIOS CD service ? Configuration: Asrock H77M+G840+8Go, Gentoo/Linux stable amd64 (x86_64) Gnome qemu-kvm-1.0.1

4 3

Re: [SeaBIOS] Searching for an MS-DOS CD driver
by Kevin O'Connor 23 May '12

23 May '12

Re-adding the mailing list. On Wed, May 23, 2012 at 01:21:47PM +0200, nap wrote: > Le 23/05/2012 02:51, Kevin O'Connor a écrit : > > On Tue, May 22, 2012 at 11:30:54PM +0200, nap wrote: > >> My old W98SE box has died of a rough handling, but the HDD has survived > >> the crash. > >> For continuity of service and fun, I have chosen to try to use QEMU, > >> with SeaBIOS. > >> As a validation try, I have created an image of FreeDOS1.1 without any > >> problem. > >> Next I booted an image of the HDD. All is going fine, but the MS-DOS of > >> W98SE > >> is not able to access the installation CD of W98SE needed to adjust to > >> the new hardware configuration because of the absence of a proper driver. > >> SeaBIOS is able to access a CD drive. So my question is: > >> Do you know if there exist some MS-DOS W98SE CD driver using the SeaBIOS > >> CD service ? > >> > >> Configuration: > >> Asrock H77M+G840+8Go, Gentoo/Linux stable amd64 (x86_64) Gnome > >> qemu-kvm-1.0.1 > > > > I'm not that familiar with DOS drivers. You could try asking on the > > freedos mailing list. You could also try running seabios with > > "-chardev stdio,id=seabios -device > > isa-debugcon,iobase=0x402,chardev=seabios" and see if any interesting > > debug messages come up. Finally, one could recompile seabios with > > higher debug levels to try and track down which calls aren't working > > (if you suspect msdos should be seeing the cdrom). > > > > -Kevin > > > > I do not think there is any seabios problem. > > My current understanding is based on the following web page: > > http://support.microsoft.com/kb/135174 > My current understanding is the following: > - Because the product key is on the HDD where W98SE is installed, > - I have to boot from the HDD where W98SE is installed, > - W98SE recognize a case of hardware upgrade, > - it switch to MS-DOS mode, waiting for the upgrade command, > - that is executing the the installation CD, > - the current MSCDEX driver does not found the CD drive, > So: > - I have to install a MSCDEX driver able to handle QEMU/SeaBIOS > > -Nap That last part is what's confusing me. QEMU should be adding a standard IDE cdrom. That type of cdrom has been around for a long time. You might want to try with just qemu (instead of kvm). Also, if you still can't figure it out, you could try posting your command line and the debug log produced by the commands I sent above. The folks on the qemu list may be able to help as well. -Kevin

3 2

[PATCH] Allow optionroms and "low mem" to share space.
by Kevin O'Connor 21 May '12

21 May '12

Allow both optionroms and "low mem" allocations to use the e-segment. (Space is allocated on a "first come, first serve" basis). This allows more flexibility in resource assignment. Also, allow the "low mem" area to use a full 64K. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/config.h | 1 - src/optionroms.c | 74 +++++++++++++++++++++++++++++++++------------------ src/pmm.c | 47 ++++++++++++++++++++++++--------- src/shadow.c | 5 ++- src/util.h | 4 ++- tools/layoutrom.py | 2 + 6 files changed, 90 insertions(+), 43 deletions(-) diff --git a/src/config.h b/src/config.h index 23591b9..3a70867 100644 --- a/src/config.h +++ b/src/config.h @@ -38,7 +38,6 @@ #define BUILD_ROM_START 0xc0000 #define BUILD_BIOS_ADDR 0xf0000 #define BUILD_BIOS_SIZE 0x10000 -#define BUILD_LOWMEM_SIZE 0x8000 #define BUILD_EXTRA_STACK_SIZE 0x800 // 32KB for shadow ram copying (works around emulator deficiencies) #define BUILD_BIOS_TMP_ADDR 0x30000 diff --git a/src/optionroms.c b/src/optionroms.c index 5ce8af8..3ef0d3c 100644 --- a/src/optionroms.c +++ b/src/optionroms.c @@ -18,8 +18,6 @@ // The end of the last deployed rom. u32 RomEnd = BUILD_ROM_START; -// The maximum memory location a rom may extend to. -u32 RomTop; /**************************************************************** @@ -118,17 +116,13 @@ get_pci_rom(struct rom_header *rom) return pd; } -// Return the memory position up to which roms may be located. -static inline u32 max_rom(void) { - return RomTop; -} - // Copy a rom to its permanent location below 1MiB static struct rom_header * copy_rom(struct rom_header *rom) { u32 romsize = rom->size * 512; - if (RomEnd + romsize > max_rom()) { + int ret = rom_reserve(RomEnd + romsize); + if (ret) { // Option rom doesn't fit. warn_noalloc(); return NULL; @@ -144,15 +138,29 @@ static int init_optionrom(struct rom_header *rom, u16 bdf, int isvga) { if (! is_valid_rom(rom)) - return -1; + goto fail; + int ret = rom_reserve((u32)rom + rom->size * 512); + if (ret) { + warn_noalloc(); + goto fail; + } if (isvga || get_pnp_rom(rom)) // Only init vga and PnP roms here. callrom(rom, bdf); - RomEnd = (u32)rom + ALIGN(rom->size * 512, OPTION_ROM_ALIGN); + u32 newend = (u32)rom + ALIGN(rom->size * 512, OPTION_ROM_ALIGN); + ret = rom_reserve(newend); + if (ret) { + warn_noalloc(); + goto fail; + } + RomEnd = newend; return 0; +fail: + rom_reserve(RomEnd); + return -1; } #define RS_PCIROM (1LL<<33) @@ -180,6 +188,23 @@ getRomPriority(u64 *sources, struct rom_header *rom, int instance) * Roms in CBFS ****************************************************************/ +static struct rom_header * +deploy_romfile(u32 file) +{ + u32 size = romfile_size(file); + int ret = rom_reserve(RomEnd + size); + if (ret) { + warn_noalloc(); + return NULL; + } + ret = romfile_copy(file, (void*)RomEnd, size); + if (ret <= 0) { + rom_reserve(RomEnd); + return NULL; + } + return (void*)RomEnd; +} + // Check if an option rom is at a hardcoded location or in CBFS. static struct rom_header * lookup_hardcode(struct pci_device *pci) @@ -187,11 +212,10 @@ lookup_hardcode(struct pci_device *pci) char fname[17]; snprintf(fname, sizeof(fname), "pci%04x,%04x.rom" , pci->vendor, pci->device); - int ret = romfile_copy(romfile_find(fname), (void*)RomEnd - , max_rom() - RomEnd); - if (ret <= 0) - return NULL; - return (void*)RomEnd; + u32 file = romfile_find(fname); + if (file) + return deploy_romfile(file); + return NULL; } // Run all roms in a given CBFS directory. @@ -203,9 +227,8 @@ run_file_roms(const char *prefix, int isvga, u64 *sources) file = romfile_findprefix(prefix, file); if (!file) break; - struct rom_header *rom = (void*)RomEnd; - int ret = romfile_copy(file, rom, max_rom() - RomEnd); - if (ret > 0) { + struct rom_header *rom = deploy_romfile(file); + if (rom) { setRomSource(sources, rom, file); init_optionrom(rom, 0, isvga); } @@ -343,7 +366,7 @@ optionrom_setup(void) if (CONFIG_OPTIONROMS_DEPLOYED) { // Option roms are already deployed on the system. u32 pos = RomEnd; - while (pos < max_rom()) { + while (pos < rom_get_top()) { int ret = init_optionrom((void*)pos, 0, 0); if (ret) pos += OPTION_ROM_ALIGN; @@ -403,6 +426,7 @@ optionrom_setup(void) static int S3ResumeVgaInit; int ScreenAndDebug; +struct rom_header *VgaROM; // Call into vga code to turn on console. void @@ -423,7 +447,7 @@ vga_setup(void) init_optionrom((void*)BUILD_ROM_START, 0, 1); } else { // Clear option rom memory - memset((void*)RomEnd, 0, max_rom() - RomEnd); + memset((void*)RomEnd, 0, rom_get_top() - RomEnd); // Find and deploy PCI VGA rom. struct pci_device *pci; @@ -439,12 +463,11 @@ vga_setup(void) run_file_roms("vgaroms/", 1, NULL); } - if (RomEnd == BUILD_ROM_START) { + if (RomEnd == BUILD_ROM_START) // No VGA rom found - RomEnd += OPTION_ROM_ALIGN; return; - } + VgaROM = (void*)BUILD_ROM_START; enable_vga_console(); } @@ -453,8 +476,7 @@ s3_resume_vga_init(void) { if (!S3ResumeVgaInit) return; - struct rom_header *rom = (void*)BUILD_ROM_START; - if (! is_valid_rom(rom)) + if (!VgaROM || ! is_valid_rom(VgaROM)) return; - callrom(rom, 0); + callrom(VgaROM, 0); } diff --git a/src/pmm.c b/src/pmm.c index 1648bf2..9d3ce4b 100644 --- a/src/pmm.c +++ b/src/pmm.c @@ -162,9 +162,13 @@ findLast(struct zone_s *zone) /**************************************************************** - * Setup + * 0xc0000-0xf0000 management ****************************************************************/ +static struct allocinfo_s *RomBase; + +#define OPROM_HEADER_RESERVE 16 + // Return start of code in 0xc0000-0xf0000 space. static inline u32 lowmemend(void) { extern u8 code32flat_start[], code32init_end[]; @@ -172,7 +176,29 @@ static inline u32 lowmemend(void) { return end > BUILD_BIOS_ADDR ? BUILD_BIOS_ADDR : end; } -#define OPROM_HEADER_RESERVE 16 +// Return the memory position up to which roms may be located. +u32 rom_get_top(void) +{ + return ALIGN_DOWN((u32)RomBase->allocend - OPROM_HEADER_RESERVE + , OPTION_ROM_ALIGN); +} + +// Request space for an optionrom in 0xc0000-0xf0000 area. +int rom_reserve(u32 addr) +{ + u32 newend = ALIGN(addr, OPTION_ROM_ALIGN) + OPROM_HEADER_RESERVE; + if (newend > (u32)RomBase->allocend) + return -1; + if (newend < (u32)_datalow_base + OPROM_HEADER_RESERVE) + newend = (u32)_datalow_base + OPROM_HEADER_RESERVE; + RomBase->data = RomBase->dataend = (void*)newend; + return 0; +} + + +/**************************************************************** + * Setup + ****************************************************************/ void malloc_setup(void) @@ -204,9 +230,8 @@ malloc_setup(void) // Populate other regions addSpace(&ZoneTmpLow, (void*)BUILD_STACK_ADDR, (void*)BUILD_EBDA_MINIMUM); addSpace(&ZoneFSeg, BiosTableSpace, &BiosTableSpace[CONFIG_MAX_BIOSTABLE]); - u32 lowend = lowmemend(); - RomTop = ALIGN_DOWN(lowend-BUILD_LOWMEM_SIZE, OPTION_ROM_ALIGN); - addSpace(&ZoneLow, (void*)RomTop + OPROM_HEADER_RESERVE, (void*)lowend); + addSpace(&ZoneLow, _datalow_base + OPROM_HEADER_RESERVE, (void*)lowmemend()); + RomBase = findLast(&ZoneLow); if (highram) { addSpace(&ZoneHigh, (void*)highram , (void*)highram + CONFIG_MAX_HIGHTABLE); @@ -246,14 +271,10 @@ malloc_finalize(void) // Place an optionrom signature around used low mem area. struct allocinfo_s *info = findLast(&ZoneLow); - u32 base = BUILD_BIOS_ADDR; - if (info && info->allocend < (void*)BUILD_BIOS_ADDR) { - base = ALIGN_DOWN((u32)info->allocend - OPROM_HEADER_RESERVE - , OPTION_ROM_ALIGN); - struct rom_header *dummyrom = (void*)base; - dummyrom->signature = OPTION_ROM_SIGNATURE; - dummyrom->size = (BUILD_BIOS_ADDR - base) / 512; - } + u32 base = rom_get_top(); + struct rom_header *dummyrom = (void*)base; + dummyrom->signature = OPTION_ROM_SIGNATURE; + dummyrom->size = (BUILD_BIOS_ADDR - base) / 512; memset((void*)RomEnd, 0, base-RomEnd); dprintf(1, "Space available for UMB: %08x-%08x\n", RomEnd, base); diff --git a/src/shadow.c b/src/shadow.c index 70f04c5..b2a05c7 100644 --- a/src/shadow.c +++ b/src/shadow.c @@ -79,12 +79,13 @@ make_bios_readonly_intel(u16 bdf, u32 pam0) wbinvd(); // Write protect roms from 0xc0000-0xf0000 + u32 romtop = rom_get_top(); int i; for (i=0; i<6; i++) { u32 mem = BUILD_ROM_START + i * 32*1024; u32 pam = pam0 + 1 + i; - if (RomEnd <= mem + 16*1024 || RomTop <= mem + 32*1024) { - if (RomEnd > mem && RomTop > mem + 16*1024) + if (RomEnd <= mem + 16*1024 || romtop <= mem + 32*1024) { + if (RomEnd > mem && romtop > mem + 16*1024) pci_config_writeb(bdf, pam, 0x31); break; } diff --git a/src/util.h b/src/util.h index e0e98f0..f600086 100644 --- a/src/util.h +++ b/src/util.h @@ -401,7 +401,7 @@ void call_bcv(u16 seg, u16 ip); void optionrom_setup(void); void vga_setup(void); void s3_resume_vga_init(void); -extern u32 RomEnd, RomTop; +extern u32 RomEnd; extern int ScreenAndDebug; // bootsplash.c @@ -420,6 +420,8 @@ void pnp_setup(void); // pmm.c extern struct zone_s ZoneLow, ZoneHigh, ZoneFSeg, ZoneTmpLow, ZoneTmpHigh; +u32 rom_get_top(void); +int rom_reserve(u32 addr); void malloc_setup(void); void malloc_fixupreloc(void); void malloc_finalize(void); diff --git a/tools/layoutrom.py b/tools/layoutrom.py index 1ae7c83..74b410f 100755 --- a/tools/layoutrom.py +++ b/tools/layoutrom.py @@ -363,6 +363,7 @@ def writeLinkerScripts(li, entrysym, genreloc, out16, out32seg, out32flat): out = outXRefs(sections32all) + """ %s = 0x%x ; _reloc_min_align = 0x%x ; + _datalow_base = 0x%x ; _datalow_min_align = 0x%x ; code32flat_start = 0x%x ; @@ -383,6 +384,7 @@ def writeLinkerScripts(li, entrysym, genreloc, out16, out32seg, out32flat): } :text """ % (entrysym.name, entrysympos, li.sec32init_align, + li.datalow_base, li.sec32low_align, sec32all_start, relocstr, -- 1.7.6.5

1 0

[PATCHv2 0/9] Update low-memory allocations - avoid using 9-segment.
by Kevin O'Connor 20 May '12

20 May '12

This patch series updates the SeaBIOS' low-memory allocation scheme so that it no longer uses the EBDA or the 9-segment for internal low memory allocations. Instead, the e-segment is used where SeaBIOS requires read/writable "low" memory. There is now plenty of space in the e-segment (there has been ever since SeaBIOS was updated to relocate its initialization code), while using 9-segment space can reserve the memory from OS use (in particular on older operating systems). Also, using the 9-segment (and indirectly the EBDA) is more fragile as it requires handling of a relocatable EBDA. As a result of this change, SeaBIOS will be able to allocate larger amounts of low-memory. Indeed, the size of the "extra stack" for 16bit code is increased from 512 bytes to 2K in this series. Changes in v2: * Fixed ehci error resulting from changes to stack alignment * Introduce new GET/SET_LOW and GET/SET_LOWFLAT macros (which mirror GET_GLOBAL and GET_GLOBALFLAT) which produce better 16bit code. -Kevin Kevin O'Connor (9): Use the e-segment instead of the 9-segment for bios "low mem". Add mechanism to declare variables as "low mem" and use for extra stack. Convert timer code EBDA variables to VARLOW variables. Convert boot code EBDA variables to VARLOW variables. Convert ps2 code EBDA variables to VARLOW variables. Convert USB keyboard code EBDA variables to VARLOW variables. Convert disk code EBDA variables to VARLOW variables. EBDA cleanups. Convert GET/SET_FLATPTR() accesses to "low mem" to GET/SET_LOWFLAT(). src/acpi.c | 2 +- src/ahci.c | 2 +- src/asm-offsets.c | 8 -- src/ata.c | 7 +- src/biosvar.h | 100 ++++------------ src/block.c | 5 +- src/blockcmd.h | 2 + src/boot.c | 19 ++-- src/bootsplash.c | 1 - src/cdrom.c | 84 +++++++------- src/clock.c | 32 +++--- src/config.h | 2 + src/coreboot.c | 3 +- src/disk.c | 75 +++++------- src/disk.h | 38 ++++++- src/memmap.c | 2 +- src/mouse.c | 31 +++--- src/mtrr.c | 2 +- src/optionroms.c | 14 +-- src/pcibios.c | 2 +- src/pciinit.c | 3 +- src/pirtable.c | 2 +- src/pmm.c | 116 ++++------------- src/post.c | 50 ++++++-- src/ps2port.c | 19 ++-- src/romlayout.S | 8 +- src/shadow.c | 4 +- src/smbios.c | 1 - src/stacks.c | 15 ++- src/types.h | 4 + src/usb-ehci.c | 40 +++--- src/usb-hid.c | 17 ++- src/usb-ohci.c | 26 ++-- src/usb-uhci.c | 43 +++---- src/util.h | 3 +- src/xen.h | 3 +- tools/layoutrom.py | 349 +++++++++++++++++++++++++++++----------------------- 37 files changed, 551 insertions(+), 583 deletions(-) -- 1.7.6.5

1 9

Re: [SeaBIOS] [PATCH 1/6] remove iasl-generated hex files from git repo
by Kevin O'Connor 18 May '12

18 May '12

On Wed, May 16, 2012 at 02:53:24PM -0600, Marc Jones wrote: > I think that this is a good idea. I think that I am hitting a problem > with incompatible .hex and iasl versions. > I am having problem with commit 15952a : Revert "Fix 64bit PCI issues > on Windows" and I am using the coreboot crosstools iasl. > > > Intel ACPI Component Architecture > ASL Optimizing Compiler version 20110922-64 [Mar 2 2012] > Copyright (c) 2000 - 2011 Intel Corporation > > ASL Input: /home/marc/devel/coreboot/build/seabios/out/ssdt-proc.dsl.i > - 36 lines, 765 bytes, 8 keywords > AML Output: /home/marc/devel/coreboot/build/seabios/out/ssdt-proc.aml > - 120 bytes, 6 named objects, 2 executable opcodes > Listing File: /home/marc/devel/coreboot/build/seabios/out/ssdt-proc.lst > - 2956 bytes > Hex Dump: /home/marc/devel/coreboot/build/seabios/out/ssdt-proc.hex > - 1492 bytes > > Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 0 Optimizations > /home/marc/devel/coreboot/build/seabios/out/ssdt-pcihp.dsl.i 21: > Method (_EJ0, 1) { Return(PCEJ(0x01)) } Name (_SUN, 0x01) } > Warning 1099 - Reserved > method should not return a value ^ (_EJ0) > > /home/marc/devel/coreboot/build/seabios/out/ssdt-pcihp.dsl.i 26: > Method (_EJ0, 1) { Return(PCEJ(0x02)) } Name (_SUN, 0x02) } > Warning 1099 - Reserved > method should not return a value ^ (_EJ0) > > ... > > The build passes with my distro toolchain version: ASL Optimizing > Compiler version 20100528 [Oct 15 2010] > > It seems that this might be a problem with the .hex files being > generated by a different version of IASL. Just building the .hex file > seems to fix this. The hex file is just C code that defines an array, so it can't be the cause of any iasl errors. I'm not sure what would cause these errors, but can you confirm the error is still there after a "make clean". If so, you can email me a tar of your tree (including the out/ directory) and I'll try to take a look. -Kevin

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