Dear SeaBIOS folks,
on LinuxTag 2014 the OpenMandriva project [1] gave away USB flash
storage devices with OpenMandriva installed for live booting. Testing it
out on the ASRock E350M1 with coreboot and SeaBIOS payload it was not
detected by SeaBIOS, meaning pressing F12 it was not listed in the boot
options.
Rebooting the system by pressing Ctrl + Alt + Del the USB device was
recognized by SeaBIOS and listed in the boot menu.
I am still able to reproduce this with SeaBIOS build from master. Please
find the coreboot and SeaBIOS logs attached.
Thanks,
Paul
[1] http://openmandriva.org/
We expect to use the space between the top of option ROMs and the bottom
of our own BIOS code as a stack. OVMF was previously marking the whole
region from 0xC0000 to 0xFFFFF read-only before invoking our Legacy16Boot
method. Read-only stack considered harmful.
Version 0.98 of the CSM spec adds the UmaAddress and UmaSize fields, which
allow the CSM to specify a memory region that needs to be writable.
There exists CONFIG_MALLOC_UPPERMEMORY which we could turn off to use
the 9-segment, but that isn't particularly useful for the CSM case
either because that memory isn't ours to play with until the final
Legacy16Boot call. There's a LowPmmMemory given to use by UEFI to play
with, but that's right in the *middle* of low memory and using that for
persistent allocations would be painful. So just require
CONFIG_MALLOC_UPPERMEMORY when building a CSM.
Signed-off-by: David Woodhouse <David.Woodhouse(a)intel.com>
---
v2: Require CONFIG_MALLOC_UPPERMEMORY. Default UmaAddress to &zonelow_base.
src/Kconfig | 2 +-
src/fw/csm.c | 6 +++++-
src/std/LegacyBios.h | 20 ++++++++++++++++++++
3 files changed, 26 insertions(+), 2 deletions(-)
diff --git a/src/Kconfig b/src/Kconfig
index a42ab2d..093075c 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -114,7 +114,7 @@ endchoice
the BIOS in 16bit protected mode.
config MALLOC_UPPERMEMORY
- bool "Allocate memory that needs to be in first Meg above 0xc0000"
+ bool "Allocate memory that needs to be in first Meg above 0xc0000" if !CSM
default y
help
Use the "Upper Memory Block" area (0xc0000-0xf0000) for
diff --git a/src/fw/csm.c b/src/fw/csm.c
index dfb0d12..4e4b688 100644
--- a/src/fw/csm.c
+++ b/src/fw/csm.c
@@ -34,6 +34,8 @@ EFI_COMPATIBILITY16_TABLE csm_compat_table VARFSEG __aligned(16) = {
.Compatibility16CallOffset = 0 /* Filled in by checkrom.py */,
.OemIdStringPointer = (u32)"SeaBIOS",
.AcpiRsdPtrPointer = (u32)&csm_rsdp,
+ .UmaAddress = (u32)&zonelow_base,
+ .UmaSize = 0x10000,
};
EFI_TO_COMPATIBILITY16_INIT_TABLE *csm_init_table;
@@ -46,9 +48,11 @@ extern void __csm_return(struct bregs *regs) __noreturn;
static void
csm_return(struct bregs *regs)
{
- dprintf(3, "handle_csm returning AX=%04x\n", regs->ax);
+ u32 top = rom_get_max();
PICMask = pic_irqmask_read();
+ csm_compat_table.UmaAddress = top;
+ csm_compat_table.UmaSize = 0xf0000 - top;
__csm_return(regs);
}
diff --git a/src/std/LegacyBios.h b/src/std/LegacyBios.h
index cf0c3c5..5170c37 100644
--- a/src/std/LegacyBios.h
+++ b/src/std/LegacyBios.h
@@ -228,6 +228,26 @@ typedef struct {
/// Maximum PCI bus number assigned.
///
UINT8 LastPciBus;
+
+ ///
+ /// Start address of UMB RAM
+ ///
+ UINT32 UmaAddress;
+
+ ///
+ /// Size of UMB RAM
+ ///
+ UINT32 UmaSize;
+
+ ///
+ /// Start address of persistent allocation in high (>1MiB) memory
+ ///
+ UINT32 HiPermanentMemoryAddress;
+
+ ///
+ /// Size of persistent allocation in high (>1MiB) memory
+ ///
+ UINT32 HiPermanentMemorySize;
} EFI_COMPATIBILITY16_TABLE;
///
--
1.8.3.1
--
David Woodhouse Open Source Technology Centre
David.Woodhouse(a)intel.com Intel Corporation
On Sat, May 31, 2014 at 12:18:32PM -0400, Kevin O'Connor wrote:
> Change the multi-processor init code to trampoline into 32bit mode on
> each of the additional processors. Implement an atomic lock so that
> each processor performs its initialization serially.
>
> Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net>
> ---
>
> Changed since v2:
> * Use "lock btsl" instead of "lock cmpxchgl" as suggested by Paolo.
> * Enable CPU caching on the APs
> * Report the apic_id in debug messages for each AP
FYI, I did try with the BSP loop in assembler (see below), but it made
the assembler slightly more complex. In theory, the comparison in
assembler would result in less lock contention, but in practice it
doesn't seem to matter. (With a small number of APs it's fast
regardless, and with a large number of APs the contention comes from
all the APs so the addition of the BSP contention is small.)
-Kevin
diff --git a/src/fw/smp.c b/src/fw/smp.c
index 51c0cae..bc5ebaf 100644
--- a/src/fw/smp.c
+++ b/src/fw/smp.c
@@ -123,17 +123,19 @@ smp_setup(void)
// Wait for other CPUs to process the SIPI.
u8 cmos_smp_count = rtc_read(CMOS_BIOS_SMP_COUNT) + 1;
- while (cmos_smp_count != CountCPUs)
asm volatile(
// Release lock and allow other processors to use the stack.
" movl %%esp, %1\n"
" movl $0, %0\n"
// Reacquire lock and take back ownership of stack.
"1:rep ; nop\n"
+ " cmp %3, %2\n"
+ " jne 1b\n"
" lock btsl $0, %0\n"
" jc 1b\n"
: "+m" (SMPLock), "+m" (SMPStack)
- : : "cc", "memory");
+ : "r" (cmos_smp_count), "m" (CountCPUs)
+ : "cc", "memory");
yield();
// Restore memory.
Dear Kevin,
thank you for the patch.
Am Freitag, den 30.05.2014, 21:47 -0400 schrieb Kevin O'Connor:
> Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net>
> ---
> src/stacks.c |
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/stacks.c b/src/stacks.c
> index 6bcb319..beccc0f 100644
> --- a/src/stacks.c
> +++ b/src/stacks.c
> @@ -287,7 +287,7 @@ thread_init(void)
> int
> threads_during_optionroms(void)
> {
> - return CONFIG_THREADS && ThreadControl == 2;
> + return CONFIG_THREADS && ThreadControl == 2 && in_post();
> }
>
> // Switch to next thread stack.
What problem did it cause and on what systems?
Thanks,
Paul
There is no indication that the address 0xff00 is a BIOS standard, so
don't emit the old Bochs copyright string at that fixed address.
Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net>
---
src/misc.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/src/misc.c b/src/misc.c
index 6712355..21693fc 100644
--- a/src/misc.c
+++ b/src/misc.c
@@ -181,9 +181,6 @@ struct descloc_s rombios32_gdt_48 VARFSEG = {
* Misc fixed vars
****************************************************************/
-char BiosCopyright[] VAR16FIXED(0xff00) =
- "(c) 2002 MandrakeSoft S.A. Written by Kevin Lawton & the Bochs team.";
-
// BIOS build date
char BiosDate[] VAR16FIXED(0xfff5) = "06/23/99";
--
1.9.3