June 2017 - SeaBIOS - mail.coreboot.org

[PATCH 0/2] scsi: fixes and improvements to bus scan
by Paolo Bonzini Sept. 27, 2017

Sept. 27, 2017

The first patch fixes a regression where many disks on a single SCSI target could prevent LUN0 from booting on another target. The second patch then exploits the new scanning algorithm to speed up the bus scan on virtio-scsi, which has a higher limit for the target than the other adaptors and therefore was slowed down the most. Paolo Bonzini (2): scsi: ensure LUN0 is added first virtio-scsi: speed up SCSI bus scan src/hw/blockcmd.c | 6 ++++-- src/hw/esp-scsi.c | 10 ++++++++-- src/hw/lsi-scsi.c | 10 ++++++++-- src/hw/mpt-scsi.c | 10 ++++++++-- src/hw/usb-uas.c | 1 + src/hw/virtio-scsi.c | 46 ++++++++++++++++++++++++++++++++++++++-------- 6 files changed, 67 insertions(+), 16 deletions(-) -- 2.13.0

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[PATCH 0/3] SeaVGABIOS serial console test
by Kevin O'Connor Sept. 5, 2017

Sept. 5, 2017

Hi Gerd, I was curious to see what the "sercon" stuff would look like in SeaVGABIOS instead of in SeaBIOS. So, I put together a quick prototype. The code is also at: https://github.com/KevinOConnor/seabios/tree/testing This is just a proof-of-concept thing - I didn't implement any of the useful features you have in your series. Specifically, it doesn't unclutter the serial output, doesn't implement cp437 translations, and doesn't handle multi-byte input. It does does have basic input, output, and split-output handling though. I'm not sure if this is better than a SeaBIOS implementation. I suspect it will be easier to handle vga quirks this way. However, handling exotic serial outputs (eg, mmio and usb based) would be better suited in SeaBIOS. Thoughts? -Kevin Kevin O'Connor (3): sercon: Initial support for VGA emulation over serial port sercon: Add basic keyboard input support sercon: Support "split output" mode Makefile | 2 +- vgasrc/Kconfig | 6 + vgasrc/sercon.c | 356 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ vgasrc/vgabios.c | 15 ++- vgasrc/vgabios.h | 5 + vgasrc/vgaentry.S | 7 ++ vgasrc/vgahw.h | 72 ++++++++++- vgasrc/vgainit.c | 12 +- vgasrc/vgautil.h | 24 ++++ 9 files changed, 482 insertions(+), 17 deletions(-) create mode 100644 vgasrc/sercon.c -- 2.5.5

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[PATCH] boot: Increase description size in boot menu
by Kevin O'Connor Aug. 24, 2017

Aug. 24, 2017

Increase the boot menu description size so that menu items up to 80 characters display without truncation. Reported-by: Rene Shuster <rene.shuster(a)bcsemail.org> Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/boot.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/boot.c b/src/boot.c index 706b7df..59623fb 100644 --- a/src/boot.c +++ b/src/boot.c @@ -482,7 +482,7 @@ interactive_bootmenu(void) int maxmenu = 0; struct bootentry_s *pos; hlist_for_each_entry(pos, &BootList, node) { - char desc[60]; + char desc[77]; maxmenu++; printf("%d. %s\n", maxmenu , strtcpy(desc, pos->description, ARRAY_SIZE(desc))); -- 2.5.5

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[PATCH] ahci: Disable Native Command Queueing
by Zeh, Werner June 23, 2017

June 23, 2017

The AHCI driver currently sets the NCQ bit for every command that is issued to the SATA drive. This is not needed as there is always only one command active at a time and in turn can lead to a hanging AHCI controller (true for Marvel 88SE9170). The following patch disables the usage of NCQ completely. With this patch the Marvel AHCI controller works just fine without any issues. Werner diff --git a/src/hw/ahci.c b/src/hw/ahci.c index 2eee192..b9043b9 100644 --- a/src/hw/ahci.c +++ b/src/hw/ahci.c @@ -130,7 +130,6 @@ static int ahci_command(struct ahci_port_s *port_gf, int iswrite, int isatapi, intbits = ahci_port_readl(ctrl, pnr, PORT_IRQ_STAT); if (intbits) ahci_port_writel(ctrl, pnr, PORT_IRQ_STAT, intbits); - ahci_port_writel(ctrl, pnr, PORT_SCR_ACT, 1); ahci_port_writel(ctrl, pnr, PORT_CMD_ISSUE, 1); u32 end = timer_calc(AHCI_REQUEST_TIMEOUT);

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Re: [SeaBIOS] Seabios can only detect one disk when two disks are attached to one scsi controller
by Gerd Hoffmann June 16, 2017

June 16, 2017

Hi, > <address type='drive' controller='0' bus='0' target='0' unit='0'/> > <address type='drive' controller='0' bus='0' target='0' unit='1'/> Fixed in master branch (added lun support), no release yet with that. For released versions you can use "target='1' unit='0'" as address, so the disk is attached as separate target not as lun. cheers, Gerd

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How to run AHCI option rom in Seabios?
by Аладышев Константин June 15, 2017

June 15, 2017

I'm trying to enable SATA hotplug (in OS) feature on my board. And one of my attempts is to run AHCI option rom from original BIOS. I use coreboot/seabios bundle with seabios responsible for option ROM execution. And I stuck with a problem, that seabios doesn't want to run ROM on SATA controllers cause of pci->have_driver check: optionroms.c : // Find and deploy PCI roms. struct pci_device *pci; foreachpci(pci) { if (pci->class == PCI_CLASS_DISPLAY_VGA || pci->have_driver) continue; init_pcirom(pci, 0, sources); } : ata.c: :. // Handle controllers on an ATA PCI device. static void init_pciata(struct pci_device *pci, u8 prog_if) { pci->have_driver = 1; :. So, what is a proper way to run roms like AHCI on SATA controllers? (in my case SATA controller is embedded device in southbridge)

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Seabios can only detect one disk when two disks are attached to one scsi controller
by fengyd June 14, 2017

June 14, 2017

Hi, Two disks are configured and attached to on scsi controller, but only on disk can be detected by seabios. </disk> <disk type='block' device='disk'> <driver name='qemu' type='raw' cache='none' io='native'/> <source dev='/dev/disk/by-path/ip-192.168.13.7:3260-iscsi-iqn.2010-10.org.openstack:volume-7b894c9d-fe25-4ee4-96fa-2b5947f7758f-lun-0'/> <target dev='sda' bus='scsi'/> <serial>7b894c9d-fe25-4ee4-96fa-2b5947f7758f</serial> <address type='drive' controller='0' bus='0' target='0' unit='0'/> </disk> <disk type='block' device='disk'> <driver name='qemu' type='raw' cache='none' io='native'/> <source dev='/dev/disk/by-path/ip-192.168.13.7:3260-iscsi-iqn.2010-10.org.openstack:volume-6d75e7b8-39b2-4209-9fe9-b2de953a7e01-lun-0'/> <target dev='sdb' bus='scsi'/> <serial>6d75e7b8-39b2-4209-9fe9-b2de953a7e01</serial> <address type='drive' controller='0' bus='0' target='0' unit='1'/> </disk> <controller type='usb' index='0'> <address type='pci' domain='0x0000' bus='0x00' slot='0x01' function='0x2'/> </controller> <controller type='pci' index='0' model='pci-root'/> <controller type='scsi' index='0'> <address type='pci' domain='0x0000' bus='0x00' slot='0x08' function='0x0'/> </controller> Could you help check it? Thanks in advance. BR. Yafeng

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Re: [SeaBIOS] [PATCH] boot: boot menu up to 35 devices with letters and possible pages
by Kevin O'Connor June 13, 2017

June 13, 2017

On Sun, Jun 11, 2017 at 12:41:22AM +0300, Ivan Ivanov wrote: > Extend boot menu: make it possible to select the boot menu entries > with ID larger than 10 by pressing a corresponding letter key. If > there are more than 18 devices, then a boot menu splits into two > pages; you can switch between the pages by pressing the ENTER key. > NOTE: now to access the TPM you need to press the M key. It makes more > sense, because Trusted is adjective while Module is noun - and adds > more convenience, because M letter is at the end of keyboard's 3rd row > of letters, not in the middle of them Thanks. Can you describe a real-world situation where one would have more than 10 boot devices and one would be using the boot menu? -Kevin

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Re: [SeaBIOS] [PATCH] hw/nvme: Enable NVMe support for non-qemu hardware
by Kevin O'Connor June 12, 2017

June 12, 2017

On Mon, Jun 12, 2017 at 05:53:24PM -0600, Youness Alaoui wrote: > I submitted this a while back (April 25th) here : > https://review.coreboot.org/#/c/19443/ > And I was just told that it wasn't the right place for it! So I'm > sending you an updated patch to enable NVMe. > I noticed that this was already submitted on May 10th by Kevin > O'Connor (https://mail.coreboot.org/pipermail/seabios/2017-May/011356.html) > but the patch was incomplete, so I've updated mine to mention it. > Patch is inlined below for review. Thanks. I committed this. -Kevin

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[PATCH] hw/nvme: Enable NVMe support for non-qemu hardware
by Youness Alaoui June 12, 2017

June 12, 2017

I submitted this a while back (April 25th) here : https://review.coreboot.org/#/c/19443/ And I was just told that it wasn't the right place for it! So I'm sending you an updated patch to enable NVMe. I noticed that this was already submitted on May 10th by Kevin O'Connor (https://mail.coreboot.org/pipermail/seabios/2017-May/011356.html) but the patch was incomplete, so I've updated mine to mention it. Patch is inlined below for review. Thanks! Youness. ---- >From ff8e3f40cbf5a4cc6035635ae23462505265a74a Mon Sep 17 00:00:00 2001 From: Youness Alaoui <youness.alaoui(a)puri.sm> Date: Tue, 25 Apr 2017 11:21:05 -0400 Subject: [PATCH] hw/nvme: Enable NVMe support for non-qemu hardware NVMe support was tested on purism/librem13 laptops and SeaBIOS has no problems in detecting and booting the drives. This is a continuation of commit 235a8190 which was incomplete. Signed-off-by: Youness Alaoui <youness.alaoui(a)puri.sm> --- src/hw/nvme.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/hw/nvme.c b/src/hw/nvme.c index 1c2bce5..11583ad 100644 --- a/src/hw/nvme.c +++ b/src/hw/nvme.c @@ -599,7 +599,7 @@ nvme_cmd_readwrite(struct nvme_namespace *ns, struct disk_op_s *op, int write) int nvme_process_op(struct disk_op_s *op) { - if (!CONFIG_NVME || !runningOnQEMU()) + if (!CONFIG_NVME) return DISK_RET_SUCCESS; struct nvme_namespace *ns = container_of(op->drive_gf, struct nvme_namespace, -- 2.4.11

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