SeaBIOS February 2021

seabios@seabios.org

7 participants
11 discussions

[PATCH v3 0/5] Make seabios linkable with lld

by Fangrui Song

This patch series make seabios linkable with lld. This is beneficial for FreeBSD ports as well https://svnweb.freebsd.org/ports/head/misc/seabios/Makefile as they can drop an LLD_UNSAFE As a maintainer of lld ELF, I have triaged numerous pieces of software. seabios is the only one making use of This drops the only instance https://sourceware.org/bugzilla/show_bug.cgi?id=12726 1, 2, 3 and 4 are really independent and can be applied in arbitrary order. 5 depends on 4. I originally combined 4 and 5 and that was why I don't think a patch series made sense. Fangrui Song (5): romlayout.S: Add missing SHF_ALLOC flag to .fixedaddr.\addr Make rom16.o linkable with lld Makefile: Change ET_EXEC to ET_REL so that lld can link bios.bin.elf romlayout32flag.lds: Use `. +=` instead of `. =` test-build.sh: Delete unneeded LD capability test Makefile | 4 ++++ scripts/layoutrom.py | 13 ++++++++++--- scripts/test-build.sh | 42 +----------------------------------------- src/romlayout.S | 2 +- 4 files changed, 16 insertions(+), 45 deletions(-) -- 2.26.0.292.g33ef6b2f38-goog

2 months, 1 week

[PATCH] AHCI: The attached ATA device cannot be detected when binding AHCI controller to Virtual Machine

by RunaGuo-oc＠zhaoxin.com

When binding AHCI controller to virtual machine, the attached ATA device cannot be recognized for the following reason: The first Identify PACKET CMD will be failed without dobut which will lead PORT_IRQ_TF_ERR be set in PxIS due to ERR bit set to 1 in D2H Register FIS(PxTFD.STS.ERR=1). In this case, the first CMD will be timeout for seabios only polling PORT_IRQ_D2H_REG_FIS & PORT_IRQ_PIOS_FIS before triggering error handling which leads AHCI controller is an error state, then the second IDENTIFY CMD cannot be issued by AHCI controller, no ATA device will be detected. In AHCI spec HBA Port State Machine section(5.3.8.1 and 5.3.16.5), we can see this sequence: RegFIS:Entry --> ERR:FatalTaskfile (PxTFD.STS.ERR=1) --> ERR:WaitForClear, no entry for PORT_IRQ_D2H_REG_FIS/PORT_IRQ_PIOS_FIS to be set at this time. May be we can also add PORT_IRQ_TF_ERR bit check when polling command completion status? fail log: 02.386: |bffa6000| AHCI/1: link up 02.387: |bffa6000| AHCI/1: send cmd ... 02.387: |bffa7000| phys_free bffa9c00 (detail=0xbffaa320) 02.396: |bffa7000| phys_free bffaa200 (detail=0xbffaa1d0) 02.396: |bffa7000| phys_free bffaa000 (detail=0xbffaa1a0) 02.396: |bffa7000| phys_free bffaa380 (detail=0xbffaa350) 02.400: \bffa7000/ End thread 02.401: phys_free bffa7000 (detail=0xbffaa170) 34.391: |bffa6000| WARNING - Timeout at ahci_command:153! 34.392: |bffa6000| AHCI/1: send cmd ... 66.397: |bffa6000| WARNING - Timeout at ahci_command:153! Signed-off-by: zhaoxin\runaguooc <RunaGuo-oc(a)zhaoxin.com> --- src/hw/ahci.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/src/hw/ahci.c b/src/hw/ahci.c index d45b430..bab5c35 100644 --- a/src/hw/ahci.c +++ b/src/hw/ahci.c @@ -104,7 +104,7 @@ static void ahci_port_writel(struct ahci_ctrl_s *ctrl, u32 pnr, u32 reg, u32 val static int ahci_command(struct ahci_port_s *port_gf, int iswrite, int isatapi, void *buffer, u32 bsize) { - u32 val, status, success, flags, intbits, error; + u32 val, status, success, flags, intbits, error, tf; struct ahci_ctrl_s *ctrl = port_gf->ctrl; struct ahci_cmd_s *cmd = port_gf->cmd; struct ahci_fis_s *fis = port_gf->fis; @@ -148,6 +148,14 @@ static int ahci_command(struct ahci_port_s *port_gf, int iswrite, int isatapi, error = GET_LOWFLAT(fis->rfis[3]); break; } + + if(intbits & PORT_IRQ_TF_ERR){ + tf = ahci_port_readl(ctrl,pnr,PORT_TFDATA); + status = tf & 0xff; + error = tf & 0xff00; + break; + } + } if (timer_check(end)) { warn_timeout(); -- 2.17.1

6 months, 3 weeks

[PATCH 00/31] Add support for PA-RISC CPU target

by Helge Deller

This patchset modifies SeaBIOS source code to be able to build a firmware for the PA-RISC CPU architecture. This firmware can then be used to boot a virtual PA-RISC machine with PA-Linux and HP/UX on QEMU. Where possible existing SeaBIOS drivers and infrastructure is reused. Since PA-RISC is native 32/64-Bit, the various segment accessors are not needed and replaced by simple variable accesses. Helge Deller (31): Add config option for PA-RISC arch biosvar.h: Add accessors for various BIOS data areas Drivers: Use get_bda_ptr() BDA accessor byteorder.h: Add endianess conversion functions farptr.h: Add FLATPTR* accessor functions for parisc font.c: Disable built-in x86 font on parisc paravirt.h: Add PORT_QEMU_CFG_CTL for parisc pciinit.c: Initialize PA-RISC Dino PCI chip shadow.c: Compile int3 inline assembly on x86 only Add portaddr_t typedef to specify I/O port addresses ata.c: Allow to boot on PA-RISC ata.h: Add ATA IDE port addresses for PA-RISC blockcmd.c: Prevent unaligned access crash on PA-RISC scsi: Add fields for specifying target and lun of SCSI devices lsi-scsi.c: Convert SCSI script to little endian pci.c: Add PCI ports for PA-RISC and access PCI bus in little-endian rtc.h: Add CMOS/RTC addresses for PA-RISC serialio.h: Add serial port adresses for PA-RISC malloc.c: Implement a PA-RISC specific malloc() output.c: Add PA-RISC specific output behaviour output.c: Make printf() capable to print 64bit int values romfile.c: return values are returned as little-endian sercon.c: Use SEROFF_IIR constant stacks.h: Provide replacement for thread functions when !CONFIG_THREADS version.c: Mark version strings const x86.h: Provide replacement functions for PA-RISC parisc: Add PA-RISC related code string.c: reimplement mem*_far() functions for PA-RISC boot.c: Add boot disc chooser for PA-RISC block.c: Allow PA-RISC to boot from ATA drives ata.c: Add missing endianess conversion functions Makefile | 9 +- Makefile.parisc | 192 ++++ src/Kconfig | 54 +- src/biosvar.h | 31 + src/block.c | 10 +- src/block.h | 2 + src/boot.c | 48 + src/byteorder.h | 74 ++ src/farptr.h | 14 +- src/font.c | 2 + src/fw/csm.c | 2 +- src/fw/paravirt.h | 7 + src/fw/pciinit.c | 53 +- src/fw/shadow.c | 2 + src/hw/ata.c | 70 +- src/hw/ata.h | 14 +- src/hw/blockcmd.c | 17 +- src/hw/blockcmd.h | 2 +- src/hw/esp-scsi.c | 2 +- src/hw/lsi-scsi.c | 6 +- src/hw/megasas.c | 2 +- src/hw/mpt-scsi.c | 2 +- src/hw/pci.c | 13 +- src/hw/pvscsi.c | 2 +- src/hw/rtc.h | 7 + src/hw/serialio.c | 2 +- src/hw/serialio.h | 10 +- src/hw/usb-msc.c | 2 +- src/hw/usb-uas.c | 2 +- src/hw/virtio-scsi.c | 2 +- src/malloc.c | 4 +- src/malloc.h | 8 +- src/output.c | 56 +- src/parisc/b160l.h | 630 +++++++++++ src/parisc/head.S | 319 ++++++ src/parisc/hppa.h | 370 +++++++ src/parisc/hppa_hardware.h | 49 + src/parisc/lasips2.c | 66 ++ src/parisc/lasips2.h | 17 + src/parisc/malloc.c | 91 ++ src/parisc/pafirmware.lds.S | 69 ++ src/parisc/parisc.c | 1997 +++++++++++++++++++++++++++++++++++ src/parisc/pdc.h | 694 ++++++++++++ src/parisc/sti.c | 179 ++++ src/parisc/sticore.h | 326 ++++++ src/parisc/stirom.c | 652 ++++++++++++ src/parisc/timer.c | 103 ++ src/post.c | 2 +- src/romfile.c | 4 +- src/sercon.c | 2 +- src/serial.c | 4 +- src/stacks.h | 17 +- src/string.c | 27 +- src/types.h | 8 +- src/version.c | 4 +- src/x86.h | 6 + 56 files changed, 6236 insertions(+), 123 deletions(-) create mode 100644 Makefile.parisc create mode 100644 src/parisc/b160l.h create mode 100644 src/parisc/head.S create mode 100644 src/parisc/hppa.h create mode 100644 src/parisc/hppa_hardware.h create mode 100644 src/parisc/lasips2.c create mode 100644 src/parisc/lasips2.h create mode 100644 src/parisc/malloc.c create mode 100644 src/parisc/pafirmware.lds.S create mode 100644 src/parisc/parisc.c create mode 100644 src/parisc/pdc.h create mode 100644 src/parisc/sti.c create mode 100644 src/parisc/sticore.h create mode 100644 src/parisc/stirom.c create mode 100644 src/parisc/timer.c -- 2.29.2

7 months, 2 weeks

[PATCH 1/1] usb-hid: Increase MAX_KBD_EVENT

by seabios＠desire.ch

From: Stefan Ott <stefan(a)ott.net> Some USB keyboards use max packet sizes beyond the current maximum supported by SeaBIOS. This increases the available size to support these keyboards. Signed-off-by: Stefan Ott <stefan(a)ott.net> --- src/hw/usb-hid.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/hw/usb-hid.c b/src/hw/usb-hid.c index a22765b..92c6b19 100644 --- a/src/hw/usb-hid.c +++ b/src/hw/usb-hid.c @@ -56,7 +56,7 @@ struct keyevent { u8 keys[6]; }; -#define MAX_KBD_EVENT 10 +#define MAX_KBD_EVENT 16 static int usb_kbd_setup(struct usbdevice_s *usbdev -- 2.30.1

7 months, 2 weeks

How to boot from DVD/CD automatically, instead of pressing a key by hand?

by Yiguang Chen

Most time, When a vm with seabios start. The bios will display such info: ----- Seabios (version rel-1.13-0 ......) Machine UUID ... IPXE .. IPXE.. Booting from DVD/CD... Press any key to boot from CD or DVD. --- It means that have a bootable cdrom to boot. But If we want to boot from cdrom, we must press any key as what the warning had said. If it is possible to boot from DVD/CD automatically, instead of pressing a key by hand? Looking forward to your feedback, YiguangChen

7 months, 3 weeks

Re: [PATCH 28/31] string.c: reimplement mem*_far() functions for PA-RISC

by Valentine

Hello, Helge! I meant, to use: #ifdef CONFIG_PA_RISC // PA-RISC code #else // x86 code #endif Then if CONFIG_PA_RISC is not defined, the compilation will go as before without the need of toolchain modification. But, of course, you're right, the difference is not that big. Best regards, Valentine.

8 months

Re: [PATCH 28/31] string.c: reimplement mem*_far() functions for PA-RISC

by Valentine

> +#if CONFIG_X86 I understand that Helge adapted sources for PA-RISC, but will not it be more convenient to use#if CONFIG_PA_RISC So that by default SeaBIOS would compile as usual? Best regards,Valentine ---From: Helge DellerDate: 12.02.2021 1:08 (GMT+03:00)Subject: [SeaBIOS] [PATCH 28/31] string.c: reimplement mem*_far() functions for PA-RISC

8 months, 1 week

[PATCH 20/31] output.c: Add PA-RISC specific output behaviour

by Helge Deller

On PA-RISC call an own screenc() implementation which doesn't use int10, prevent the Intel-specific \r newline when printing \n and don't output to serial debug port. Signed-off-by: Helge Deller <deller(a)gmx.de> --- src/output.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/src/output.c b/src/output.c index 0184444..6141fb6 100644 --- a/src/output.c +++ b/src/output.c @@ -18,6 +18,9 @@ #include "stacks.h" // call16_int #include "string.h" // memset #include "util.h" // ScreenAndDebug +#if CONFIG_PARISC +#include "parisc/sticore.h" +#endif struct putcinfo { void (*func)(struct putcinfo *info, char c); @@ -44,7 +47,8 @@ debug_putc(struct putcinfo *action, char c) qemu_debug_putc(c); if (!MODESEGMENT) coreboot_debug_putc(c); - serial_debug_putc(c); + if (!CONFIG_PARISC) + serial_debug_putc(c); } // Flush any pending output to debug port(s). @@ -74,6 +78,7 @@ static struct putcinfo debuginfo = { debug_putc }; static void screenc(char c) { +#if CONFIG_X86 if (!MODESEGMENT && GET_IVT(0x10).segoff == FUNC16(entry_10).segoff) // No need to thunk to 16bit mode if vgabios is not present return; @@ -84,6 +89,9 @@ screenc(char c) br.al = c; br.bl = 0x07; call16_int(0x10, &br); +#else + parisc_screenc(c); +#endif } // Handle a character from a printf request. @@ -92,7 +100,7 @@ screen_putc(struct putcinfo *action, char c) { if (ScreenAndDebug) debug_putc(&debuginfo, c); - if (c == '\n') + if (CONFIG_X86 && c == '\n') screenc('\r'); screenc(c); } -- 2.29.2

8 months, 1 week

PCIe (x4) M.2 slot does not see NVME disks at SeaBIOS boot menu.

by dponamorev＠gmail.com

Hi! Custom motherboard on Intel Atom C3338 with PCIe (x4) M.2 slot does not see NVME disks at SeaBIOS boot menu. (SeaBIOS (version rel-1.13.0-1-g3ab38b1)) Does not load the operating system from these drives. If you boot from another media, then the NVME disk is seen in the system and works fine. In the logs there is a warning at "void *pci_enable_membar" function in the "coreboot/payloads/external/SeaBIOS/seabios/src/hw/pcidevice.c" file line 186. Warning message: WARNING - internal error detected at pci_enable_membar:186! // Verify a memory bar and return it to the caller void * pci_enable_membar(struct pci_device *pci, u32 addr) { wait_preempt(); u32 bar = pci_config_readl(pci->bdf, addr); if (bar & PCI_BASE_ADDRESS_SPACE_IO) { warn_internalerror(); return NULL; } if (bar & PCI_BASE_ADDRESS_MEM_TYPE_64) { u32 high = pci_config_readl(pci->bdf, addr+4); if (high) { dprintf(1, "Can not map memory bar over 4Gig\n"); return NULL; } } bar &= PCI_BASE_ADDRESS_MEM_MASK; if (bar + 4*1024*1024 < 20*1024*1024) { // Bar doesn't look valid (it is in last 4M or first 16M) warn_internalerror(); =========================================>WARNING! return NULL; } pci_config_maskw(pci->bdf, PCI_COMMAND, 0, PCI_COMMAND_MEMORY); pci->have_driver = 1; return (void*)bar; } Some values: for Samsung NVME disk 0x144d:0xa804; bdf: 0x200 bar: 0x4 at (u32 bar = pci_config_readl(pci->bdf, addr)) bar: 0x0 at (bar &= PCI_BASE_ADDRESS_MEM_MASK) have_driver = 0. If you boot from another media, then the NVME disk is seen in the system and works fine. lspci: 02:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd NVMe SSD Controller SM961/PM961 fdisk: Disk /dev/nvme0n1: 232,9 GiB, 250059350016 bytes, 488397168 sectors Units: sectors of 1 * 512 = 512 bytes Sector size (logical/physical): 512 bytes / 512 bytes I/O size (minimum/optimal): 512 bytes / 512 bytes Disklabel type: dos Disk identifier: 0x5107186e Device Boot Start End Sectors Size Id Type /dev/nvme0n1p1 * 2048 1126399 1124352 549M 7 HPFS/NTFS/exFAT /dev/nvme0n1p2 1126400 488394751 487268352 232,4G 7 HPFS/NTFS/exFAT Tried with different NVME drives with different controllers. What could be the reason? Driver needed? Best regards, Dmitry Ponamorev

8 months, 1 week

Possibility to merge the SeaBIOS-parisc tree?

by Helge Deller

Dear SeaBIOS developers, a few years back I forked the SeaBIOS sources to create a SeaBIOS firmware for usage with the parisc/hppa architecture. This fork is on github: https://github.com/hdeller/seabios-hppa Main goal of this fork was to provide a firmware which can be used to boot a virtual parisc machine with qemu. This firmware reuses most of the SeaBIOS/x86 drivers and infrastructure and works quite well today. Now I would prefer to merge back my changes into the official seabios git tree, if people here agree. Of course there are some patches which touches the generic code, e.g. parisc doesn't need segments and uses 32bit addresses for I/O and serial ports, which I've addressed with generic #ifdefs and typedefs, e.g.: #if CONFIG_X86 typedef u16 portaddr_t; #else typedef unsigned int portaddr_t; #endif I think all code can be merged back in a way that it neither affects runtime behaviour, build environment or code generation of x86, which I understand is the most important goal. My main question is now: Do you agree that it's worth and useful to merge the code back in? If so, how should I proceed? Send in first initial patches which could be applied, step by step? Generally I'd prefer if I could work privately with one or two seabios core developers to speed it up too... Just as a *reference*, I've created two patches which show the changes. Those will be then split it up into small logical parts before committing into the SeaBIOS tree: This patch touches only the generic existing seabios code: http://backup.parisc-linux.org/qemu/seabios-short-patch.txt Same patch as above, but including all new files I added to the new "src/parisc" directory: http://backup.parisc-linux.org/qemu/seabios-full-patch.txt Looking forward to your feedback, Helge

8 months, 1 week

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SeaBIOS February 2021