On Sun, Feb 21, 2010 at 04:18:38PM -0700, Brandon Bennett wrote:
> > On Sat, Feb 20, 2010 at 9:05 PM, Kevin O'Connor <kevin(a)koconnor.net> wrote:
> >> Should a kernel fail during boot, I'd suspect it doesn't like one of
> >> the apm/pcibios callbacks, or it doesn't like one of the
> >> smbios/mptable/acpi tables. You could try compiling the SeaBIOS code
> >> (see http://seabios.org/Download ) and increasing the debugging by
> >> modifying src/config.h. Specifically, you could increase
> >> CONFIG_DEBUG_LEVEL, and set DEBUG_HDL_pcibios32 and DEBUG_HDL_apm to
> >> 1. Also, you could try disabling some of the features to see if that
> >> prevents the fault (eg, disabling CONFIG_ACPI / CONFIG_SMBIOS /
> >> CONFIG_MPTABLE).
> >
>
> I have narrowed it down to SMBIOS. If I disable CONFIG_SMBIOS the
> image boots up fine.
Gleb, have you seen this thread?
Some of the recent changes to smbios that look like possible culprits
are:
Make SMBIOS table pass MS SVVP test
Use MaxCountCPUs during building of per cpu tables.
Add malloc_high/fseg() and rework bios table creation to use them.
There were other changes, but the comments indicate they were only
ports of changes already in bochs. I suppose it's also possible the
lack of smbios is turning off some other feature in the guest (eg,
acpi) that's the real culprit.
-Kevin
I have tried SeaBIOS 0.5.1 on Bochs cvs with FreeDOS 1.0 Final boot floppy.
Loading from floppy was utterly slow and then FreeDOS dumped
Invalid Opcode at 0013 0000 0202 800F 01F3 20F4 10AA 10AA 109A 0000 0000 0000 00
00
Bad or missing Command Interpreter: A:\COMMAND.COM A:\ /E:2048 /F /MSG /P=A:\FRE
EDOS\FDAUTO.BAT
Enter the full shell command line:
Bochs log has
00477945139i[BIOS ] Booting from Floppy...
00510608951i[BIOS ] Booting from 0000:7c00
05264161428i[FDD ] controller reset in software
05445136148i[FDD ] controller reset in software
05625186768i[FDD ] controller reset in software
05803824012i[FDD ] controller reset in software
05985259728i[FDD ] controller reset in software
05985285461i[CPU0 ] LOCK prefix unallowed (op1=0x53, attr=0x0, mod=0x0, nnn=0)
Same floppy and Bochs version work fine and fast with Bochs BIOS.
Any clues?
- Sebastian
On Mon, Apr 19, 2010 at 04:34:54PM -0300, Lucas Meneghel Rodrigues wrote:
> After doing some reading it seems to me that the reason why that is not
> happening is because SeaBIOS still doesn't have code to support CPU hot
> plugging as BochsBIOS did.
As I understand it, the hotplug support was only in the kvm copy of
bochs bios. It also limited the number of cpus one could use (I think
16).
The current smp support in SeaBIOS doesn't limit the number of cpus.
So, there has been reluctance to just port the old kvm bios code
forward.
-Kevin
2010/4/12 Gerhard Wiesinger <lists(a)wiesinger.com>:
> Hello,
>
> Checkit reports some problems under DOS:
> 1.) NPU functions are not correct: NPU Trigonometric Functions: FAILED.
> Seems to be a problem of the instruction set.
> 2.) Real-Time Clock Alarm: FAILED (This might be also the reason for the
> KVM problem, see my previous post). Seems to be that real-time clock is not
> working correct.
> 3.) There is also a problem with the reported base memory under QEMM386
> (HIMEM.SYS and EMM386.EXE is correct here). It is 646kB instead of 640kB.
> Therefore base memory test fails. I guess that reporting memory CMOS
> tables/interrupt functions are not implemented correctly.
>
> Details are listed below.
>
> All issues are NOT present under VMWare Server 2.0 and with real hardware.
>
> QEMU: 0.12.3 under Fedora 11, 2.6.30.10-105.2.23.fc11.x86 on AMD Phenom II
> Quad Core, x86_64-softmmu.
>
> Any comments?
>
Tested with Checkit 3.0 and QEMM 9.0.
- The NPU error is confirmed and it seems to be a floating point
rounding error in QEMU. This should be a 0.12 regression as it works
in 0.11.1 and 0.10.6.
- The RTC Alarm failure is confirmed too. Is it unimplemented in QEMU?
- The Base Memory > 640K error seems to be SeaBIOS related. QEMU Bochs
BIOS(tested with both -old-bios hack in 0.12 series and old 0.11.1)
will just freeze after QEMU counted RAM.(Tested with ScriptPC and
Bochs).
> Thnx.
>
> Ciao,
> Gerhard
>
> --
> http://www.wiesinger.com/
>
> Details:
> 1.)
> NPU Trigonometric Functions.................................FAILED ***
> Step 1, Expected 0.42926, received 0.42926
>
> Double 'Npu_oldans1' = 0.429259 (3FDB78F91894EFA5h).
> Double 'Npu_oldans2' = 0.628319 (3FE41B2F769CF0E0h).
> Double 'Npu_result ' = 0.429259 (3FDB78F91894EFA6h).
>
> 2.)
> Compare Current Time............................................Passed
> DOS: 16:24:39.89 Real-Time Clock: 16:24:39.00 (.89 apart)
>
> Compare Current Date............................................Passed
> DOS: 04/11/2010 Real-Time Clock: 04/11/2010.
>
> Real-Time Clock Alarm...........................................FAILED ***
>
> Compare Elapsed Time............................................Passed
> DOS: 11.97 Seconds Real-Time Clock: 12.00 Seconds (.03 apart)
>
> 3.) Known Memory:
> Base 646K From 0K to 646K (0000000h to 00A17FFh)
> Base Memory.................................................FAILED ***
> ERROR at Address 0A0000h, Bits FEDCBA9876543210
> ERROR at Address 0A0004h, Bits FEDCBA9876543210
> ERROR at Address 0A0006h, Bits FEDCBA9876543210
> ERROR at Address 0A0008h, Bits FEDCBA9876543210
> ERROR at Address 0A000Ah, Bits FEDCBA9876543210
> ERROR at Address 0A000Ch, Bits FEDCBA9876543210
> ERROR at Address 0A000Eh, Bits FEDCBA9876543210
> ERROR at Address 0A0010h, Bits FEDCBA9876543210
> ERROR at Address 0A0012h, Bits FEDCBA9876543210
> ERROR at Address 0A0014h, Bits FEDCBA9876543210
> ERROR at Address 0A0016h, Bits FEDCBA9876543210
> ERROR at Address 0A0018h, Bits FEDCBA9876543210
> ERROR at Address 0A001Ah, Bits FEDCBA9876543210
> ERROR at Address 0A001Ch, Bits FEDCBA9876543210
> ERROR at Address 0A001Eh, Bits FEDCBA9876543210
> ERROR at Address 0A0020h, Bits FEDCBA9876543210
> ADDITIONAL MEMORY ERRORS WERE NOT LISTED DUE TO LACK OF SPACE.
>
>
>
I'm CC'ing the mailing list.
On Wed, Apr 14, 2010 at 02:04:48AM +0800, Qing Pei Wang wrote:
> hi kevin,
> i am learning the code of seabios/ohci stack followed with OHCI spec. I
> have some question.
Note that the OHCI support has only been tested on a modified qemu - I
haven't had any reports on real hardware.
> 1) in the function alloc_intr_pipe (usb.c line118)what does the frameexp
> mean?
It's log2(epdesc->bInterval) - the log of the sampling time (in ms)
requested by the device.
> 2) how does ohci get the intervals. the code just use epdesc->bInterval, how
> does it init? can pass the parameter from the usb-hid.c?
The epdesc structure is populated by get_device_config() - the config
read from the device includes the device config, interface
descriptions, and end point descriptions.
-Kevin
Enable preemption during VGA mode switch call - this call can take
several milliseconds on real hardware.
Call yield() in finish_preempt() - when preemption is configured it
allows threads in wait_preempt() to run; when not configured it gives
an opportunity for threads to execute after the implicit delay from
optionrom execution.
Don't penalize priority in run_thread(). The run_thread() code would
implicitly yield because it created the new thread on the list after
the current thread and then jumped to it. When in a preemption event,
a yield effectively waits approximately one millisecond (to the next
rtc irq). The implicit yielding in run_thread thus limited the number
of threads one could launch during preemption to 1 per millisecond.
So, change the code so that the new thread is created prior to the
current thread - thus eliminating the effective yield from
run_thread().
---
src/optionroms.c | 2 ++
src/stacks.c | 21 ++++++++++++++-------
2 files changed, 16 insertions(+), 7 deletions(-)
diff --git a/src/optionroms.c b/src/optionroms.c
index 47f5808..ad88e0c 100644
--- a/src/optionroms.c
+++ b/src/optionroms.c
@@ -470,7 +470,9 @@ vga_setup(void)
memset(&br, 0, sizeof(br));
br.flags = F_IF;
br.ax = 0x0003;
+ start_preempt();
call16_int(0x10, &br);
+ finish_preempt();
// Write to screen.
printf("Starting SeaBIOS (version %s)\n\n", VERSION);
diff --git a/src/stacks.c b/src/stacks.c
index 570948a..92d91a0 100644
--- a/src/stacks.c
+++ b/src/stacks.c
@@ -116,9 +116,12 @@ stack_hop(u32 eax, u32 edx, void *func)
#define THREADSTACKSIZE 4096
+// Thread info - stored at bottom of each thread stack - don't change
+// without also updating the inline assembler below.
struct thread_info {
struct thread_info *next;
void *stackpos;
+ struct thread_info **pprev;
};
struct thread_info VAR16VISIBLE MainThread;
@@ -128,6 +131,7 @@ void
thread_setup(void)
{
MainThread.next = &MainThread;
+ MainThread.pprev = &MainThread.next;
MainThread.stackpos = NULL;
CanPreempt = 0;
}
@@ -185,10 +189,8 @@ yield(void)
static void
__end_thread(struct thread_info *old)
{
- struct thread_info *pos = &MainThread;
- while (pos->next != old)
- pos = pos->next;
- pos->next = old->next;
+ old->next->pprev = old->pprev;
+ *old->pprev = old->next;
free(old);
dprintf(DEBUG_thread, "\\%08x/ End thread\n", (u32)old);
}
@@ -207,8 +209,10 @@ run_thread(void (*func)(void*), void *data)
thread->stackpos = (void*)thread + THREADSTACKSIZE;
struct thread_info *cur = getCurThread();
- thread->next = cur->next;
- cur->next = thread;
+ thread->next = cur;
+ thread->pprev = cur->pprev;
+ cur->pprev = &thread->next;
+ *thread->pprev = thread;
dprintf(DEBUG_thread, "/%08x\\ Start thread\n", (u32)thread);
asm volatile(
@@ -289,11 +293,14 @@ start_preempt(void)
void
finish_preempt(void)
{
- if (! CONFIG_THREADS || ! CONFIG_THREAD_OPTIONROMS)
+ if (! CONFIG_THREADS || ! CONFIG_THREAD_OPTIONROMS) {
+ yield();
return;
+ }
CanPreempt = 0;
releaseRTC();
dprintf(1, "Done preempt - %d checks\n", PreemptCount);
+ yield();
}
// Check if preemption is on, and wait for it to complete if so.
--
1.6.6.1
