SeaBIOS March 2022

seabios@seabios.org

10 participants
10 discussions

Re: INT 14H
by Paul Edwards 29 Sep '22

29 Sep '22

Hi Gerd. Thanks for your reply. Sorry for the delay, was swamped with other things. >> Currently I don't know what to recommend, because I >> don't understand the other side of the INT 13H/14H, >> only the OS side. > Well, the other side talks to the hardware, > and needs drivers to do so. See src/hw > Surely one can write a serial driver which connects to a remote place > using some bluetooth protocol instead of talking to a 16550. That'll > be *alot* of work though, you basically have to implement both > bluetooth stack and hardware driver. I expected to assemble, rather than write, such a thing. If not from the Linux source code, then FreeBSD or ReactOS. If for some reason (what would that be?) no-one has abstracted bluetooth to have a clean interface that I could have trivially reused, then I will put aside my bluetooth dreams and switch to a different technology. How about Wifi? Does that exist in a state usable for my purposes? >> Sure. For now, I want PDOS/386 to remain traditional. >> When I have exhausted everything that is possible >> via the BIOS, I will consider adding UEFI support. > If you want your firmware provide drivers to you for modern hardware you > are in a *much* better position with UEFI. Well, on some/many/most modern machines there is absolutely no other choice - the BIOS doesn't exist, even as CSM. > There is a bluetooth > protocol specification for example, although I'm not sure how common it > is to find an actual uefi driver for bluetooth hardware in the firmware. > Talking to ethernet using the firmware-provided uefi driver shouldn't be > much of a problem though b/c network boot is a rather standard feature. Ok, maybe in the medium term I should use a hardware device, forget the name, that turns ethernet into Wifi. So then the problem is reduced to me needing to provide a BOOTX64.EFI that converts INT 14H into UEFI ethernet calls. >> But I'd like to transport all of that software, designed for >> that environment, and change nothing at all, and have >> it work on a new environment that includes Wifi, bluetooth >> and maybe ethernet, and maybe infrared, and maybe >> other things I don't know about, but make sense (at >> some level) to be accessed via INT 14H. > Well. In the server world it is rather common to provide access to the > serial line over the network for system management purposes. > One approach for that is to have a separate management controller (bmc), > and the serial port of the machine is linked to the management > controller instead of a D9 socket. You can then connect to the bmc to > manage the machine, and one of the options available is to get serial > console access. Ok, this would allow me to have a BBS. But not allow me to have a "virtual modem" so that I can dial out. > Another approach is to have a virtual 16550 provided by the firmware. > Accessing the virtual 16550 will trap into SMM mode where the firmware > emulates a serial device and allows to access the serial port remotely > over the network, roughly comparable to how qemu provides an virtual > 16550 to virtual machines. Ok, but in the case of qemu I have the same issue - at the end of the day I want to drive a modem, so with qemu I can get it to talk to a "virtual modem". If the firmware is providing the serial to network conversion, I also need to stick in a virtual modem there. And that's what I was hoping SeaBIOS would allow me to do. > Note that both approaches work at hardware level not int14h level, > because modern operating systems use int14h services in bootloaders > only if at all. My operating system, PDOS/386, may not be considered "modern", even though it is in active development, but I do wish to use INT 14H, as that was the traditional BIOS service provided, and I wish to maintain contact with the original 80386 machines. I expect a modern environment to have the CPU, memory etc required to support this basic interface. BFN. Paul.

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EHCI cpage is out of range with qemu ehci controller
by lma 30 Apr '22

30 Apr '22

Hi all, I experienced an error about ehci current page on qemu + seabios v1.14: cpage out of range (5) processing error - resetting ehci HC We know that the EHCI spec defines valid range of ehci cpage to 0-4, But here is a 5, Obviously it's an issue. I added a EHCI controller, and attached a usb mass storage to the EHCI controller as boot device: host:~# qemu-system-x86_64 \ -accel kvm \ -bios /home/test/projects/seabios/out/bios.bin \ -m 4096 \ -device usb-ehci \ -blockdev driver=file,read-only=on,filename=/isos/openSUSE-Tumbleweed-GNOME-Live-x86_64-Snapshot20220314-Media.iso,node-name=iso \ -device usb-storage,drive=iso,bootindex=0 The issue is not 100% reproducible, I run the test 15 times with above steps, the issue occurs 1 or 2 times. The qemu version seems doesn't matter, I used to use qemu 5.2, 6.0 and latest git master, Got the same test result. It seems that the issue was introduced since seabios v1.14, It can be reproduced on latest seabios git master as well, It can't be reproduced on seabios 1.13 or older. The seabios commit b3fa8577 "kvm: add support for reading tsc frequency from kvmclock" seems to be the suspect. Thanks, Lin

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[PATCH] fw/coreboot.c: Use coreboot table to find cbfs
by Arthur Heymans 22 Apr '22

22 Apr '22

The "cbfs master header" cbfs file is considered a legacy feature in coreboot and is planned for removal in the master branch. Since 2015 the coreboot tables have exported info about the active cbfs. This change uses the cbfs information in the coreboot tables instead of following the cbfs master header pointer in the bootblock to find cbfs. This change makes it possible to access CBFS fmap regions that don't feature a "cbfs master header", which is the case with Googles VBOOT solution. This breaks compatibility with very old coreboot build (build before fb5d5b16 "2015-07-14, cbtable: describe boot media"). Keeping backward compatibility with the "cbfs master header" would complicate the code. Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> diff --git a/src/Kconfig b/src/Kconfig index 3a8ffa1..51ba827 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -93,15 +93,6 @@ endchoice help Support CBFS files compressed using the lzma decompression algorithm. - config CBFS_LOCATION - depends on COREBOOT_FLASH - hex "CBFS memory end location" - default 0 - help - Memory address of where the CBFS data ends. This should - be zero for normal builds. It may be a non-zero value if - the CBFS filesystem is at a non-standard location (eg, - 0xffe00000 if CBFS ends 2Meg below the end of flash). config MULTIBOOT depends on COREBOOT diff --git a/src/fw/coreboot.c b/src/fw/coreboot.c index 7c0954b..8a35c1d 100644 --- a/src/fw/coreboot.c +++ b/src/fw/coreboot.c @@ -88,6 +88,18 @@ struct cbmem_console { #define CBMC_OVERFLOW (1 << 31) static struct cbmem_console *cbcon = NULL; +#define CB_TAG_BOOT_MEDIA_PARAMS 0x30 + +struct cb_boot_media_params { + u32 tag; + u32 size; + /* offsets are relative to start of boot media */ + u64 fmap_offset; + u64 cbfs_offset; + u64 cbfs_size; + u64 boot_media_size; +}; + static u16 ipchksum(char *buf, int count) { @@ -146,7 +158,12 @@ find_cb_subtable(struct cb_header *cbh, u32 tag) struct cb_header * find_cb_table(void) { - struct cb_header *cbh = find_cb_header(0, 0x1000); + static struct cb_header *cbh; + + if (cbh) + return cbh; + + cbh= find_cb_header(0, 0x1000); if (!cbh) return NULL; struct cb_forward *cbf = find_cb_subtable(cbh, CB_TAG_FORWARD); @@ -317,20 +334,8 @@ ulzma(u8 *dst, u32 maxlen, const u8 *src, u32 srclen) * Coreboot flash format ****************************************************************/ -#define CBFS_HEADER_MAGIC 0x4F524243 -#define CBFS_VERSION1 0x31313131 - -struct cbfs_header { - u32 magic; - u32 version; - u32 romsize; - u32 bootblocksize; - u32 align; - u32 offset; - u32 pad[2]; -} PACKED; - #define CBFS_FILE_MAGIC 0x455649484352414cLL // LARCHIVE +#define CBFS_ALIGNMENT 64 struct cbfs_file { u64 magic; @@ -429,30 +434,50 @@ coreboot_cbfs_init(void) if (!CONFIG_COREBOOT_FLASH) return; - struct cbfs_header *hdr = *(void **)(CONFIG_CBFS_LOCATION - 4); - if ((u32)hdr & 0x03) { - dprintf(1, "Invalid CBFS pointer %p\n", hdr); + dprintf(3, "Attempting to initialize coreboot cbfs\n"); + + struct cb_header *cbh = find_cb_table(); + if (!cbh) { + dprintf(1, "cbfs_init: unable to find cb table\n"); return; } - if (CONFIG_CBFS_LOCATION && (u32)hdr > CONFIG_CBFS_LOCATION) - // Looks like the pointer is relative to CONFIG_CBFS_LOCATION - hdr = (void*)hdr + CONFIG_CBFS_LOCATION; - if (hdr->magic != cpu_to_be32(CBFS_HEADER_MAGIC)) { - dprintf(1, "Unable to find CBFS (ptr=%p; got %x not %x)\n" - , hdr, hdr->magic, cpu_to_be32(CBFS_HEADER_MAGIC)); + + struct cb_boot_media_params *cbbmp = + find_cb_subtable(cbh, CB_TAG_BOOT_MEDIA_PARAMS); + + if (!cbbmp) { + dprintf(1, "cbfs_init: unable to find boot media params\n"); return; } - dprintf(1, "Found CBFS header at %p\n", hdr); - u32 romsize = be32_to_cpu(hdr->romsize); - u32 romstart = CONFIG_CBFS_LOCATION - romsize; - struct cbfs_file *fhdr = (void*)romstart + be32_to_cpu(hdr->offset); + const u32 romsize = cbbmp->boot_media_size; + const u32 cbfs_start = cbbmp->cbfs_offset - romsize; + const u32 cbfs_end = cbfs_start + cbbmp->cbfs_size - 1; + + dprintf(3, "cbfs_init: cbfs_start=0x%08x, cbfs_end=0x%08x\n", cbfs_start, + cbfs_end); + + u32 offset = cbfs_start; + for (;;) { - if ((u32)fhdr - romstart > romsize) - break; - u64 magic = fhdr->magic; - if (magic != CBFS_FILE_MAGIC) + if (offset > cbfs_end || offset < cbfs_start) break; + + struct cbfs_file *fhdr = (void*)offset; + + if (fhdr->magic != CBFS_FILE_MAGIC) { + offset++; + offset = ALIGN(offset, CBFS_ALIGNMENT); + continue; + } + + /* Skip empty space */ + if (strcmp(fhdr->filename, "") == 0) { + offset += ALIGN(be32_to_cpu(fhdr->offset) + be32_to_cpu(fhdr->len) + , CBFS_ALIGNMENT); + continue; + } + struct cbfs_romfile_s *cfile = malloc_tmp(sizeof(*cfile)); if (!cfile) { warn_noalloc(); @@ -473,8 +498,8 @@ coreboot_cbfs_init(void) } romfile_add(&cfile->file); - fhdr = (void*)ALIGN((u32)cfile->data + cfile->rawsize - , be32_to_cpu(hdr->align)); + offset = ALIGN((u32)cfile->data + cfile->rawsize + , CBFS_ALIGNMENT); } process_links_file(); -- 2.30.2

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Bootsplash.jpg encoding question.
by AreYouLoco? 31 Mar '22

31 Mar '22

Hi, I am trying to make SeaBIOS on Thinkpad T420 running coreboot display bootsplash but I am failing to prepare the file. I tried to export file using GIMP and this info: https://puri.sm/wp-content/uploads/2017/02/coreboot-splash-gimp-export-opti… Relevant part of the coreboot log is: 1508[INFO ] Setting up bootsplash in 1366x768@32 1509[INFO ] CBFS: Found 'bootsplash.jpg' @0x46480 size 0x48e5 in mcache @0x7ffdd1c8 1510[DEBUG] Bootsplash image resolution: 1366x768 1511[ERROR] Bootsplash could not be decoded. jpeg_decode returned 4. I also tried to add bootsplash.bmp but then it says it didnt found bootsplash.jpg. Any hints? AreYouLoco?

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[PATCH v2 0/2] Fix reset issue with QEMU -machine q35
by Volker Rümelin 31 Mar '22

31 Mar '22

This reset issue was reported on the QEMU issue tracker at https://gitlab.com/qemu-project/qemu/-/issues/766 A reset with QEMU -machine q35 -accel tcg leads to a reset loop and with -machine q35 -accel kvm the reset only works because KVM ignores the read-only semantics of the C-F segments. Details about the issue are in "reset: force standard PCI configuration access". v2: The commit message of patch "reset: force standard PCI config- uration access" now uses the correct PCI configuration register name PCIEXBAR. Volker Rümelin (2): pci: refactor the pci_config_*() functions reset: force standard PCI configuration access src/fw/shadow.c | 16 +++++---- src/hw/pci.c | 86 ++++++++++++++++++++++++++++++++++++++++++------- src/hw/pci.h | 19 ++++++++++- 3 files changed, 101 insertions(+), 20 deletions(-) -- 2.34.1

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[PATCH 0/2] Fix reset issue with QEMU -machine q35
by Volker Rümelin 25 Mar '22

25 Mar '22

This reset issue was reported on the QEMU issue tracker at https://gitlab.com/qemu-project/qemu/-/issues/766 A reset with QEMU -machine q35 -accel tcg leads to a reset loop and with -machine q35 -accel kvm the reset only works because KVM ignores the read-only semantics of the C-F segments. Details about the issue are in "reset: force standard PCI configuration access". Volker Rümelin (2): pci: refactor the pci_config_*() functions reset: force standard PCI configuration access src/fw/shadow.c | 16 +++++---- src/hw/pci.c | 86 ++++++++++++++++++++++++++++++++++++++++++------- src/hw/pci.h | 19 ++++++++++- 3 files changed, 101 insertions(+), 20 deletions(-) -- 2.34.1

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[PATCH 1/1] sercon: do not screwup the xterm on the serial console
by Daniel Maslowski 25 Mar '22

25 Mar '22

From: Trammell Hudson <hudson(a)trmm.net> --- src/sercon.c | 21 --------------------- 1 file changed, 21 deletions(-) diff --git a/src/sercon.c b/src/sercon.c index 3019d9b4..a65c51e1 100644 --- a/src/sercon.c +++ b/src/sercon.c @@ -99,12 +99,6 @@ static void sercon_putchar(u8 chr) } } -static void sercon_term_reset(void) -{ - sercon_putchar('\x1b'); - sercon_putchar('c'); -} - static void sercon_term_clear_screen(void) { sercon_putchar('\x1b'); @@ -113,15 +107,6 @@ static void sercon_term_clear_screen(void) sercon_putchar('J'); } -static void sercon_term_no_linewrap(void) -{ - sercon_putchar('\x1b'); - sercon_putchar('['); - sercon_putchar('?'); - sercon_putchar('7'); - sercon_putchar('l'); -} - static void sercon_term_cursor_goto(u8 row, u8 col) { row++; col++; @@ -308,7 +293,6 @@ static void sercon_lazy_putchar(u8 chr, u8 attr, u8 teletype) /* Set video mode */ static void sercon_1000(struct bregs *regs) { - u8 clearscreen = !(regs->al & 0x80); u8 mode = regs->al & 0x7f; u8 rows, cols; @@ -345,11 +329,6 @@ static void sercon_1000(struct bregs *regs) SET_LOW(sercon_col_last, 0); SET_LOW(sercon_row_last, 0); SET_LOW(sercon_attr_last, 0); - - sercon_term_reset(); - sercon_term_no_linewrap(); - if (clearscreen) - sercon_term_clear_screen(); } /* Set text-mode cursor shape */ -- 2.32.0

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[ANNOUNCE] SeaBIOS 1.16.0
by Kevin O'Connor 15 Mar '22

15 Mar '22

The 1.16.0 version of SeaBIOS has now been released. For more information on the release, please see: https://seabios.org/Releases New in this release: * SMBIOS v3.0 support on QEMU * Several bug fixes and code cleanups. For information on obtaining SeaBIOS, please see: https://seabios.org/Download ===== git shortlog -n rel-1.15.0..rel-1.16.0 ===== Eduardo Habkost (19): biostables: copy_fseg_table() function util.h: Delete unused get_smbios_entry_point() prototype smbios: Rename code specific for SMBIOS 2.1 entry points smbios: Generic smbios_next() function smbios: smbios_get_tables() function smbios: Use smbios_get_tables()/smbios_next() at display_uuid() smbios: smbios_major_version()/smbios_minor_version() helpers tpm: Use smbios_get_tables() csm: Don't check SMBios21Addr before calling copy_smbios_21() smbios: Make SMBios21Addr variable static smbios: Use smbios_next() at smbios_romfile_setup() smbios: Extract SMBIOS table building code to separate function smbios: Make smbios_build_tables() more generic smbios: smbios_21_setup_entry_point() function smbios: Make some smbios_build_tables() arguments optional smbios: Make smbios_build_tables() ready for 64-bit tables smbios: copy_smbios_30() function smbios: Support SMBIOS 3.0 entry point at copy_table() smbios: Support SMBIOS 3.0 entry point at smbios_romfile_setup() Kevin O'Connor (13): vgasrc: Don't use VAR16 in header files to fix gcc warning memmap: Fix gcc out-of-bounds warning readserial: Improve Python3 compatibility scripts: Remove python23compat.py smm: Suppress gcc array-bounds warnings nvme: Rework nvme_io_readwrite() to return -1 on error nvme: Add nvme_bounce_xfer() helper function nvme: Convert nvme_build_prpl() to nvme_prpl_xfer() nvme: Pass prp1 and prp2 directly to nvme_io_xfer() nvme: Build the page list in the existing dma buffer nvme: Only allocate one dma bounce buffer for all nvme drives sercon: Fix missing GET_LOW() to access rx_bytes docs: Note v1.16.0 release Andy Pei (3): virtio-blk: add feature VIRTIO_BLK_F_SIZE_MAX and VIRTIO_BLK_F_SEG_MAX virtio-blk: abstract a function named virtio_blk_op_one_segment to handle r/w request virtio-blk: split large IO according to size_max Igor Mammedov (2): pci: reserve resources for pcie-pci-bridge to fix regressed hotplug on q35 pci: let firmware reserve IO for pcie-pci-bridge Florian Larysch (1): nvme: fix LBA format data structure Gerd Hoffmann (1): svgamodes: add standard 4k modes Jan Beulich via SeaBIOS (1): nvme: avoid use-after-free in nvme_controller_enable()

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[PATCH v2] Add an option for debug output on the vga console
by Karl Semich 12 Mar '22

12 Mar '22

Only available if threads are disabled, to prevent an undiagnosed call16 panic. A new vga_console_active() utility function is added, and debugging output is only forwarded to the vga console if the vga console has been enabled. Only debugging output from 32bit flat regions is emitted, as vga console output is only supported from within such code. This is detected with a !MODESEGMENT check inside the debugging output code, and a new ASSERT32FLAT() check within the vga output code. This change has been briefly tested on a kfsn4-dre and in qemu, using serial debugging in the latter to verify that 16bit output appears over serial that does not appear on the vga console. Signed-off-by: Karl Semich <0xloem(a)gmail.com> --- src/Kconfig | 9 +++++++++ src/bootsplash.c | 9 +++++++++ src/output.c | 33 ++++++++++++++++++++++++++------- src/util.h | 1 + 4 files changed, 45 insertions(+), 7 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index 3a8ffa1..5d2c7ab 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -571,6 +571,15 @@ menu "Debugging" provide the 32 bit address. E.g. 0xFEDC6000 for the AMD Kern (a.k.a Hudson UART). + config DEBUG_VGA_CONSOLE + depends on DEBUG_LEVEL != 0 && !THREADS + bool "VGA console debugging" + default y + help + Send debugging information to vga console. This is only displayed + after the VGA console has loaded, and only in 32 bit flat regions + of code. Requires that threads are disabled. + config DEBUG_IO depends on QEMU_HARDWARE && DEBUG_LEVEL != 0 bool "Special IO port debugging" diff --git a/src/bootsplash.c b/src/bootsplash.c index 538b316..2a93c8a 100644 --- a/src/bootsplash.c +++ b/src/bootsplash.c @@ -36,6 +36,8 @@ call16_int10(struct bregs *br) * VGA text / graphics console ****************************************************************/ +static int VgaConsoleActive = 0; + void enable_vga_console(void) { @@ -47,11 +49,18 @@ enable_vga_console(void) br.ax = 0x0003; call16_int10(&br); + VgaConsoleActive = 1; + // Write to screen. printf("SeaBIOS (version %s)\n", VERSION); display_uuid(); } +int vga_console_active(void) +{ + return VgaConsoleActive; +} + static int find_videomode(struct vbe_info *vesa_info, struct vbe_mode_info *mode_info , int width, int height, int bpp_req) diff --git a/src/output.c b/src/output.c index 0184444..6fbf4f5 100644 --- a/src/output.c +++ b/src/output.c @@ -17,12 +17,15 @@ #include "output.h" // dprintf #include "stacks.h" // call16_int #include "string.h" // memset -#include "util.h" // ScreenAndDebug +#include "util.h" // ScreenAndDebug vga_console_active struct putcinfo { void (*func)(struct putcinfo *info, char c); }; +static void __debug_putc(char c); +static void __screen_putc(char c); + /**************************************************************** * Debug output @@ -35,9 +38,8 @@ debug_banner(void) dprintf(1, "BUILD: %s\n", BUILDINFO); } -// Write a character to debug port(s). static void -debug_putc(struct putcinfo *action, char c) +__debug_putc(char c) { if (! CONFIG_DEBUG_LEVEL) return; @@ -47,6 +49,16 @@ debug_putc(struct putcinfo *action, char c) serial_debug_putc(c); } +// Write a character to debug port(s). +static void +debug_putc(struct putcinfo *action, char c) +{ + __debug_putc(c); + if (CONFIG_DEBUG_LEVEL && CONFIG_DEBUG_VGA_CONSOLE && !MODESEGMENT + && vga_console_active()) + __screen_putc(c); +} + // Flush any pending output to debug port(s). static void debug_flush(void) @@ -86,17 +98,24 @@ screenc(char c) call16_int(0x10, &br); } -// Handle a character from a printf request. static void -screen_putc(struct putcinfo *action, char c) +__screen_putc(char c) { - if (ScreenAndDebug) - debug_putc(&debuginfo, c); + ASSERT32FLAT(); if (c == '\n') screenc('\r'); screenc(c); } +// Handle a character from a printf request. +static void +screen_putc(struct putcinfo *action, char c) +{ + if (ScreenAndDebug) + __debug_putc(c); + __screen_putc(c); +} + static struct putcinfo screeninfo = { screen_putc }; diff --git a/src/util.h b/src/util.h index aff8e88..8219e0c 100644 --- a/src/util.h +++ b/src/util.h @@ -50,6 +50,7 @@ int boot_lchs_find_ata_device(struct pci_device *pci, int chanid, int slave, // bootsplash.c void enable_vga_console(void); +int vga_console_active(void); void enable_bootsplash(void); void disable_bootsplash(void); -- 2.32.0

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[PATCH] Add an option for debug output on the vga console.
by Karl Semich 12 Mar '22

12 Mar '22

Only available if threads are disabled. Only displays after the console has been loaded and from within 32bit flat regions of code. Signed-off-by: Karl Semich <0xloem(a)gmail.com> --- src/Kconfig | 9 +++++++++ src/bootsplash.c | 9 +++++++++ src/output.c | 32 +++++++++++++++++++++++++------- src/util.h | 1 + 4 files changed, 44 insertions(+), 7 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index 3a8ffa1..5d2c7ab 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -571,6 +571,15 @@ menu "Debugging" provide the 32 bit address. E.g. 0xFEDC6000 for the AMD Kern (a.k.a Hudson UART). + config DEBUG_VGA_CONSOLE + depends on DEBUG_LEVEL != 0 && !THREADS + bool "VGA console debugging" + default y + help + Send debugging information to vga console. This is only displayed + after the VGA console has loaded, and only in 32 bit flat regions + of code. Requires that threads are disabled. + config DEBUG_IO depends on QEMU_HARDWARE && DEBUG_LEVEL != 0 bool "Special IO port debugging" diff --git a/src/bootsplash.c b/src/bootsplash.c index 538b316..2a93c8a 100644 --- a/src/bootsplash.c +++ b/src/bootsplash.c @@ -36,6 +36,8 @@ call16_int10(struct bregs *br) * VGA text / graphics console ****************************************************************/ +static int VgaConsoleActive = 0; + void enable_vga_console(void) { @@ -47,11 +49,18 @@ enable_vga_console(void) br.ax = 0x0003; call16_int10(&br); + VgaConsoleActive = 1; + // Write to screen. printf("SeaBIOS (version %s)\n", VERSION); display_uuid(); } +int vga_console_active(void) +{ + return VgaConsoleActive; +} + static int find_videomode(struct vbe_info *vesa_info, struct vbe_mode_info *mode_info , int width, int height, int bpp_req) diff --git a/src/output.c b/src/output.c index 0184444..27935bc 100644 --- a/src/output.c +++ b/src/output.c @@ -17,12 +17,15 @@ #include "output.h" // dprintf #include "stacks.h" // call16_int #include "string.h" // memset -#include "util.h" // ScreenAndDebug +#include "util.h" // ScreenAndDebug vga_console_active struct putcinfo { void (*func)(struct putcinfo *info, char c); }; +static void __debug_putc(char c); +static void __screen_putc(char c); + /**************************************************************** * Debug output @@ -35,9 +38,8 @@ debug_banner(void) dprintf(1, "BUILD: %s\n", BUILDINFO); } -// Write a character to debug port(s). static void -debug_putc(struct putcinfo *action, char c) +__debug_putc(char c) { if (! CONFIG_DEBUG_LEVEL) return; @@ -47,6 +49,16 @@ debug_putc(struct putcinfo *action, char c) serial_debug_putc(c); } +// Write a character to debug port(s). +static void +debug_putc(struct putcinfo *action, char c) +{ + __debug_putc(c); + if (CONFIG_DEBUG_LEVEL && CONFIG_DEBUG_VGA_CONSOLE && !MODESEGMENT + && vga_console_active()) + __screen_putc(c); +} + // Flush any pending output to debug port(s). static void debug_flush(void) @@ -86,17 +98,23 @@ screenc(char c) call16_int(0x10, &br); } -// Handle a character from a printf request. static void -screen_putc(struct putcinfo *action, char c) +__screen_putc(char c) { - if (ScreenAndDebug) - debug_putc(&debuginfo, c); if (c == '\n') screenc('\r'); screenc(c); } +// Handle a character from a printf request. +static void +screen_putc(struct putcinfo *action, char c) +{ + if (ScreenAndDebug) + __debug_putc(c); + __screen_putc(c); +} + static struct putcinfo screeninfo = { screen_putc }; diff --git a/src/util.h b/src/util.h index aff8e88..8219e0c 100644 --- a/src/util.h +++ b/src/util.h @@ -50,6 +50,7 @@ int boot_lchs_find_ata_device(struct pci_device *pci, int chanid, int slave, // bootsplash.c void enable_vga_console(void); +int vga_console_active(void); void enable_bootsplash(void); void disable_bootsplash(void); -- 2.32.0

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SeaBIOS March 2022