SeaBIOS March 2019

seabios@seabios.org

9 participants
11 discussions

[PATCH v2] optionrom: disallow int19 redirect for pnp roms.

by Gerd Hoffmann

Check whenever pnp roms attempt to redirect int19, and in case it does log a message and undo the redirect. A pnp rom should not need this, we have BEVs and BCVs for that. Nevertheless there are roms in the wild which are redirecting int19. At least some BIOS implementations for physical hardware have a config option in the setup to allow/disallow int19 redirections, so just not allowing this seems to be the way to deal with this situation. Buglink: https://bugzilla.redhat.com//show_bug.cgi?id=1642135 Signed-off-by: Gerd Hoffmann <kraxel(a)redhat.com> --- src/optionroms.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/src/optionroms.c b/src/optionroms.c index fc992f649f..e90900b790 100644 --- a/src/optionroms.c +++ b/src/optionroms.c @@ -8,6 +8,7 @@ #include "bregs.h" // struct bregs #include "config.h" // CONFIG_* #include "farptr.h" // FLATPTR_TO_SEG +#include "biosvar.h" // GET_IVT #include "hw/pci.h" // pci_config_readl #include "hw/pcidevice.h" // foreachpci #include "hw/pci_ids.h" // PCI_CLASS_DISPLAY_VGA @@ -308,6 +309,24 @@ fail: return NULL; } +static int boot_irq_captured(void) +{ + struct segoff_s current, seabios; + + current = GET_IVT(0x19); + seabios = FUNC16(entry_19_official); + return ((current.seg != seabios.seg) || + (current.offset != current.offset)); +} + +static void boot_irq_restore(void) +{ + struct segoff_s seabios; + + seabios = FUNC16(entry_19_official); + SET_IVT(0x19, seabios); +} + // Attempt to map and initialize the option rom on a given PCI device. static void init_pcirom(struct pci_device *pci, int isvga, u64 *sources) @@ -327,8 +346,18 @@ init_pcirom(struct pci_device *pci, int isvga, u64 *sources) if (! rom) // No ROM present. return; + int irq_was_captured = boot_irq_captured(); + struct pnp_data *pnp = get_pnp_rom(rom); setRomSource(sources, rom, RS_PCIROM | (u32)pci); init_optionrom(rom, pci->bdf, isvga); + if (boot_irq_captured() && !irq_was_captured && + !file && !isvga && pnp) { + // This PCI rom is misbehaving - recapture the boot irqs + char *desc = MAKE_FLATPTR(FLATPTR_TO_SEG(rom), pnp->productname); + dprintf(1, "PnP optionrom \"%s\" (bdf %pP) captured int19, restoring\n", + desc, pci); + boot_irq_restore(); + } } -- 2.9.3

1 year, 11 months

[PATCH] optionrom: disallow int19 redirect for pnp roms.

by Gerd Hoffmann

Check whenever pnp roms attempt to redirect int19, and in case it does log a message and undo the redirect. A pnp rom should not need this, we have BEVs and BCVs for that. Nevertheless there are roms in the wild which are redirecting int19. At least some BIOS implementations for physical hardware have a config option in the setup to allow/disallow int19 redirections, so just not allowing this seems to be the way to deal with this situation. Buglink: https://bugzilla.redhat.com//show_bug.cgi?id=1642135 Signed-off-by: Gerd Hoffmann <kraxel(a)redhat.com> --- src/optionroms.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/src/optionroms.c b/src/optionroms.c index fc992f649f..4ec5504ca9 100644 --- a/src/optionroms.c +++ b/src/optionroms.c @@ -8,6 +8,7 @@ #include "bregs.h" // struct bregs #include "config.h" // CONFIG_* #include "farptr.h" // FLATPTR_TO_SEG +#include "biosvar.h" // GET_IVT #include "hw/pci.h" // pci_config_readl #include "hw/pcidevice.h" // foreachpci #include "hw/pci_ids.h" // PCI_CLASS_DISPLAY_VGA @@ -136,9 +137,24 @@ init_optionrom(struct rom_header *rom, u16 bdf, int isvga) tpm_option_rom(newrom, rom->size * 512); - if (isvga || get_pnp_rom(newrom)) + struct pnp_data *pnp = get_pnp_rom(newrom); + if (isvga || pnp) { + struct segoff_s old19, new19; // Only init vga and PnP roms here. + old19 = GET_IVT(0x19); callrom(newrom, bdf); + new19 = GET_IVT(0x19); + if (old19.seg != new19.seg || + old19.offset != new19.offset) { + dprintf(1, "WARNING! rom tried to hijack int19 " + "(vec %04x:%04x, pnp %s, bev %s, bvc %s)\n", + new19.seg, new19.offset, + pnp ? "yes" : "no", + pnp && pnp->bev ? "yes" : "no", + pnp && pnp->bcv ? "yes" : "no"); + SET_IVT(0x19, old19); + } + } return rom_confirm(newrom->size * 512); } -- 2.9.3

1 year, 12 months

Possible security issue or intended functionality?

by k4m1

Hi, I noticed, that both bootloader - and kernel code are able to make BIOS ROM section writable again. This allows hostile code to make modifications to ROM contents, and then run the modified code. This may allow malicious code to gain privilege escalation from ring0 to ring -2 if I have not misunderstood this. Care to verify wheter this is an issue or not? - k4m1

2 years, 1 month

Siabios did not boot debian from USB flash.

by dponamorev＠gmail.com

Siabios did not boot debian from USB flash. Booting from the hard disk is normal. What siabios settings can affect this behavior? USB boot flash file system is FAT32. Log: coreboot-coreboot-unknown Mon Mar 11 14:21:16 UTC 2019 ramstage starting... Timestamp - start of ramstage: 17951311764 BS: BS_PRE_DEVICE times (us): entry 2 run 3 exit 0 Timestamp - device enumeration: 17969450940 CBFS @ e20000 size 1e0000 CBFS: 'Master Header Locator' located CBFS at [e20000:1000000) CBFS: Locating 'fsps.bin' CBFS: Found @ offset 1a2fc0 size 19000 CBFS @ e20000 size 1e0000 CBFS: 'Master Header Locator' located CBFS at [e20000:1000000) CBFS: Locating 'cpu_microcode_blob.bin' CBFS: Found @ offset fffc0 size 2800 Board ID: 0x52. Timestamp - calling FspSiliconInit: 18180246750 Timestamp - returning from FspSiliconInit: 18293792676 CBMEM entry for DIMM info: 0x7fbfe9a0 WEAK: src/soc/intel/denverton_ns/hob_mem.c/mainboard_add_dimm_info called 1 DIMMs found BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 171095 exit 0 Enumerating buses... Show all devs... Before device enumeration. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 DOMAIN: 0000: enabled 1 FMAP: Found "FLASH" version 1.1 at e00000. FMAP: base = ff000000 size = 1000000 #areas = 4 FMAP: area RW_MRC_CACHE found @ e10000 (65536 bytes) MRC: Checking cached data update for 'RW_MRC_CACHE'. SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x1000000 BS: BS_DEV_ENUMERATE times (us): entry 0 run 643906 exit 29181 Timestamp - device configuration: 19765645010 Allocating resources... Reading resources... Root Device read_resources bus 0 link: 0 CPU_CLUSTER: 0 read_resources bus 0 link: 0 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done DOMAIN: 0000 read_resources bus 0 link: 0 mc_add_fixed_mmio_resources: Adding PCIEXBAR @ 60 0xe0000000-0xefffffff. mc_add_fixed_mmio_resources: Adding MCHBAR @ 48 0xfed10000-0xfed17fff. MC MAP: TOUUD: 0x280000000 MC MAP: TOLUD: 0x80000000 MC MAP: TSEGMB: 0x7fe00000 SMM memory location: 0x7fe00000 SMM memory size: 0x200000 PCI: 00:09.0 read_resources bus 1 link: 0 PCI: 00:09.0 read_resources bus 1 link: 0 done PCI: 00:0a.0 read_resources bus 2 link: 0 PCI: 00:0a.0 read_resources bus 2 link: 0 done PCI: 00:0b.0 read_resources bus 3 link: 0 PCI: 00:0b.0 read_resources bus 3 link: 0 done PCI: 00:0e.0 read_resources bus 4 link: 0 PCI: 00:0e.0 read_resources bus 4 link: 0 done PCI: 00:16.0 read_resources bus 5 link: 0 PCI: 00:16.0 read_resources bus 5 link: 0 done PCI: 00:17.0 read_resources bus 6 link: 0 PCI: 00:17.0 read_resources bus 6 link: 0 done Adding P2SB PCR config space BAR 0xfd000000-0xfe000000. Adding PMC PWRM config space BAR 0xfe000000-0xfe010000. BS: BS_DEV_RESOURCES times (us): entry 0 run 3052573 exit 0 Timestamp - calling FspNotify(AfterPciEnumeration): 26187463746 Timestamp - returning from FspNotify(AfterPciEnumeration): 26199700090 Timestamp - device enable: 26213141976 BS: BS_DEV_ENABLE times (us): entry 12225 run 122435 exit 0 Timestamp - device initialization: 26481678394 Initializing devices... Root Device init ... Root Device init finished in 2052 usecs CPU_CLUSTER: 0 init ... MTRR: Physical address space: 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 0x00000000000c0000 - 0x000000007fc00000 size 0x7fb40000 type 6 0x000000007fc00000 - 0x000000007fe00000 size 0x00200000 type 0 0x000000007fe00000 - 0x0000000080000000 size 0x00200000 type 6 0x0000000080000000 - 0x0000000100000000 size 0x80000000 type 0 0x0000000100000000 - 0x0000000280000000 size 0x180000000 type 6 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() CPU physical address size: 39 bits MTRR: default type WB/UC MTRR counts: 2/12. MTRR: WB selected as default type. MTRR: 0 base 0x000000007fc00000 mask 0x0000007fffe00000 type 0 MTRR: 1 base 0x0000000080000000 mask 0x0000007f80000000 type 0 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local APIC... apic_id: 0x04 done. Number of Active Cores: 4 of 4 total. Will perform SMM setup. CPU: Intel(R) Atom(TM) CPU C3538 @ 2.10GHz. Loading module at 00030000 with entry 00030000. filesize: 0x130 memsize: 0x130 Processing 16 relocs. Offset value of 0x00030000 Attempting to start 3 APs Waiting for 10ms after sending INIT. Waiting for 1st SIPI to complete...AP: slot 2 apic_id c. AP: slot 1 apic_id 18. done. AP: slot 3 apic_id 10. Waiting for 2nd SIPI to complete...done. Loading module at 00038000 with entry 00038000. filesize: 0x1b0 memsize: 0x1b0 Processing 13 relocs. Offset value of 0x00038000 SMM Module: stub loaded at 00038000. Will call 7f79f4a5(00000000) Installing SMM handler to 0x7fe00000 Loading module at 7fe10000 with entry 7fe10046. filesize: 0x4c8 memsize: 0x44e0 Processing 22 relocs. Offset value of 0x7fe10000 Loading module at 7fe08000 with entry 7fe08000. filesize: 0x1b0 memsize: 0x1b0 Processing 13 relocs. Offset value of 0x7fe08000 SMM Module: placing jmp sequence at 7fe07c00 rel16 0x03fd SMM Module: placing jmp sequence at 7fe07800 rel16 0x07fd SMM Module: placing jmp sequence at 7fe07400 rel16 0x0bfd SMM Module: stub loaded at 7fe08000. Will call 7fe10046(00000000) Initializing Southbridge SMI... pmbase = 0x1800 SMI_STS: PM1 PM1_STS: WAK TMROF New SMBASE 0x7fe00000 Relocation complete. New SMBASE 0x7fdff400 Relocation complete. New SMBASE 0x7fdff800 Relocation complete. New SMBASE 0x7fdffc00 Relocation complete. Initializing CPU #0 CPU: vendor Intel device 506f1 CPU: family 06, model 5f, stepping 01 Init Denverton-NS SoC cores. Turbo is unavailable CPU #0 initialized Initializing CPU #3 Initializing CPU #1 Initializing CPU #2 CPU: vendor Intel device 506f1 CPU: family 06, model 5f, stepping 01 CPU: vendor Intel device 506f1 CPU: family 06, model 5f, stepping 01 CPU: vendor Intel device 506f1 CPU: family 06, model 5f, stepping 01 Init Denverton-NS SoC cores. Init Denverton-NS SoC cores. CPU #3 initialized Init Denverton-NS SoC cores. CPU #1 initialized CPU #2 initialized bsp_do_flight_plan done after 146 msecs. cpu: frequency set to 2100 Enabling SMIs. CPU_CLUSTER: 0 init finished in 332246 usecs PCI: 00:00.0 init ... Set BIOS_RESET_CPL BS: BS_DEV_INIT times (us): entry 0 run 594098 exit 0 Finalize devices... Devices finalized Timestamp - device setup done: 27747560516 BS: BS_POST_DEVICE times (us): entry 0 run 7726 exit 0 Timestamp - cbmem post: 27766396826 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 3359 exit 0 Timestamp - write tables: 27784689530 CBFS @ e20000 size 1e0000 CBFS: 'Master Header Locator' located CBFS at [e20000:1000000) CBFS: Locating 'fallback/dsdt.aml' CBFS: Found @ offset 19b80 size 1a89 CBFS @ e20000 size 1e0000 CBFS: 'Master Header Locator' located CBFS at [e20000:1000000) CBFS: Locating 'fallback/slic' CBFS: 'fallback/slic' not found. ACPI: Writing ACPI tables at 7f731000. ACPI: * FACS ACPI: * DSDT ACPI: * FADT SCI is IRQ9 ACPI: added table 1/32, length now 40 ACPI: * SSDT Number of Active Cores: 4 of 4 total. ACPI: added table 2/32, length now 44 ACPI: * MCFG ACPI: added table 3/32, length now 48 ACPI: * MADT SCI is IRQ9 ACPI: added table 4/32, length now 52 current = 7f733000 ACPI: * HPET ACPI: added table 5/32, length now 56 ACPI: * SSDT2 not generated. current = 7f733040 ACPI: done. ACPI tables: 8256 bytes. smbios_write_tables: 7f730000 Create SMBIOS type 17 SMBIOS tables: 459 bytes. Writing table forward entry at 0x00000500 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 3069 Writing coreboot table at 0x7f755000 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000a0000-00000000000fffff: RESERVED 3. 0000000000100000-000000007f72ffff: RAM 4. 000000007f730000-000000007f78ffff: CONFIGURATION TABLES 5. 000000007f790000-000000007f7c9fff: RAMSTAGE 6. 000000007f7ca000-000000007fbfffff: CONFIGURATION TABLES 7. 000000007fc00000-000000007fffffff: RESERVED 8. 00000000e0000000-00000000efffffff: RESERVED 9. 00000000fed10000-00000000fed17fff: RESERVED 10. 0000000100000000-000000027fffffff: RAM Board ID: 0x52. Board ID: 82 CBFS @ e20000 size 1e0000 CBFS: 'Master Header Locator' located CBFS at [e20000:1000000) Wrote coreboot table at: 7f755000, 0x3d0 bytes, checksum ecae coreboot table: 1000 bytes. IMD ROOT 0. 7fbff000 00001000 IMD SMALL 1. 7fbfe000 00001000 FSP MEMORY 2. 7f7fe000 00400000 CONSOLE 3. 7f7de000 00020000 TIME STAMP 4. 7f7dd000 00000910 MRC DATA 5. 7f7d5000 000079d0 ROMSTG STCK 6. 7f7d4000 00000400 AFTER CAR 7. 7f7ca000 0000a000 RAMSTAGE 8. 7f78f000 0003b000 REFCODE 9. 7f776000 00019000 57a9e101 10. 7f75d000 00019000 COREBOOT 11. 7f755000 00008000 ACPI 12. 7f731000 00024000 SMBIOS 13. 7f730000 00000800 IMD small region: IMD ROOT 0. 7fbfec00 00000400 FSP RUNTIME 1. 7fbfebe0 00000004 POWER STATE 2. 7fbfeba0 00000040 ROMSTAGE 3. 7fbfeb80 00000004 57a9e001 4. 7fbfeb60 00000018 MEM INFO 5. 7fbfe9a0 000001a9 ACPI GNVS 6. 7fbfe8a0 00000100 COREBOOTFWD 7. 7fbfe860 00000028 Timestamp - finalize chips: 28322197554 BS: BS_WRITE_TABLES times (us): entry 0 run 259662 exit 0 Timestamp - load payload: 28341034714 CBFS @ e20000 size 1e0000 CBFS: 'Master Header Locator' located CBFS at [e20000:1000000) CBFS: Locating 'fallback/payload' CBFS: Found @ offset 1b680 size cf51 Checking segment from ROM address 0xffe3b6b8 Payload being loaded at below 1MiB without region being marked as RAM usable. Checking segment from ROM address 0xffe3b6d4 Loading segment from ROM address 0xffe3b6b8 code (compression=1) New segment dstaddr 0x000e7840 memsize 0x187c0 srcaddr 0xffe3b6f0 filesize 0xcf19 Loading Segment: addr: 0x000e7840 memsz: 0x00000000000187c0 filesz: 0x000000000000cf19 using LZMA Timestamp - starting LZMA decompress (ignore for x86): 28459763764 Timestamp - finished LZMA decompress (ignore for x86): 28516239056 [ 0x000e7840, 00100000, 0x00100000) <- ffe3b6f0 Loading segment from ROM address 0xffe3b6d4 Entry Point 0x000fd065 Loaded segments Timestamp - calling FspNotify(ReadyToBoot): 28555141368 Timestamp - returning from FspNotify(ReadyToBoot): 28595037824 Timestamp - calling FspNotify(EndOfFirmware): 28607008196 Timestamp - returning from FspNotify(EndOfFirmware): 28618174586 HIDING HSUARTs. Finalizing SMM. BS: BS_PAYLOAD_LOAD times (us): entry 0 run 101957 exit 39150 Jumping to boot code at 000fd065(7f755000) Timestamp - selfboot jump: 28657483404 CPU0: stack: 7f7be000 - 7f7bf000, lowest used address 7f7beafc, stack used: 1284 bytes SeaBIOS (version rel-1.12.0-0-ga698c89) BUILD: gcc: (coreboot toolchain v1.53 August 16th, 2018) 8.1.0 binutils: (GNU Binutils) 2.30 Attempting to find coreboot table Found coreboot table forwarder. Now attempting to find coreboot memory map SeaBIOS (version rel-1.12.0-0-ga698c89) BUILD: gcc: (coreboot toolchain v1.53 August 16th, 2018) 8.1.0 binutils: (GNU Binutils) 2.30 Found coreboot cbmem console @ 7f7de000 Found mainboard Intel Harcuvar CRB malloc preinit Relocating init from 0x000e8be0 to 0x7f6e7420 (size 35648) malloc init Found CBFS header at 0xffe20038 Add romfile: cbfs master header (size=32) Add romfile: fallback/romstage (size=23420) Add romfile: fallback/ramstage (size=61175) Add romfile: config (size=1052) Add romfile: revision (size=570) Add romfile: fallback/postcar (size=18560) Add romfile: fallback/dsdt.aml (size=6793) Add romfile: fallback/payload (size=53073) Add romfile: payload_config (size=1708) Add romfile: payload_revision (size=236) Add romfile: bootorder (size=55) Add romfile: (size=880792) Add romfile: cpu_microcode_blob.bin (size=10240) Add romfile: (size=55128) Add romfile: fspt.bin (size=4096) Add romfile: (size=3992) Add romfile: fspm.bin (size=589824) Add romfile: (size=3992) Add romfile: fsps.bin (size=102400) Add romfile: (size=114584) Add romfile: bootblock (size=32768) init ivt init bda init bios32 init PMM init PNPBIOS table init keyboard init mouse init pic math cp init PCI probe Found 24 PCI devices (max PCI bus is 06) Relocating coreboot bios tables Copying SMBIOS entry point from 0x7f730000 to 0x000f1700 Copying ACPI RSDP from 0x7f731000 to 0x000f16d0 Using pmtimer, ioport 0x1808 init timer Scan for VGA option rom No VGA found, scan for other display Turning on vga text mode console SeaBIOS (version rel-1.12.0-0-ga698c89) init usb XHCI init on dev 00:15.0: regs @ 0xdd480000, 8 ports, 32 slots, 32 byte contexts XHCI protocol USB 2.00, 4 ports (offset 1), def 3011 XHCI protocol USB 3.00, 4 ports (offset 5), def 1000 XHCI extcap 0xc0 @ 0xdd488070 XHCI extcap 0x1 @ 0xdd48846c XHCI extcap 0xc6 @ 0xdd4884f4 XHCI extcap 0xc7 @ 0xdd488500 XHCI extcap 0xc2 @ 0xdd488600 XHCI extcap 0xa @ 0xdd488700 configure_xhci: resetting configure_xhci: setup 18 scratch pad buffers xhci_hub_reset port #1: 0x000206e1, powered, pls 7, speed 1 [Full] XHCI port #1: 0x00200e03, powered, enabled, pls 0, speed 3 [High] set_address 0x7f72ffb0 xhci_alloc_pipe: usbdev 0x7f6e5930, ring 0x7f72f900, slotid 0, epid 1 xhci_cmd_enable_slot: xhci_process_events port #1: 0x00200e03, powered, enabled, pls 0, speed 3 [High] xhci_process_events port #2: 0x000206e1, powered, pls 7, speed 1 [Full] xhci_process_events port #3: 0x00020ae1, powered, pls 7, speed 2 [Low] xhci_process_events port #1: 0x00000e03, powered, enabled, pls 0, speed 3 [High] xhci_alloc_pipe: enable slot: got slotid 1 xhci_cmd_address_device: slotid 1 xhci_realloc_pipe: usbdev 0x7f6e5930, ring 0x7f72f900, slotid 1, epid 1 config_usb: 0x7f72fa20 device rev=0200 cls=00 sub=00 proto=00 size=64 xhci_realloc_pipe: usbdev 0x7f6e5930, ring 0x7f72f900, slotid 1, epid 1 xhci_alloc_pipe: usbdev 0x7f6e5930, ring 0x000ef600, slotid 0, epid 3 xhci_cmd_configure_endpoint: slotid 1, add 0x9, del 0x0 xhci_alloc_pipe: usbdev 0x7f6e5930, ring 0x000ef400, slotid 0, epid 4 xhci_cmd_configure_endpoint: slotid 1, add 0x11, del 0x0 USB MSC vendor='SanDisk' product='Cruzer Facet' rev='1.26' type=0 removable=1 USB MSC blksize=512 sectors=31266816 Registering bootable: USB MSC Drive SanDisk Cruzer Facet 1.26 (type:2 prio:103 data:f16a0) xhci_hub_reset port #2: 0x000006e1, powered, pls 7, speed 1 [Full] XHCI port #2: 0x00200e03, powered, enabled, pls 0, speed 3 [High] set_address 0x7f72ffb0 xhci_alloc_pipe: usbdev 0x7f6e5930, ring 0x7f72f200, slotid 0, epid 1 xhci_cmd_enable_slot: xhci_process_events port #2: 0x00200e03, powered, enabled, pls 0, speed 3 [High] xhci_alloc_pipe: enable slot: got slotid 2 xhci_cmd_address_device: slotid 2 xhci_realloc_pipe: usbdev 0x7f6e5930, ring 0x7f72f200, slotid 2, epid 1 config_usb: 0x7f72f320 device rev=0200 cls=ff sub=ff proto=00 size=64 xhci_realloc_pipe: usbdev 0x7f6e5930, ring 0x7f72f200, slotid 2, epid 1 xhci_hub_reset port #3: 0x00000ae1, powered, pls 7, speed 2 [Low] XHCI port #3: 0x00200a03, powered, enabled, pls 0, speed 2 [Low] set_address 0x7f72ffb0 xhci_alloc_pipe: usbdev 0x7f6e5930, ring 0x7f72f000, slotid 0, epid 1 xhci_cmd_enable_slot: xhci_process_events port #3: 0x00200a03, powered, enabled, pls 0, speed 2 [Low] xhci_alloc_pipe: enable slot: got slotid 3 xhci_cmd_address_device: slotid 3 xhci_realloc_pipe: usbdev 0x7f6e5930, ring 0x7f72f000, slotid 3, epid 1 config_usb: 0x7f72f120 device rev=0110 cls=00 sub=00 proto=00 size=8 xhci_realloc_pipe: usbdev 0x7f6e5930, ring 0x7f72f000, slotid 3, epid 1 usb_hid_setup 0x7f72f120 xhci_alloc_pipe: usbdev 0x7f6e5930, ring 0x000ef200, slotid 0, epid 3 xhci_cmd_configure_endpoint: slotid 3, add 0x9, del 0x0 USB keyboard initialized init hard drives init ahci AHCI controller at 00:14.0, iobase 0xdd498000, irq 11 AHCI: cap 0xc3369f41, ports_impl 0xa AHCI/1: probing AHCI/1: link down AHCI/3: probing AHCI/3: link up AHCI/3: ... finished, status 0x51, ERROR 0x4 AHCI/3: supported modes: udma 6, multi-dma 2, pio 4 AHCI/3: Set transfer mode to UDMA-6 AHCI/3: registering: "AHCI/3: WDC WDS250G2B0B-00YS70 ATA-11 Hard-Disk (232 GiBytes)" Registering bootable: AHCI/3: WDC WDS250G2B0B-00YS70 ATA-11 Hard-Disk (232 GiBytes) (type:2 prio:103 data:f1630) init nvme Found NVMe controller with version 1.2.0. Capabilities 00f000203c033fff q 0x7f72fabe q_idx 1 dbl 0xdd101004 q 0x7f72faac q_idx 0 dbl 0xdd101000 sq 0x7f72faac q_idx 0 sqe 0x7f71a000 admin submission queue: 0x7f71a000 admin completion queue: 0x7f71b000 NVMe has 1 namespace. q 0x7f72fae5 q_idx 3 dbl 0xdd10100c q 0x7f72fad3 q_idx 2 dbl 0xdd101008 sq 0x7f72fad3 q_idx 2 sqe 0x7f715000 sq 0x7f72fad3 create dword10 00ff0001 dword11 00010001 NVMe NS 1: 238475 MiB (488397168 512-byte blocks + 0-byte metadata) Registering bootable: NVMe NS 1: 238475 MiB (488397168 512-byte blocks + 0-byte metadata) (type:2 prio:103 data:f15f0) NVMe initialization complete! init serial Found 3 serial ports Scan for option roms Press ESC for boot menu. Select boot device: 1. AHCI/3: WDC WDS250G2B0B-00YS70 ATA-11 Hard-Disk (232 GiBytes) 2. USB MSC Drive SanDisk Cruzer Facet 1.26 3. NVMe NS 1: 238475 MiB (488397168 512-byte blocks + 0-byte metadata) Searching bootorder for: HALT Mapping hd drive 0x000f16a0 to 0 drive 0x000f16a0: PCHS=0/0/0 translation=lba LCHS=1024/255/63 s=31266816 Mapping hd drive 0x000f1630 to 1 drive 0x000f1630: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=488397168 Mapping hd drive 0x000f15f0 to 2 drive 0x000f15f0: PCHS=0/0/0 translation=lba LCHS=1024/255/63 s=488397168 finalize PMM malloc finalize Space available for UMB: c0000-ee800, f0000-f15f0 Returned 147456 bytes of ZoneHigh e820 map has 8 items: 0: 0000000000000000 - 000000000009fc00 = 1 RAM 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED 3: 0000000000100000 - 000000007f714000 = 1 RAM 4: 000000007f714000 - 0000000080000000 = 2 RESERVED 5: 00000000e0000000 - 00000000f0000000 = 2 RESERVED 6: 00000000fed10000 - 00000000fed18000 = 2 RESERVED 7: 0000000100000000 - 0000000280000000 = 1 RAM Jump to int19 enter handle_19: NULL Booting from Hard Disk... Booting from 0000:7c00 enter handle_12: a=00000000 b=00000000 c=00000000 d=00000000 ds=0000 es=0000 ss=0000 si=00000000 di=00000000 bp=00000000 sp=00007b2e cs=0000 ip=8c2d f=0000 enter handle_12: a=00000200 b=00000000 c=00000000 d=00000000 ds=0000 es=0000 ss=0000 si=00000000 di=00000000 bp=00000000 sp=00007b2e cs=0000 ip=8c2d f=0000 enter handle_12: a=00000000 b=00000000 c=00000000 d=00000000 ds=0000 es=0000 ss=0000 si=00000000 di=00000000 bp=00000000 sp=00007b0e cs=0000 ip=8c2d f=0000 invalid handle_legacy_disk:729: a=00000000 b=00000000 c=00000000 d=00000000 ds=0000 es=0000 ss=0000 si=00000000 di=00000000 bp=00000000 sp=00007b0e cs=0000 ip=8c2d f=0000 unimplemented handle_15XX:330: a=0000ec00 b=00000002 c=00000000 d=00000000 ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000ff60 cs=1000 ip=02fc f=0003 unimplemented handle_16XX:224: a=00000305 b=00000000 c=00000000 d=00000000 ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000ff60 cs=1000 ip=02fc f=0003 unimplemented handle_15XX:330: a=0000e980 b=00000000 c=00000000 d=47534943 ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000ff60 cs=1000 ip=02fc f=0003 ns 1 read lba 0+1: 0 invalid handle_legacy_disk:729: a=00004100 b=000055aa c=00000000 d=00000083 ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00000201 b=00005800 c=00000001 d=00000083 ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00004100 b=000055aa c=00000000 d=00000084 ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00000201 b=00005800 c=00000001 d=00000084 ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00004100 b=000055aa c=00000000 d=00000085 ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00000201 b=00005800 c=00000001 d=00000085 ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00004100 b=000055aa c=00000000 d=00000086 ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00000201 b=00005800 c=00000001 d=00000086 ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00004100 b=000055aa c=00000000 d=00000087 ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00000201 b=00005800 c=00000001 d=00000087 ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00004100 b=000055aa c=00000000 d=00000088 ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00000201 b=00005800 c=00000001 d=00000088 ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00004100 b=000055aa c=00000000 d=00000089 ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00000201 b=00005800 c=00000001 d=00000089 ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00004100 b=000055aa c=00000000 d=0000008a ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00000201 b=00005800 c=00000001 d=0000008a ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00004100 b=000055aa c=00000000 d=0000008b ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00000201 b=00005800 c=00000001 d=0000008b ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00004100 b=000055aa c=00000000 d=0000008c ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00000201 b=00005800 c=00000001 d=0000008c ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00004100 b=000055aa c=00000000 d=0000008d ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00000201 b=00005800 c=00000001 d=0000008d ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00004100 b=000055aa c=00000000 d=0000008e ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00000201 b=00005800 c=00000001 d=0000008e ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00004100 b=000055aa c=00000000 d=0000008f ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003 invalid handle_legacy_disk:729: a=00000201 b=00005800 c=00000001 d=0000008f ds=1000 es=1000 ss=1000 si=00000000 di=00000000 bp=00000000 sp=0000fe88 cs=1000 ip=02fc f=0003

2 years, 1 month

[PATCH] block: Fix compilation with CentOS 6

by Andrew Cooper

GCC 4.4 from CentOS 6 chokes in the following way: src/hw/blockcmd.c: In function 'scsi_rep_luns_scan': src/hw/blockcmd.c:229: error: unknown field 'cdbcmd' specified in initializer src/hw/blockcmd.c:229: warning: missing braces around initializer src/hw/blockcmd.c:229: warning: (near initialization for 'op.<anonymous>') src/hw/blockcmd.c:229: warning: initialization makes integer from pointer without a cast Avoid using an initialiser list. Signed-off-by: Andrew Cooper <andrew.cooper3(a)citrix.com> --- Discovered while adding CentOS 6 to Xen's CI system. If this patch is acceptable, what are the chances of having it backported to 1.12-stable ? --- src/hw/blockcmd.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/src/hw/blockcmd.c b/src/hw/blockcmd.c index 1f15081..a40f37c 100644 --- a/src/hw/blockcmd.c +++ b/src/hw/blockcmd.c @@ -222,16 +222,17 @@ int scsi_rep_luns_scan(struct drive_s *tmp_drive, scsi_add_lun add_lun) struct cdb_report_luns cdb = { .command = CDB_CMD_REPORT_LUNS, }; - struct disk_op_s op = { - .drive_fl = tmp_drive, - .command = CMD_SCSI, - .count = 1, - .cdbcmd = &cdb, - }; + /* GCC 4.4 (CentOS 6) can't initialise anonymous unions. */ + struct disk_op_s op = {}; struct cdbres_report_luns *resp; ASSERT32FLAT(); + op.drive_fl = tmp_drive; + op.command = CMD_SCSI; + op.count = 1; + op.cdbcmd = &cdb; + while (1) { op.blocksize = sizeof(struct cdbres_report_luns) + maxluns * sizeof(struct scsi_lun); -- 2.1.4

2 years, 1 month

[PATCH] block: Fix compilation with CentOS 6

by Andrew Cooper

2 years, 1 month

[PATCH 1/4] vga: move modelist from bochsvga.c to new svgamodes.c

by Gerd Hoffmann

So other drivers can simply use the same list too. Signed-off-by: Gerd Hoffmann <kraxel(a)redhat.com> --- Makefile | 2 +- vgasrc/svgamodes.h | 12 ++++++ vgasrc/bochsvga.c | 102 +++++++-------------------------------------- vgasrc/svgamodes.c | 80 +++++++++++++++++++++++++++++++++++ 4 files changed, 109 insertions(+), 87 deletions(-) create mode 100644 vgasrc/svgamodes.h create mode 100644 vgasrc/svgamodes.c diff --git a/Makefile b/Makefile index d2d11dbef875..3aecc4df743b 100644 --- a/Makefile +++ b/Makefile @@ -212,7 +212,7 @@ SRCVGA=src/output.c src/string.c src/hw/pci.c src/hw/serialio.c \ vgasrc/vgainit.c vgasrc/vgabios.c vgasrc/vgafb.c vgasrc/swcursor.c \ vgasrc/vgafonts.c vgasrc/vbe.c \ vgasrc/stdvga.c vgasrc/stdvgamodes.c vgasrc/stdvgaio.c \ - vgasrc/clext.c vgasrc/bochsvga.c vgasrc/geodevga.c \ + vgasrc/clext.c vgasrc/svgamodes.c vgasrc/bochsvga.c vgasrc/geodevga.c \ src/fw/coreboot.c vgasrc/cbvga.c vgasrc/bochsdisplay.c vgasrc/ramfb.c ifeq "$(CONFIG_VGA_FIXUP_ASM)" "y" diff --git a/vgasrc/svgamodes.h b/vgasrc/svgamodes.h new file mode 100644 index 000000000000..782d30b9768f --- /dev/null +++ b/vgasrc/svgamodes.h @@ -0,0 +1,12 @@ +#ifndef __SVGAMODES_H +#define __SVGAMODES_H + +struct generic_svga_mode { + u16 mode; + struct vgamode_s info; +}; + +extern struct generic_svga_mode svga_modes[] VAR16; +extern unsigned int svga_mcount VAR16; + +#endif /* __SVGAMODES_H */ diff --git a/vgasrc/bochsvga.c b/vgasrc/bochsvga.c index ec5d1018686e..479582f1dd4e 100644 --- a/vgasrc/bochsvga.c +++ b/vgasrc/bochsvga.c @@ -23,98 +23,25 @@ * Mode tables ****************************************************************/ -static struct bochsvga_mode -{ - u16 mode; - struct vgamode_s info; -} bochsvga_modes[] VAR16 = { - /* standard modes */ - { 0x100, { MM_PACKED, 640, 400, 8, 8, 16, SEG_GRAPH } }, - { 0x101, { MM_PACKED, 640, 480, 8, 8, 16, SEG_GRAPH } }, - { 0x102, { MM_PLANAR, 800, 600, 4, 8, 16, SEG_GRAPH } }, - { 0x103, { MM_PACKED, 800, 600, 8, 8, 16, SEG_GRAPH } }, - { 0x104, { MM_PLANAR, 1024, 768, 4, 8, 16, SEG_GRAPH } }, - { 0x105, { MM_PACKED, 1024, 768, 8, 8, 16, SEG_GRAPH } }, - { 0x106, { MM_PLANAR, 1280, 1024, 4, 8, 16, SEG_GRAPH } }, - { 0x107, { MM_PACKED, 1280, 1024, 8, 8, 16, SEG_GRAPH } }, - { 0x10D, { MM_DIRECT, 320, 200, 15, 8, 16, SEG_GRAPH } }, - { 0x10E, { MM_DIRECT, 320, 200, 16, 8, 16, SEG_GRAPH } }, - { 0x10F, { MM_DIRECT, 320, 200, 24, 8, 16, SEG_GRAPH } }, - { 0x110, { MM_DIRECT, 640, 480, 15, 8, 16, SEG_GRAPH } }, - { 0x111, { MM_DIRECT, 640, 480, 16, 8, 16, SEG_GRAPH } }, - { 0x112, { MM_DIRECT, 640, 480, 24, 8, 16, SEG_GRAPH } }, - { 0x113, { MM_DIRECT, 800, 600, 15, 8, 16, SEG_GRAPH } }, - { 0x114, { MM_DIRECT, 800, 600, 16, 8, 16, SEG_GRAPH } }, - { 0x115, { MM_DIRECT, 800, 600, 24, 8, 16, SEG_GRAPH } }, - { 0x116, { MM_DIRECT, 1024, 768, 15, 8, 16, SEG_GRAPH } }, - { 0x117, { MM_DIRECT, 1024, 768, 16, 8, 16, SEG_GRAPH } }, - { 0x118, { MM_DIRECT, 1024, 768, 24, 8, 16, SEG_GRAPH } }, - { 0x119, { MM_DIRECT, 1280, 1024, 15, 8, 16, SEG_GRAPH } }, - { 0x11A, { MM_DIRECT, 1280, 1024, 16, 8, 16, SEG_GRAPH } }, - { 0x11B, { MM_DIRECT, 1280, 1024, 24, 8, 16, SEG_GRAPH } }, - { 0x11C, { MM_PACKED, 1600, 1200, 8, 8, 16, SEG_GRAPH } }, - { 0x11D, { MM_DIRECT, 1600, 1200, 15, 8, 16, SEG_GRAPH } }, - { 0x11E, { MM_DIRECT, 1600, 1200, 16, 8, 16, SEG_GRAPH } }, - { 0x11F, { MM_DIRECT, 1600, 1200, 24, 8, 16, SEG_GRAPH } }, - /* BOCHS modes */ - { 0x140, { MM_DIRECT, 320, 200, 32, 8, 16, SEG_GRAPH } }, - { 0x141, { MM_DIRECT, 640, 400, 32, 8, 16, SEG_GRAPH } }, - { 0x142, { MM_DIRECT, 640, 480, 32, 8, 16, SEG_GRAPH } }, - { 0x143, { MM_DIRECT, 800, 600, 32, 8, 16, SEG_GRAPH } }, - { 0x144, { MM_DIRECT, 1024, 768, 32, 8, 16, SEG_GRAPH } }, - { 0x145, { MM_DIRECT, 1280, 1024, 32, 8, 16, SEG_GRAPH } }, - { 0x146, { MM_PACKED, 320, 200, 8, 8, 16, SEG_GRAPH } }, - { 0x147, { MM_DIRECT, 1600, 1200, 32, 8, 16, SEG_GRAPH } }, - { 0x148, { MM_PACKED, 1152, 864, 8, 8, 16, SEG_GRAPH } }, - { 0x149, { MM_DIRECT, 1152, 864, 15, 8, 16, SEG_GRAPH } }, - { 0x14a, { MM_DIRECT, 1152, 864, 16, 8, 16, SEG_GRAPH } }, - { 0x14b, { MM_DIRECT, 1152, 864, 24, 8, 16, SEG_GRAPH } }, - { 0x14c, { MM_DIRECT, 1152, 864, 32, 8, 16, SEG_GRAPH } }, - { 0x175, { MM_DIRECT, 1280, 768, 16, 8, 16, SEG_GRAPH } }, - { 0x176, { MM_DIRECT, 1280, 768, 24, 8, 16, SEG_GRAPH } }, - { 0x177, { MM_DIRECT, 1280, 768, 32, 8, 16, SEG_GRAPH } }, - { 0x178, { MM_DIRECT, 1280, 800, 16, 8, 16, SEG_GRAPH } }, - { 0x179, { MM_DIRECT, 1280, 800, 24, 8, 16, SEG_GRAPH } }, - { 0x17a, { MM_DIRECT, 1280, 800, 32, 8, 16, SEG_GRAPH } }, - { 0x17b, { MM_DIRECT, 1280, 960, 16, 8, 16, SEG_GRAPH } }, - { 0x17c, { MM_DIRECT, 1280, 960, 24, 8, 16, SEG_GRAPH } }, - { 0x17d, { MM_DIRECT, 1280, 960, 32, 8, 16, SEG_GRAPH } }, - { 0x17e, { MM_DIRECT, 1440, 900, 16, 8, 16, SEG_GRAPH } }, - { 0x17f, { MM_DIRECT, 1440, 900, 24, 8, 16, SEG_GRAPH } }, - { 0x180, { MM_DIRECT, 1440, 900, 32, 8, 16, SEG_GRAPH } }, - { 0x181, { MM_DIRECT, 1400, 1050, 16, 8, 16, SEG_GRAPH } }, - { 0x182, { MM_DIRECT, 1400, 1050, 24, 8, 16, SEG_GRAPH } }, - { 0x183, { MM_DIRECT, 1400, 1050, 32, 8, 16, SEG_GRAPH } }, - { 0x184, { MM_DIRECT, 1680, 1050, 16, 8, 16, SEG_GRAPH } }, - { 0x185, { MM_DIRECT, 1680, 1050, 24, 8, 16, SEG_GRAPH } }, - { 0x186, { MM_DIRECT, 1680, 1050, 32, 8, 16, SEG_GRAPH } }, - { 0x187, { MM_DIRECT, 1920, 1200, 16, 8, 16, SEG_GRAPH } }, - { 0x188, { MM_DIRECT, 1920, 1200, 24, 8, 16, SEG_GRAPH } }, - { 0x189, { MM_DIRECT, 1920, 1200, 32, 8, 16, SEG_GRAPH } }, - { 0x18a, { MM_DIRECT, 2560, 1600, 16, 8, 16, SEG_GRAPH } }, - { 0x18b, { MM_DIRECT, 2560, 1600, 24, 8, 16, SEG_GRAPH } }, - { 0x18c, { MM_DIRECT, 2560, 1600, 32, 8, 16, SEG_GRAPH } }, - { 0x18d, { MM_DIRECT, 1280, 720, 16, 8, 16, SEG_GRAPH } }, - { 0x18e, { MM_DIRECT, 1280, 720, 24, 8, 16, SEG_GRAPH } }, - { 0x18f, { MM_DIRECT, 1280, 720, 32, 8, 16, SEG_GRAPH } }, - { 0x190, { MM_DIRECT, 1920, 1080, 16, 8, 16, SEG_GRAPH } }, - { 0x191, { MM_DIRECT, 1920, 1080, 24, 8, 16, SEG_GRAPH } }, - { 0x192, { MM_DIRECT, 1920, 1080, 32, 8, 16, SEG_GRAPH } }, -}; +#include "svgamodes.h" static int dispi_found VAR16 = 0; static int is_bochsvga_mode(struct vgamode_s *vmode_g) { - return (vmode_g >= &bochsvga_modes[0].info - && vmode_g <= &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)-1].info); + unsigned int mcount = GET_GLOBAL(svga_mcount); + + return (vmode_g >= &svga_modes[0].info + && vmode_g <= &svga_modes[mcount-1].info); } struct vgamode_s *bochsvga_find_mode(int mode) { - struct bochsvga_mode *m = bochsvga_modes; + struct generic_svga_mode *m = svga_modes; + unsigned int mcount = GET_GLOBAL(svga_mcount); + if (GET_GLOBAL(dispi_found)) - for (; m < &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)]; m++) + for (; m < &svga_modes[mcount]; m++) if (GET_GLOBAL(m->mode) == mode) return &m->info; return stdvga_find_mode(mode); @@ -123,9 +50,11 @@ struct vgamode_s *bochsvga_find_mode(int mode) void bochsvga_list_modes(u16 seg, u16 *dest, u16 *last) { - struct bochsvga_mode *m = bochsvga_modes; + struct generic_svga_mode *m = svga_modes; + unsigned int mcount = GET_GLOBAL(svga_mcount); + if (GET_GLOBAL(dispi_found)) { - for (; m < &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)] && dest<last; m++) { + for (; m < &svga_modes[mcount] && dest<last; m++) { u16 mode = GET_GLOBAL(m->mode); if (mode == 0xffff) continue; @@ -429,8 +358,9 @@ bochsvga_setup(void) u16 max_xres = dispi_read(VBE_DISPI_INDEX_XRES); u16 max_bpp = dispi_read(VBE_DISPI_INDEX_BPP); dispi_write(VBE_DISPI_INDEX_ENABLE, en); - struct bochsvga_mode *m = bochsvga_modes; - for (; m < &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)]; m++) { + struct generic_svga_mode *m = svga_modes; + unsigned int mcount = GET_GLOBAL(svga_mcount); + for (; m < &svga_modes[mcount]; m++) { u16 width = GET_GLOBAL(m->info.width); u16 height = GET_GLOBAL(m->info.height); u8 depth = GET_GLOBAL(m->info.depth); diff --git a/vgasrc/svgamodes.c b/vgasrc/svgamodes.c new file mode 100644 index 000000000000..013504c3e691 --- /dev/null +++ b/vgasrc/svgamodes.c @@ -0,0 +1,80 @@ +#include "stdvga.h" // SEG_GRAPH +#include "vgabios.h" // VAR16 + +#include "svgamodes.h" + +struct generic_svga_mode svga_modes[] VAR16 = { + /* standard modes */ + { 0x100, { MM_PACKED, 640, 400, 8, 8, 16, SEG_GRAPH } }, + { 0x101, { MM_PACKED, 640, 480, 8, 8, 16, SEG_GRAPH } }, + { 0x102, { MM_PLANAR, 800, 600, 4, 8, 16, SEG_GRAPH } }, + { 0x103, { MM_PACKED, 800, 600, 8, 8, 16, SEG_GRAPH } }, + { 0x104, { MM_PLANAR, 1024, 768, 4, 8, 16, SEG_GRAPH } }, + { 0x105, { MM_PACKED, 1024, 768, 8, 8, 16, SEG_GRAPH } }, + { 0x106, { MM_PLANAR, 1280, 1024, 4, 8, 16, SEG_GRAPH } }, + { 0x107, { MM_PACKED, 1280, 1024, 8, 8, 16, SEG_GRAPH } }, + { 0x10D, { MM_DIRECT, 320, 200, 15, 8, 16, SEG_GRAPH } }, + { 0x10E, { MM_DIRECT, 320, 200, 16, 8, 16, SEG_GRAPH } }, + { 0x10F, { MM_DIRECT, 320, 200, 24, 8, 16, SEG_GRAPH } }, + { 0x110, { MM_DIRECT, 640, 480, 15, 8, 16, SEG_GRAPH } }, + { 0x111, { MM_DIRECT, 640, 480, 16, 8, 16, SEG_GRAPH } }, + { 0x112, { MM_DIRECT, 640, 480, 24, 8, 16, SEG_GRAPH } }, + { 0x113, { MM_DIRECT, 800, 600, 15, 8, 16, SEG_GRAPH } }, + { 0x114, { MM_DIRECT, 800, 600, 16, 8, 16, SEG_GRAPH } }, + { 0x115, { MM_DIRECT, 800, 600, 24, 8, 16, SEG_GRAPH } }, + { 0x116, { MM_DIRECT, 1024, 768, 15, 8, 16, SEG_GRAPH } }, + { 0x117, { MM_DIRECT, 1024, 768, 16, 8, 16, SEG_GRAPH } }, + { 0x118, { MM_DIRECT, 1024, 768, 24, 8, 16, SEG_GRAPH } }, + { 0x119, { MM_DIRECT, 1280, 1024, 15, 8, 16, SEG_GRAPH } }, + { 0x11A, { MM_DIRECT, 1280, 1024, 16, 8, 16, SEG_GRAPH } }, + { 0x11B, { MM_DIRECT, 1280, 1024, 24, 8, 16, SEG_GRAPH } }, + { 0x11C, { MM_PACKED, 1600, 1200, 8, 8, 16, SEG_GRAPH } }, + { 0x11D, { MM_DIRECT, 1600, 1200, 15, 8, 16, SEG_GRAPH } }, + { 0x11E, { MM_DIRECT, 1600, 1200, 16, 8, 16, SEG_GRAPH } }, + { 0x11F, { MM_DIRECT, 1600, 1200, 24, 8, 16, SEG_GRAPH } }, + /* other modes */ + { 0x140, { MM_DIRECT, 320, 200, 32, 8, 16, SEG_GRAPH } }, + { 0x141, { MM_DIRECT, 640, 400, 32, 8, 16, SEG_GRAPH } }, + { 0x142, { MM_DIRECT, 640, 480, 32, 8, 16, SEG_GRAPH } }, + { 0x143, { MM_DIRECT, 800, 600, 32, 8, 16, SEG_GRAPH } }, + { 0x144, { MM_DIRECT, 1024, 768, 32, 8, 16, SEG_GRAPH } }, + { 0x145, { MM_DIRECT, 1280, 1024, 32, 8, 16, SEG_GRAPH } }, + { 0x146, { MM_PACKED, 320, 200, 8, 8, 16, SEG_GRAPH } }, + { 0x147, { MM_DIRECT, 1600, 1200, 32, 8, 16, SEG_GRAPH } }, + { 0x148, { MM_PACKED, 1152, 864, 8, 8, 16, SEG_GRAPH } }, + { 0x149, { MM_DIRECT, 1152, 864, 15, 8, 16, SEG_GRAPH } }, + { 0x14a, { MM_DIRECT, 1152, 864, 16, 8, 16, SEG_GRAPH } }, + { 0x14b, { MM_DIRECT, 1152, 864, 24, 8, 16, SEG_GRAPH } }, + { 0x14c, { MM_DIRECT, 1152, 864, 32, 8, 16, SEG_GRAPH } }, + { 0x175, { MM_DIRECT, 1280, 768, 16, 8, 16, SEG_GRAPH } }, + { 0x176, { MM_DIRECT, 1280, 768, 24, 8, 16, SEG_GRAPH } }, + { 0x177, { MM_DIRECT, 1280, 768, 32, 8, 16, SEG_GRAPH } }, + { 0x178, { MM_DIRECT, 1280, 800, 16, 8, 16, SEG_GRAPH } }, + { 0x179, { MM_DIRECT, 1280, 800, 24, 8, 16, SEG_GRAPH } }, + { 0x17a, { MM_DIRECT, 1280, 800, 32, 8, 16, SEG_GRAPH } }, + { 0x17b, { MM_DIRECT, 1280, 960, 16, 8, 16, SEG_GRAPH } }, + { 0x17c, { MM_DIRECT, 1280, 960, 24, 8, 16, SEG_GRAPH } }, + { 0x17d, { MM_DIRECT, 1280, 960, 32, 8, 16, SEG_GRAPH } }, + { 0x17e, { MM_DIRECT, 1440, 900, 16, 8, 16, SEG_GRAPH } }, + { 0x17f, { MM_DIRECT, 1440, 900, 24, 8, 16, SEG_GRAPH } }, + { 0x180, { MM_DIRECT, 1440, 900, 32, 8, 16, SEG_GRAPH } }, + { 0x181, { MM_DIRECT, 1400, 1050, 16, 8, 16, SEG_GRAPH } }, + { 0x182, { MM_DIRECT, 1400, 1050, 24, 8, 16, SEG_GRAPH } }, + { 0x183, { MM_DIRECT, 1400, 1050, 32, 8, 16, SEG_GRAPH } }, + { 0x184, { MM_DIRECT, 1680, 1050, 16, 8, 16, SEG_GRAPH } }, + { 0x185, { MM_DIRECT, 1680, 1050, 24, 8, 16, SEG_GRAPH } }, + { 0x186, { MM_DIRECT, 1680, 1050, 32, 8, 16, SEG_GRAPH } }, + { 0x187, { MM_DIRECT, 1920, 1200, 16, 8, 16, SEG_GRAPH } }, + { 0x188, { MM_DIRECT, 1920, 1200, 24, 8, 16, SEG_GRAPH } }, + { 0x189, { MM_DIRECT, 1920, 1200, 32, 8, 16, SEG_GRAPH } }, + { 0x18a, { MM_DIRECT, 2560, 1600, 16, 8, 16, SEG_GRAPH } }, + { 0x18b, { MM_DIRECT, 2560, 1600, 24, 8, 16, SEG_GRAPH } }, + { 0x18c, { MM_DIRECT, 2560, 1600, 32, 8, 16, SEG_GRAPH } }, + { 0x18d, { MM_DIRECT, 1280, 720, 16, 8, 16, SEG_GRAPH } }, + { 0x18e, { MM_DIRECT, 1280, 720, 24, 8, 16, SEG_GRAPH } }, + { 0x18f, { MM_DIRECT, 1280, 720, 32, 8, 16, SEG_GRAPH } }, + { 0x190, { MM_DIRECT, 1920, 1080, 16, 8, 16, SEG_GRAPH } }, + { 0x191, { MM_DIRECT, 1920, 1080, 24, 8, 16, SEG_GRAPH } }, + { 0x192, { MM_DIRECT, 1920, 1080, 32, 8, 16, SEG_GRAPH } }, +}; +unsigned int svga_mcount VAR16 = ARRAY_SIZE(svga_modes); -- 2.18.1

2 years, 2 months

1.12.1 stable release

by Gerd Hoffmann

Hi, Time to prepare the 1.12.1 stable release for the upcoming qemu 4.0. These patches went into master since 1.12.0: # git log --reverse --oneline rel-1.12.0..master 42efebdf1d12 tpm: Check for TPM related ACPI tables before attempting hw probe 628b2e6b0e39 pvscsi: ring_desc do not have to be page aligned 75b428351345 qemu: avoid debug prints if debugcon is not enabled 29ba89e67ff3 output: Avoid thunking to 16bit mode in printf() if no vgabios d62ca8c9c53f docs: Update mailing list archive links 34fe8660ec42 docs: Fix cut-and-paste error in Mailinglist.md archive link 63d69674666e bootsplash: Added support for 16/24/32bpp in one function 996d3c029713 usb-ehci: Clear pipe token on pipe reallocate b7dbd200cfe9 tcgbios: Use table to convert hash to buffer size 171fc8979dc7 tcgbios: Implement TPM 2.0 menu item to activate and deactivate PCR banks 42efebdf1d12 is already cherry-picked into the 1.12-stable branch. 996d3c029713 looks like an obvious bugfix to me. Other requests / candidates? thanks, Gerd

2 years, 2 months

Need help! Seabios hangs on "Press ESC for boot menu".

by Дмитрий Понаморев

Seabios freezes (hangs) on "Press ESC for boot menu". Does not respond to the keyboard and does not boot from the sata disk. Last post code 0x7b. Console (full) output in putty_atomC3538.log. Coreboot 4.9 cfg in coreboot.config. Seabios config in seabios.config.

2 years, 2 months

Re: SeaBIOS compile on OpenBSD with SeaVGABIOS planar & cga page offset support

by puffy daemon

I attach the final patch.

2 years, 2 months

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SeaBIOS March 2019