On Thu, Oct 13, 2011 at 03:56:48PM +0200, Wolfgang Kamp - datakamp wrote:
>
> Hi,
>
> is there any solution for the usb boot issue of the AMD SB800 Persimmon platform
> with SeaBIOS 1.6.3 and actual Coreboot version?
I'm unfamiliar with the issue. Can you post the SeaBIOS debug output
along with a description of the issue you are seeing?
-Kevin
Hi List,
i have seabios running on a Thinkpad T60 with coreboot and seabios as
Payload. When trying to boot from a USB cdrom, i get the following errors:
Booting from DVD/CD...
wait_td error - status=184007ff
uhci_send_bulk failed
USB transmission failed
wait_td error - status=184007ff
uhci_send_bulk failed
USB transmission failed
WARNING - Timeout at wait_td:427!
uhci_send_bulk failed
USB transmission failed
WARNING - Timeout at wait_td:427!
uhci_send_bulk failed
USB transmission failed
read capacity failed
atapi_is_ready returned -1
WARNING - Timeout at wait_td:427!
uhci_send_bulk failed
USB transmission failed
Boot failed: Could not read from CDROM (code 0003)
I have no knowledge about USB, so if anybody could
help me in interpreting those messages, or has an
other idea what the problem is, that would be great.
Thanks,
Sven
When using seabios with Xen and qemu, I frequently get the following
message:
WARNING - Timeout at i8042_flush:69!
I do have a slightly unusual configuration compared to the typical Xen
configuration. We are running with no hvmloader. However I don't think
that's related to this issue....
The flush routine attempts to read the queue depth's worth of data from
the port and then checks to see if the queue is empty. There are two
issues with this. First is that qemu and seabios disagree about the
queue depth. Qemu's ps2 buffer has 256 entries, and I8042_BUFFER_SIZE is
16 for seabios. The second is that a command may arrive between the
start of the flush loop and the completion.
I believe a more robust way to do this would be to first issue a RESET
command, and then flush. That resolves the issue that I am seeing.
Signed-off By: John Baboval <john.baboval(a)virtualcomputer.com>
---
diff --git a/src/ps2port.c b/src/ps2port.c
index 58335af..4ed25bf 100644
--- a/src/ps2port.c
+++ b/src/ps2port.c
@@ -20,7 +20,7 @@
// Timeout value.
#define I8042_CTL_TIMEOUT 10000
-#define I8042_BUFFER_SIZE 16
+#define I8042_BUFFER_SIZE 256
static int
i8042_wait_read(void)
@@ -391,7 +391,7 @@ handle_09(void)
}
v = inb(PORT_PS2_DATA);
- if (!(GET_EBDA(ps2ctr) & I8042_CTR_KBDINT))
+ if (!(GET_EBDA(ps2ctr) & I8042_CTR_KBDINT))
// Interrupts not enabled.
goto done;
@@ -409,13 +409,17 @@ done:
static void
keyboard_init(void *data)
{
+ int ret;
+ u8 param[2];
/* flush incoming keys */
- int ret = i8042_flush();
+ ret = ps2_kbd_command(ATKBD_CMD_RESET_BAT, param);
+ if (ret)
+ return;
+ ret = i8042_flush();
if (ret)
return;
// Controller self-test.
- u8 param[2];
ret = i8042_command(I8042_CMD_CTL_TEST, param);
if (ret)
return;
(2011/10/28 21:48), Jun Koi wrote:
> 2011/10/28 Kenji Kaneshige<kaneshige.kenji(a)jp.fujitsu.com>:
>> Avi, Jan,
>>
>> Could you comment on these patches?
>>
>> Inject-NMI doesn't work on Windows guest without these patches.
>
> sorry but i am really curious here: why Windows still works well even
> if it desnt see the inject-NMI?
> or there are still invisible side-effects that we are not awere of???
Without this patch, LVT LINT1 is not configured by Windows guest because
seabios MADT has no ACPI NMI structure which is used by Windows to setup
LVT. So NMI interrupt would not be sent to CPUs when NMI signal happens
on LINT1. But qemu/kvm inject-nmi feature had a bug that it sent NMI to
CPUs without emulating LAPIC LVT. As a result, NMI interrupt is sent to
all the CPUs even though LVT LINT1 is not configured. This is why
inject-nmi behaves as if it works well on Windows guest.
Regards,
Kenji Kaneshige
On Sat, Oct 22, 2011 at 01:40:08AM +0700, Darmawan Salihun wrote:
> Hi Kevin,
>
> >> The log for my target option ROM was inadvertently not included.
> >> Here it is:
> >> ------------
> > [...]
> >> pnp call arg1=50
> >> --------------
> >
> > Hrmm - the PNP support in SeaBIOS is really just a stub. The 0x50
> > function isn't supported (it looks to be an smbios call).
> >
> > -Kevin
> >
>
> Is there another file besides pnpbios.c which implement the stub?
> I grep-ed through the SeaBIOS source but that's the only one I found.
The PNP stuff is entirely in pnpbios.c. The only call supported is
0x60 - which is needed to convince gPXE to relocate itself to high
memory.
-Kevin
From: Kenji Kaneshige <kaneshige.kenji(a)jp.fujitsu.com>
In the current seabios MP table description, NMI is connected only to
BSP's LINT1. But usually NMI is connected to all the CPUs' LINT1 as
indicated in MP specification. This patch changes seabios MP table to
describe NMI is connected to all the CPUs' LINT1.
Signed-off-by: Kenji Kaneshige <kaneshige.kenji(a)jp.fujitsu.com>
Reviewed-by: Lai Jiangshan <laijs(a)cn.fujitsu.com>
---
src/mptable.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: seabios/src/mptable.c
===================================================================
--- seabios.orig/src/mptable.c
+++ seabios/src/mptable.c
@@ -169,7 +169,7 @@ mptable_init(void)
intsrc->irqflag = 0; /* PO, EL default */
intsrc->srcbus = isabusid; /* ISA */
intsrc->srcbusirq = 0;
- intsrc->dstapic = 0; /* BSP == APIC #0 */
+ intsrc->dstapic = 0xff; /* to all local APICs */
intsrc->dstirq = 1; /* LINTIN1 */
intsrc++;
entrycount += intsrc - intsrcs;
Add ACPI_EXTRACT_ALL_CODE directive, to support extracting
AML code from listing into a named array. Use that instead including C
file generated by iasl, this makes it possible to include multiple AML
tables without resorting to preprocessor tricks.
Signed-off-by: Michael S. Tsirkin <mst(a)redhat.com>
---
Kevin, you suggested something like the below, I think? Seems to work
but RFC since I didn't have time to test this properly.
diff --git a/Makefile b/Makefile
index 91d9b77..200a07a 100644
--- a/Makefile
+++ b/Makefile
@@ -198,7 +198,7 @@ src/%.hex: src/%.dsl ./tools/acpi_extract_preprocess.py ./tools/acpi_extract.py
$(Q)./tools/acpi_extract_preprocess.py $(OUT)$*.dsl.i.orig > $(OUT)$*.dsl.i
$(Q)iasl -l -tc -p $(OUT)$* $(OUT)$*.dsl.i
$(Q)./tools/acpi_extract.py $(OUT)$*.lst > $(OUT)$*.off
- $(Q)cat $(OUT)$*.hex $(OUT)$*.off > $@
+ $(Q)cat $(OUT)$*.off > $@
$(OUT)ccode32flat.o: src/acpi-dsdt.hex src/ssdt-proc.hex
diff --git a/src/acpi-dsdt.dsl b/src/acpi-dsdt.dsl
index a5f0a4d..b9b06f2 100644
--- a/src/acpi-dsdt.dsl
+++ b/src/acpi-dsdt.dsl
@@ -16,6 +16,9 @@
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
+
+ACPI_EXTRACT_ALL_CODE AmlCode
+
DefinitionBlock (
"acpi-dsdt.aml", // Output Filename
"DSDT", // Signature
diff --git a/src/acpi.c b/src/acpi.c
index 27a939e..f743bdd 100644
--- a/src/acpi.c
+++ b/src/acpi.c
@@ -366,9 +366,7 @@ encodeLen(u8 *ssdt_ptr, int length, int bytes)
return ssdt_ptr + bytes;
}
-#define AmlCode static ssdp_proc_aml
#include "ssdt-proc.hex"
-#undef AmlCode
/* 0x5B 0x83 ProcessorOp PkgLength NameString ProcID */
#define SD_OFFSET_CPUHEX (*ssdt_proc_name - *ssdt_proc_start + 2)
diff --git a/src/ssdt-proc.dsl b/src/ssdt-proc.dsl
index a461636..0339422 100644
--- a/src/ssdt-proc.dsl
+++ b/src/ssdt-proc.dsl
@@ -14,6 +14,9 @@
* and a CPON array with the list of active and inactive cpus:
* Name(CPON, Package() { One, One, ..., Zero, Zero, ... })
*/
+
+ACPI_EXTRACT_ALL_CODE ssdp_proc_aml
+
DefinitionBlock ("ssdt-proc.aml", "SSDT", 0x01, "BXPC", "BXSSDT", 0x1)
{
ACPI_EXTRACT_PROCESSOR_START ssdt_proc_start
diff --git a/tools/acpi_extract.py b/tools/acpi_extract.py
index 9083cff..5f613e4 100755
--- a/tools/acpi_extract.py
+++ b/tools/acpi_extract.py
@@ -29,6 +29,8 @@
# ACPI_EXTRACT_PROCESSOR_START - start of Processor() block
# ACPI_EXTRACT_PROCESSOR_STRING - extract a NameString from Processor()
# ACPI_EXTRACT_PROCESSOR_END - offset at last byte of Processor() + 1
+#
+# ACPI_EXTRACT_ALL_CODE - create an array storing the generated AML bytecode
#
# ACPI_EXTRACT is not allowed anywhere else in code, except in comments.
@@ -240,6 +242,11 @@ for i in range(len(asl)):
array = mext.group(2)
offset = asl[i].aml_offset
+ if (directive == "ACPI_EXTRACT_ALL_CODE"):
+ if array in output:
+ die("%s directive used more than once" % directive)
+ output[array] = aml
+ continue
if (directive == "ACPI_EXTRACT_NAME_DWORD_CONST"):
offset = aml_name_dword_const(offset)
elif (directive == "ACPI_EXTRACT_NAME_WORD_CONST"):
@@ -261,21 +268,25 @@ for i in range(len(asl)):
if array not in output:
output[array] = []
- output[array].append("0x%x" % offset)
+ output[array].append(offset)
debug = "at end of file"
-#Use type large enough to fit the table
-if (len(aml) >= 0x10000):
- offsettype = "int"
-elif (len(aml) >= 0x100):
- offsettype = "short"
-else:
- offsettype = "char"
+def get_value_type(maxvalue):
+ #Use type large enough to fit the table
+ if (maxvalue >= 0x10000):
+ return "int"
+ elif (maxvalue >= 0x100):
+ return "short"
+ else:
+ return "char"
# Pretty print output
for array in output.keys():
-
- sys.stdout.write("static unsigned %s %s[] = {\n" % (offsettype, array))
- sys.stdout.write(",\n".join(output[array]))
+ otype = get_value_type(max(output[array]))
+ odata = []
+ for value in output[array]:
+ odata.append("0x%x" % value)
+ sys.stdout.write("static unsigned %s %s[] = {\n" % (otype, array))
+ sys.stdout.write(",\n".join(odata))
sys.stdout.write('\n};\n');
This patch allows loading ACPI DSDT from qemu via fw_cfg interface.
So this patch makes it easy for users to replace existing DSDT embed in
seabios binary.
Isaku Yamahata (2):
util: add le32_to_cpu()
seabios: acpi: allow qemu to load dsdt as external acpi table.
src/acpi.c | 47 +++++++++++++++++++++++++++++++++++++++--------
src/util.h | 5 +++++
2 files changed, 44 insertions(+), 8 deletions(-)
