[PATCH 0/6] pci patches

[Gerd Hoffmann]

Hi,

Here is my pci patch collection, mostly but not completely related to
64bit pci support.  It brings back the ressource entry for the 64bit pci
i/o window.  It is (with all patches applied) only present in case
seabios actually mapped something high to avoid confusing old guests for
no reason.

Tested with Linux, windows xp (32bit maps only) and windows 7, all
working fine.  Ressources show up as they should.  Linux: check
/proc/{iomem,ioports}.  Windows: device manager -> system devices ->
pci bus -> properties -> ressources.

please review & test,
  Gerd

The following changes since commit 0c8f58d78543a06a57f4280dd3498807a1d9005d:

pci: handle bridge irq mapping (2012-05-12 14:15:35 -0400)

are available in the git repository at:
  git://git.kraxel.org/seabios pci64

Gerd Hoffmann (6):
      remove iasl-generated hex files from git repo
      pci: init all devices
      update bios date
      pciinit: make pci ressources configurable
      update dsdt ressources at runtime
      pci: runtime i/o window sizing

Makefile           |    2 +-
 src/.gitignore     |    1 +
 src/acpi-dsdt.dsl  |   63 +-
 src/acpi-dsdt.hex  | 4387 ----------------------------------------------------
 src/acpi.c         |   28 +-
 src/pci.h          |    2 +
 src/pciinit.c      |   41 +-
 src/smbios.c       |    2 +-
 src/ssdt-pcihp.hex | 1672 --------------------
 src/ssdt-proc.hex  |  134 --
 10 files changed, 123 insertions(+), 6209 deletions(-)
 create mode 100644 src/.gitignore
 delete mode 100644 src/acpi-dsdt.hex
 delete mode 100644 src/ssdt-pcihp.hex
 delete mode 100644 src/ssdt-proc.hex

[PATCH 1/6] remove iasl-generated hex files from git repo

[Gerd Hoffmann]

Almost every linux distro has iasl packaged these days.
Lets make it a build dependency and stop the hassle we
have with updating the *.hex files in the git repo.

Signed-off-by: Gerd Hoffmann 
---
 Makefile           |    2 +-
 src/.gitignore     |    1 +
 src/acpi-dsdt.hex  | 4387 ----------------------------------------------------
 src/ssdt-pcihp.hex | 1672 --------------------
 src/ssdt-proc.hex  |  134 --
 5 files changed, 2 insertions(+), 6194 deletions(-)
 create mode 100644 src/.gitignore
 delete mode 100644 src/acpi-dsdt.hex
 delete mode 100644 src/ssdt-pcihp.hex
 delete mode 100644 src/ssdt-proc.hex

diff --git a/Makefile b/Makefile
index 7d01652..2a5adfe 100644
--- a/Makefile
+++ b/Makefile
@@ -247,7 +247,7 @@ help: ; $(call do-kconfig, $@)
 ################ Generic rules

clean:
-	$(Q)rm -rf $(OUT)
+	$(Q)rm -rf $(OUT) src/*.hex

distclean: clean
    $(Q)rm -f .config .config.old
diff --git a/src/.gitignore b/src/.gitignore
new file mode 100644
index 0000000..eee4db0
--- /dev/null
+++ b/src/.gitignore
@@ -0,0 +1 @@
+*.hex
diff --git a/src/acpi-dsdt.hex b/src/acpi-dsdt.hex
deleted file mode 100644
index a4af597..0000000
--- a/src/acpi-dsdt.hex
+++ /dev/null
@@ -1,4387 +0,0 @@
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-};
diff --git a/src/ssdt-pcihp.hex b/src/ssdt-pcihp.hex
deleted file mode 100644
index b15ad5a..0000000
--- a/src/ssdt-pcihp.hex
+++ /dev/null
@@ -1,1672 +0,0 @@
-static unsigned short aml_adr_dword[] = {
-0x3e,
-0x62,
-0x88,
-0xae,
-0xd4,
-0xfa,
-0x120,
-0x146,
-0x16c,
-0x192,
-0x1b8,
-0x1de,
-0x204,
-0x22a,
-0x250,
-0x276,
-0x29c,
-0x2c2,
-0x2e8,
-0x30e,
-0x334,
-0x35a,
-0x380,
-0x3a6,
-0x3cc,
-0x3f2,
-0x418,
-0x43e,
-0x464,
-0x48a,
-0x4b0
-};
-static unsigned short aml_ej0_name[] = {
-0x44,
-0x68,
-0x8e,
-0xb4,
-0xda,
-0x100,
-0x126,
-0x14c,
-0x172,
-0x198,
-0x1be,
-0x1e4,
-0x20a,
-0x230,
-0x256,
-0x27c,
-0x2a2,
-0x2c8,
-0x2ee,
-0x314,
-0x33a,
-0x360,
-0x386,
-0x3ac,
-0x3d2,
-0x3f8,
-0x41e,
-0x444,
-0x46a,
-0x490,
-0x4b6
-};
-static unsigned char ssdp_pcihp_aml[] = {
-0x53,
-0x53,
-0x44,
-0x54,
-0x44,
-0x6,
-0x0,
-0x0,
-0x1,
-0x94,
-0x42,
-0x58,
-0x50,
-0x43,
-0x0,
-0x0,
-0x42,
-0x58,
-0x53,
-0x53,
-0x44,
-0x54,
-0x50,
-0x43,
-0x1,
-0x0,
-0x0,
-0x0,
-0x49,
-0x4e,
-0x54,
-0x4c,
-0x28,
-0x5,
-0x10,
-0x20,
-0x10,
-0x4f,
-0x61,
-0x5c,
-0x2e,
-0x5f,
-0x53,
-0x42,
-0x5f,
-0x50,
-0x43,
-0x49,
-0x30,
-0x5b,
-0x82,
-0x22,
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-0x69
-};
diff --git a/src/ssdt-proc.hex b/src/ssdt-proc.hex
deleted file mode 100644
index a28172e..0000000
--- a/src/ssdt-proc.hex
+++ /dev/null
@@ -1,134 +0,0 @@
-static unsigned char ssdt_proc_name[] = {
-0x28
-};
-static unsigned char ssdp_proc_aml[] = {
-0x53,
-0x53,
-0x44,
-0x54,
-0x78,
-0x0,
-0x0,
-0x0,
-0x1,
-0xb3,
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-0xd,
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-0x50,
-0x49,
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-0x30,
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-0x0,
-0x14,
-0xf,
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-0x4d,
-0x41,
-0x54,
-0x0,
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-0x50,
-0x53,
-0x54,
-0x49,
-0x44,
-0x5f,
-0x5f,
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-0xf,
-0x5f,
-0x45,
-0x4a,
-0x30,
-0x1,
-0x43,
-0x50,
-0x45,
-0x4a,
-0x49,
-0x44,
-0x5f,
-0x5f,
-0x68
-};
-static unsigned char ssdt_proc_id[] = {
-0x38
-};
-static unsigned char ssdt_proc_end[] = {
-0x78
-};
-static unsigned char ssdt_proc_start[] = {
-0x24
-};

[PATCH 1/6] remove iasl-generated hex files from git repo

[Marc Jones]

On Tue, May 15, 2012 at 4:46 AM, Gerd Hoffmann  wrote:
> Almost every linux distro has iasl packaged these days.
> Lets make it a build dependency and stop the hassle we
> have with updating the *.hex files in the git repo.
> Signed-off-by: Gerd Hoffmann
>
> Makefile           |    2 +-
>  src/.gitignore     |    1 +
>  src/acpi-dsdt.hex  | 4387 ----------------------------------------------------
>  src/ssdt-pcihp.hex | 1672 --------------------
>  src/ssdt-proc.hex  |  134 --
>  5 files changed, 2 insertions(+), 6194 deletions(-)
>  create mode 100644 src/.gitignore
>  delete mode 100644 src/acpi-dsdt.hex
>  delete mode 100644 src/ssdt-pcihp.hex
>  delete mode 100644 src/ssdt-proc.hex
>
> diff --git a/Makefile b/Makefile
> index 7d01652..2a5adfe 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -247,7 +247,7 @@ help: ; $(call do-kconfig, $@)
>  ################ Generic rules
>
> clean:
> $(Q)rm -rf $(OUT)
> $(Q)rm -rf $(OUT) src/*.hex

It would be better to move the .hex to $OUT. No reason to leave it in src/
> distclean: clean
>        $(Q)rm -f .config .config.old
> diff --git a/src/.gitignore b/src/.gitignore
> new file mode 100644
> index 0000000..eee4db0
> --- /dev/null
> +++ b/src/.gitignore
> @@ -0,0 +1 @@
> +*.hex
> diff --git a/src/acpi-dsdt.hex b/src/acpi-dsdt.hex
> deleted file mode 100644
> index a4af597..0000000
> --- a/src/acpi-dsdt.hex
> +++ /dev/null
> @@ -1,4387 +0,0 @@
> -static unsigned char AmlCode[] = {
> -0x44,
> -0x53,
> -0x44,
> -0x54,
> -0x21,
> -0x11,
> -0x0,
> -0x0,
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> -0x41,
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> -0x49,
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> -0x52,
> -0x49,
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> -0x52,
> -0x51,
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> -0x4e,
> -0x4b,
> -0x53,
> -0x8,
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> -0x48,
> -0x49,
> -0x44,
> -0xc,
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> -0xd0,
> -0xc,
> -0xf,
> -0x8,
> -0x5f,
> -0x55,
> -0x49,
> -0x44,
> -0xa,
> -0x5,
> -0x8,
> -0x5f,
> -0x50,
> -0x52,
> -0x53,
> -0x11,
> -0xe,
> -0xa,
> -0xb,
> -0x89,
> -0x6,
> -0x0,
> -0x9,
> -0x1,
> -0x9,
> -0x0,
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> -0x0,
> -0x79,
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> -0x14,
> -0xf,
> -0x5f,
> -0x53,
> -0x54,
> -0x41,
> -0x0,
> -0xa4,
> -0x49,
> -0x51,
> -0x53,
> -0x54,
> -0x50,
> -0x52,
> -0x51,
> -0x30,
> -0x14,
> -0x11,
> -0x5f,
> -0x44,
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> -0x0,
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> -0x51,
> -0x43,
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> -0x51,
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> -0x35,
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> -0x4f,
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> -0x4e,
> -0x68,
> -0x0,
> -0x60,
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> -0xa,
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> -0x80,
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> -0x88,
> -0x65,
> -0x7a,
> -0x60,
> -0xa,
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> -0x0,
> -0x62,
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> -0x7b,
> -0x62,
> -0x1,
> -0x0,
> -0x63,
> -0xa0,
> -0x22,
> -0x92,
> -0x93,
> -0x61,
> -0x63,
> -0x70,
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> -0x88,
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> -0x50,
> -0x4f,
> -0x4e,
> -0x60,
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> -0xa0,
> -0xa,
> -0x93,
> -0x63,
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> -0x4e,
> -0x54,
> -0x46,
> -0x59,
> -0x60,
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> -0x8,
> -0x4e,
> -0x54,
> -0x46,
> -0x59,
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> -0x3,
> -0x75,
> -0x60,
> -0xa4,
> -0x1,
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> -0xb,
> -0x5f,
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> -0x50,
> -0x45,
> -0x8,
> -0x5f,
> -0x48,
> -0x49,
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> -0xd,
> -0x41,
> -0x43,
> -0x50,
> -0x49,
> -0x30,
> -0x30,
> -0x30,
> -0x36,
> -0x0,
> -0x14,
> -0x8,
> -0x5f,
> -0x4c,
> -0x30,
> -0x30,
> -0x0,
> -0xa4,
> -0x1,
> -0x14,
> -0x16,
> -0x5f,
> -0x45,
> -0x30,
> -0x31,
> -0x0,
> -0xa4,
> -0x5c,
> -0x2f,
> -0x3,
> -0x5f,
> -0x53,
> -0x42,
> -0x5f,
> -0x50,
> -0x43,
> -0x49,
> -0x30,
> -0x50,
> -0x43,
> -0x4e,
> -0x46,
> -0x14,
> -0x11,
> -0x5f,
> -0x45,
> -0x30,
> -0x32,
> -0x0,
> -0xa4,
> -0x5c,
> -0x2e,
> -0x5f,
> -0x53,
> -0x42,
> -0x5f,
> -0x50,
> -0x52,
> -0x53,
> -0x43,
> -0x14,
> -0x8,
> -0x5f,
> -0x4c,
> -0x30,
> -0x33,
> -0x0,
> -0xa4,
> -0x1,
> -0x14,
> -0x8,
> -0x5f,
> -0x4c,
> -0x30,
> -0x34,
> -0x0,
> -0xa4,
> -0x1,
> -0x14,
> -0x8,
> -0x5f,
> -0x4c,
> -0x30,
> -0x35,
> -0x0,
> -0xa4,
> -0x1,
> -0x14,
> -0x8,
> -0x5f,
> -0x4c,
> -0x30,
> -0x36,
> -0x0,
> -0xa4,
> -0x1,
> -0x14,
> -0x8,
> -0x5f,
> -0x4c,
> -0x30,
> -0x37,
> -0x0,
> -0xa4,
> -0x1,
> -0x14,
> -0x8,
> -0x5f,
> -0x4c,
> -0x30,
> -0x38,
> -0x0,
> -0xa4,
> -0x1,
> -0x14,
> -0x8,
> -0x5f,
> -0x4c,
> -0x30,
> -0x39,
> -0x0,
> -0xa4,
> -0x1,
> -0x14,
> -0x8,
> -0x5f,
> -0x4c,
> -0x30,
> -0x41,
> -0x0,
> -0xa4,
> -0x1,
> -0x14,
> -0x8,
> -0x5f,
> -0x4c,
> -0x30,
> -0x42,
> -0x0,
> -0xa4,
> -0x1,
> -0x14,
> -0x8,
> -0x5f,
> -0x4c,
> -0x30,
> -0x43,
> -0x0,
> -0xa4,
> -0x1,
> -0x14,
> -0x8,
> -0x5f,
> -0x4c,
> -0x30,
> -0x44,
> -0x0,
> -0xa4,
> -0x1,
> -0x14,
> -0x8,
> -0x5f,
> -0x4c,
> -0x30,
> -0x45,
> -0x0,
> -0xa4,
> -0x1,
> -0x14,
> -0x8,
> -0x5f,
> -0x4c,
> -0x30,
> -0x46,
> -0x0,
> -0xa4,
> -0x1
> -};
> diff --git a/src/ssdt-pcihp.hex b/src/ssdt-pcihp.hex
> deleted file mode 100644
> index b15ad5a..0000000
> --- a/src/ssdt-pcihp.hex
> +++ /dev/null
> @@ -1,1672 +0,0 @@
> -static unsigned short aml_adr_dword[] = {
> -0x3e,
> -0x62,
> -0x88,
> -0xae,
> -0xd4,
> -0xfa,
> -0x120,
> -0x146,
> -0x16c,
> -0x192,
> -0x1b8,
> -0x1de,
> -0x204,
> -0x22a,
> -0x250,
> -0x276,
> -0x29c,
> -0x2c2,
> -0x2e8,
> -0x30e,
> -0x334,
> -0x35a,
> -0x380,
> -0x3a6,
> -0x3cc,
> -0x3f2,
> -0x418,
> -0x43e,
> -0x464,
> -0x48a,
> -0x4b0
> -};
> -static unsigned short aml_ej0_name[] = {
> -0x44,
> -0x68,
> -0x8e,
> -0xb4,
> -0xda,
> -0x100,
> -0x126,
> -0x14c,
> -0x172,
> -0x198,
> -0x1be,
> -0x1e4,
> -0x20a,
> -0x230,
> -0x256,
> -0x27c,
> -0x2a2,
> -0x2c8,
> -0x2ee,
> -0x314,
> -0x33a,
> -0x360,
> -0x386,
> -0x3ac,
> -0x3d2,
> -0x3f8,
> -0x41e,
> -0x444,
> -0x46a,
> -0x490,
> -0x4b6
> -};
> -static unsigned char ssdp_pcihp_aml[] = {
> -0x53,
> -0x53,
> -0x44,
> -0x54,
> -0x44,
> -0x6,
> -0x0,
> -0x0,
> -0x1,
> -0x94,
> -0x42,
> -0x58,
> -0x50,
> -0x43,
> -0x0,
> -0x0,
> -0x42,
> -0x58,
> -0x53,
> -0x53,
> -0x44,
> -0x54,
> -0x50,
> -0x43,
> -0x1,
> -0x0,
> -0x0,
> -0x0,
> -0x49,
> -0x4e,
> -0x54,
> -0x4c,
> -0x28,
> -0x5,
> -0x10,
> -0x20,
> -0x10,
> -0x4f,
> -0x61,
> -0x5c,
> -0x2e,
> -0x5f,
> -0x53,
> -0x42,
> -0x5f,
> -0x50,
> -0x43,
> -0x49,
> -0x30,
> -0x5b,
> -0x82,
> -0x22,
> -0x53,
> -0x30,
> -0x31,
> -0x5f,
> -0x8,
> -0x5f,
> -0x41,
> -0x44,
> -0x52,
> -0xc,
> -0x0,
> -0x0,
> -0x1,
> -0x0,
> -0x14,
> -0xc,
> -0x5f,
> -0x45,
> -0x4a,
> -0x30,
> -0x1,
> -0xa4,
> -0x50,
> -0x43,
> -0x45,
> -0x4a,
> -0x1,
> -0x8,
> -0x5f,
> -0x53,
> -0x55,
> -0x4e,
> -0x1,
> -0x5b,
> -0x82,
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> -0xb,
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> -0x68,
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> -0x43,
> -0x5f,
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> -0xa0,
> -0xb,
> -0x93,
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> -0xa,
> -0x1d,
> -0x86,
> -0x53,
> -0x31,
> -0x44,
> -0x5f,
> -0x69,
> -0xa0,
> -0xb,
> -0x93,
> -0x68,
> -0xa,
> -0x1e,
> -0x86,
> -0x53,
> -0x31,
> -0x45,
> -0x5f,
> -0x69,
> -0xa0,
> -0xb,
> -0x93,
> -0x68,
> -0xa,
> -0x1f,
> -0x86,
> -0x53,
> -0x31,
> -0x46,
> -0x5f,
> -0x69
> -};
> diff --git a/src/ssdt-proc.hex b/src/ssdt-proc.hex
> deleted file mode 100644
> index a28172e..0000000
> --- a/src/ssdt-proc.hex
> +++ /dev/null
> @@ -1,134 +0,0 @@
> -static unsigned char ssdt_proc_name[] = {
> -0x28
> -};
> -static unsigned char ssdp_proc_aml[] = {
> -0x53,
> -0x53,
> -0x44,
> -0x54,
> -0x78,
> -0x0,
> -0x0,
> -0x0,
> -0x1,
> -0xb3,
> -0x42,
> -0x58,
> -0x50,
> -0x43,
> -0x0,
> -0x0,
> -0x42,
> -0x58,
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> -0x53,
> -0x44,
> -0x54,
> -0x0,
> -0x0,
> -0x1,
> -0x0,
> -0x0,
> -0x0,
> -0x49,
> -0x4e,
> -0x54,
> -0x4c,
> -0x28,
> -0x5,
> -0x10,
> -0x20,
> -0x5b,
> -0x83,
> -0x42,
> -0x5,
> -0x43,
> -0x50,
> -0x41,
> -0x41,
> -0xaa,
> -0x10,
> -0xb0,
> -0x0,
> -0x0,
> -0x6,
> -0x8,
> -0x49,
> -0x44,
> -0x5f,
> -0x5f,
> -0xa,
> -0xaa,
> -0x8,
> -0x5f,
> -0x48,
> -0x49,
> -0x44,
> -0xd,
> -0x41,
> -0x43,
> -0x50,
> -0x49,
> -0x30,
> -0x30,
> -0x30,
> -0x37,
> -0x0,
> -0x14,
> -0xf,
> -0x5f,
> -0x4d,
> -0x41,
> -0x54,
> -0x0,
> -0xa4,
> -0x43,
> -0x50,
> -0x4d,
> -0x41,
> -0x49,
> -0x44,
> -0x5f,
> -0x5f,
> -0x14,
> -0xf,
> -0x5f,
> -0x53,
> -0x54,
> -0x41,
> -0x0,
> -0xa4,
> -0x43,
> -0x50,
> -0x53,
> -0x54,
> -0x49,
> -0x44,
> -0x5f,
> -0x5f,
> -0x14,
> -0xf,
> -0x5f,
> -0x45,
> -0x4a,
> -0x30,
> -0x1,
> -0x43,
> -0x50,
> -0x45,
> -0x4a,
> -0x49,
> -0x44,
> -0x5f,
> -0x5f,
> -0x68
> -};
> -static unsigned char ssdt_proc_id[] = {
> -0x38
> -};
> -static unsigned char ssdt_proc_end[] = {
> -0x78
> -};
> -static unsigned char ssdt_proc_start[] = {
> -0x24
> -};
>
> 1.7.1
>
> SeaBIOS mailing list
> [e-mail]
> http://www.seabios.org/mailman/listinfo/seabios

I think that this is a good idea. I think that I am hitting a problem
with incompatible .hex and iasl versions.
I am having problem with commit 15952a : Revert "Fix 64bit PCI issues
on Windows" and  I am using the coreboot crosstools iasl.

Intel ACPI Component Architecture
ASL Optimizing Compiler version 20110922-64 [Mar  2 2012]
Copyright (c) 2000 - 2011 Intel Corporation

ASL Input:     /home/marc/devel/coreboot/build/seabios/out/ssdt-proc.dsl.i
- 36 lines, 765 bytes, 8 keywords
AML Output:    /home/marc/devel/coreboot/build/seabios/out/ssdt-proc.aml
- 120 bytes, 6 named objects, 2 executable opcodes
Listing File:  /home/marc/devel/coreboot/build/seabios/out/ssdt-proc.lst
- 2956 bytes
Hex Dump:      /home/marc/devel/coreboot/build/seabios/out/ssdt-proc.hex
- 1492 bytes

Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 0 Optimizations
/home/marc/devel/coreboot/build/seabios/out/ssdt-pcihp.dsl.i     21:
Method (_EJ0, 1) { Return(PCEJ(0x01)) } Name (_SUN, 0x01) }
Warning  1099 -                                          Reserved
method should not return a value ^  (_EJ0)

/home/marc/devel/coreboot/build/seabios/out/ssdt-pcihp.dsl.i     26:
Method (_EJ0, 1) { Return(PCEJ(0x02)) } Name (_SUN, 0x02) }
Warning  1099 -                                          Reserved
method should not return a value ^  (_EJ0)

...

The build passes with my distro toolchain version: ASL Optimizing
Compiler version 20100528 [Oct 15 2010]

It seems that this might be a problem with the .hex files being
generated by a different version of IASL. Just building the .hex file
seems to fix this.

Marc

[PATCH 1/6] remove iasl-generated hex files from git repo

[Kevin O'Connor]

On Tue, May 15, 2012 at 12:46:21PM +0200, Gerd Hoffmann wrote:
> Almost every linux distro has iasl packaged these days.
> Lets make it a build dependency and stop the hassle we
> have with updating the *.hex files in the git repo.

I'm a bit torn on this.  I see the gain in that it simplifies the
build and makes patches smaller.  It also allows include files (eg,
config.h) to be pulled into the asl code so that symbolic names can be
shared.  Iasl is easily available from most distros, but it isn't
installed by default.  I don't want to scare off any casual users that
download the git tree and attempt to compile.

-Kevin

[PATCH 1/6] remove iasl-generated hex files from git repo

[Gerd Hoffmann]

On 05/18/12 05:16, Kevin O'Connor wrote:
> On Tue, May 15, 2012 at 12:46:21PM +0200, Gerd Hoffmann wrote:
> > Almost every linux distro has iasl packaged these days.
> > Lets make it a build dependency and stop the hassle we
> > have with updating the *.hex files in the git repo.
>
> I'm a bit torn on this.  I see the gain in that it simplifies the
> build and makes patches smaller.

Patch conflicts in the generated files are a pain too.
> It also allows include files (eg,
> config.h) to be pulled into the asl code so that symbolic names can be
> shared.  Iasl is easily available from most distros, but it isn't
> installed by default.  I don't want to scare off any casual users that
> download the git tree and attempt to compile.

We can detect iasl and print a friendly message in case it isn't there,
see attached patch.  Comments?

And, yes, we probably want move them to out/ as suggested by Marc in
case we'll go that route.

cheers,
  Gerd

[PATCH 1/6] remove iasl-generated hex files from git repo

[Marc Jones]

On Tue, May 22, 2012 at 3:50 AM, Gerd Hoffmann  wrote:
> On 05/18/12 05:16, Kevin O'Connor wrote:
> > On Tue, May 15, 2012 at 12:46:21PM +0200, Gerd Hoffmann wrote:
> > > Almost every linux distro has iasl packaged these days.
> > > Lets make it a build dependency and stop the hassle we
> > > have with updating the *.hex files in the git repo.
> >
> > I'm a bit torn on this.  I see the gain in that it simplifies the
> > build and makes patches smaller.
>
> Patch conflicts in the generated files are a pain too.
> > It also allows include files (eg,
> > config.h) to be pulled into the asl code so that symbolic names can be
> > shared.  Iasl is easily available from most distros, but it isn't
> > installed by default.  I don't want to scare off any casual users that
> > download the git tree and attempt to compile.
>
> We can detect iasl and print a friendly message in case it isn't there,
> see attached patch.  Comments?

I agree. Thanks for the patch.
> And, yes, we probably want move them to out/ as suggested by Marc in
> case we'll go that route.
>
> cheers,
>  Gerd
>
> SeaBIOS mailing list
> [e-mail]
> http://www.seabios.org/mailman/listinfo/seabios

[PATCH 1/6] remove iasl-generated hex files from git repo

[Kevin O'Connor]

On Tue, May 22, 2012 at 11:50:37AM +0200, Gerd Hoffmann wrote:
> On 05/18/12 05:16, Kevin O'Connor wrote:
> > On Tue, May 15, 2012 at 12:46:21PM +0200, Gerd Hoffmann wrote:
> > > Almost every linux distro has iasl packaged these days.
> > > Lets make it a build dependency and stop the hassle we
> > > have with updating the *.hex files in the git repo.
> >
> > I'm a bit torn on this.  I see the gain in that it simplifies the
> > build and makes patches smaller.
>
> Patch conflicts in the generated files are a pain too.
> > It also allows include files (eg,
> > config.h) to be pulled into the asl code so that symbolic names can be
> > shared.  Iasl is easily available from most distros, but it isn't
> > installed by default.  I don't want to scare off any casual users that
> > download the git tree and attempt to compile.
>
> We can detect iasl and print a friendly message in case it isn't there,
> see attached patch.  Comments?

Yes - if we have a very clear message to the user it's probably okay.

-Kevin

[PATCH 2/6] pci: init all devices

[Gerd Hoffmann]

seabios used to initialize root bus devices only, with this patch
devices behind pci bridges are initialized too.  This allows to boot
from virtio devices behind pci bridges.

Signed-off-by: Gerd Hoffmann 
---
 src/pciinit.c |    3 ---
 1 files changed, 0 insertions(+), 3 deletions(-)

diff --git a/src/pciinit.c b/src/pciinit.c
index f265662..c0eea96 100644
--- a/src/pciinit.c
+++ b/src/pciinit.c
@@ -219,9 +219,6 @@ static void pci_bios_init_devices(void)
 {
     struct pci_device *pci;
     foreachpci(pci) {
-        if (pci_bdf_to_bus(pci->bdf) != 0)
-            // Only init devices on host bus.
-            break;
         pci_bios_init_device(pci);
     }

[PATCH 2/6] pci: init all devices

[Kevin O'Connor]

On Tue, May 15, 2012 at 12:46:22PM +0200, Gerd Hoffmann wrote:
> seabios used to initialize root bus devices only, with this patch
> devices behind pci bridges are initialized too.  This allows to boot
> from virtio devices behind pci bridges.
> Signed-off-by: Gerd Hoffmann
>
> src/pciinit.c |    3 ---
>  1 files changed, 0 insertions(+), 3 deletions(-)
>
> diff --git a/src/pciinit.c b/src/pciinit.c
> index f265662..c0eea96 100644
> --- a/src/pciinit.c
> +++ b/src/pciinit.c
> @@ -219,9 +219,6 @@ static void pci_bios_init_devices(void)
>  {
>      struct pci_device *pci;
>      foreachpci(pci) {
>    if (pci_bdf_to_bus(pci->bdf) != 0)
>        // Only init devices on host bus.
>        break;

The more advanced version of this patch (with irq line support) should
already be committed.

-Kevin

[PATCH 2/6] pci: init all devices

[Gerd Hoffmann]

On 05/18/12 05:06, Kevin O'Connor wrote:
> On Tue, May 15, 2012 at 12:46:22PM +0200, Gerd Hoffmann wrote:
> > seabios used to initialize root bus devices only, with this patch
> > devices behind pci bridges are initialized too.  This allows to boot
> > from virtio devices behind pci bridges.
> > Signed-off-by: Gerd Hoffmann
> >
> > src/pciinit.c |    3 ---
> >  1 files changed, 0 insertions(+), 3 deletions(-)
> >
> > diff --git a/src/pciinit.c b/src/pciinit.c
> > index f265662..c0eea96 100644
> > --- a/src/pciinit.c
> > +++ b/src/pciinit.c
> > @@ -219,9 +219,6 @@ static void pci_bios_init_devices(void)
> >  {
> >      struct pci_device *pci;
> >      foreachpci(pci) {
> >    if (pci_bdf_to_bus(pci->bdf) != 0)
> >        // Only init devices on host bus.
> >        break;
>
> The more advanced version of this patch (with irq line support) should
> already be committed.

No, the committed patch has _only_ the irq line support, this patch is
still needed.

cheers,
  Gerd
> -Kevin

[PATCH 2/6] pci: init all devices

[Kevin O'Connor]

On Mon, May 21, 2012 at 08:47:46AM +0200, Gerd Hoffmann wrote:
> On 05/18/12 05:06, Kevin O'Connor wrote:
> > On Tue, May 15, 2012 at 12:46:22PM +0200, Gerd Hoffmann wrote:
> > > seabios used to initialize root bus devices only, with this patch
> > > devices behind pci bridges are initialized too.  This allows to boot
> > > from virtio devices behind pci bridges.
> >
> > The more advanced version of this patch (with irq line support) should
> > already be committed.
>
> No, the committed patch has _only_ the irq line support, this patch is
> still needed.

Sorry, I missed that.  I've commited this patch.

-Kevin

[PATCH 3/6] update bios date

[Gerd Hoffmann]

Linux ignores some information from acpi in case the bios is old
as acpi support used to be buggy in the early days.  This affects
ressources for example (unless forced with pci=use_crs).  So lets
go for something more recent.  With this patch applied the
ressources for \SB.PCI0 will show up in /proc/{iomem,ioports},
tagged as "PCI Bus 0000:00".

Signed-off-by: Gerd Hoffmann 
---
 src/smbios.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/src/smbios.c b/src/smbios.c
index fe1e183..0720673 100644
--- a/src/smbios.c
+++ b/src/smbios.c
@@ -94,7 +94,7 @@ smbios_entry_point_init(u16 max_structure_size,
     } while (0)

/* Type 0 -- BIOS Information */
-#define RELEASE_DATE_STR "01/01/2007"
+#define RELEASE_DATE_STR "01/01/2011"
 static void *
 smbios_init_type_0(void *start)
 {

[PATCH 3/6] update bios date

[Sebastian Herbszt]

Gerd Hoffmann wrote:
> Linux ignores some information from acpi in case the bios is old
> as acpi support used to be buggy in the early days.  This affects
> ressources for example (unless forced with pci=use_crs).  So lets
> go for something more recent.  With this patch applied the
> ressources for \SB.PCI0 will show up in /proc/{iomem,ioports},
> tagged as "PCI Bus 0000:00".
> Signed-off-by: Gerd Hoffmann
>
> src/smbios.c |    2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/src/smbios.c b/src/smbios.c
> index fe1e183..0720673 100644
> --- a/src/smbios.c
> +++ b/src/smbios.c
> @@ -94,7 +94,7 @@ smbios_entry_point_init(u16 max_structure_size,
>     } while (0)
>
> /* Type 0 -- BIOS Information */
> -#define RELEASE_DATE_STR "01/01/2007"
> +#define RELEASE_DATE_STR "01/01/2011"
> static void *
> smbios_init_type_0(void *start)
> {
> --

A pointer in the commit message to the linux code (pci_acpi_crs_quirks?)
might be useful and explain why 2007 is not recent enough.

Sebastian

[PATCH 4/6] pciinit: make pci ressources configurable

[Gerd Hoffmann]

This patch adds variables for the pci io window, so they are
runtime-configurable.  They are initialized with the values
from config.h

Signed-off-by: Gerd Hoffmann 
---
 src/pci.h     |    2 ++
 src/pciinit.c |   15 ++++++++++-----
 2 files changed, 12 insertions(+), 5 deletions(-)

diff --git a/src/pci.h b/src/pci.h
index 6be838c..ebf934c 100644
--- a/src/pci.h
+++ b/src/pci.h
@@ -56,6 +56,8 @@ struct pci_device {
     // Local information on device.
     int have_driver;
 };
+extern u64 pcimem_start, pcimem_end;
+extern u64 pcimem64_start, pcimem64_end;
 extern struct pci_device *PCIDevices;
 extern int MaxPCIBus;
 int pci_probe_host(void);
diff --git a/src/pciinit.c b/src/pciinit.c
index c0eea96..c1d932a 100644
--- a/src/pciinit.c
+++ b/src/pciinit.c
@@ -29,6 +29,11 @@ static const char *region_type_name[] = {
     [ PCI_REGION_TYPE_PREFMEM ] = "prefmem",
 };

+u64 pcimem_start   = BUILD_PCIMEM_START;
+u64 pcimem_end     = BUILD_PCIMEM_END;
+u64 pcimem64_start = BUILD_PCIMEM64_START;
+u64 pcimem64_end   = BUILD_PCIMEM64_END;
+
 struct pci_region_entry {
     struct pci_device *dev;
     int bar;
@@ -519,13 +524,13 @@ static int pci_bios_init_root_regions(struct pci_bus *bus)
     }
     u64 sum = pci_region_sum(r_end);
     u64 align = pci_region_align(r_end);
-    r_end->base = ALIGN_DOWN((BUILD_PCIMEM_END - sum), align);
+    r_end->base = ALIGN_DOWN((pcimem_end - sum), align);
     sum = pci_region_sum(r_start);
     align = pci_region_align(r_start);
     r_start->base = ALIGN_DOWN((r_end->base - sum), align);

-    if ((r_start->base < BUILD_PCIMEM_START) ||
-         (r_start->base > BUILD_PCIMEM_END))
+    if ((r_start->base < pcimem_start) ||
+         (r_start->base > pcimem_end))
         // Memory range requested is larger than available.
         return -1;
     return 0;
@@ -598,11 +603,11 @@ static void pci_bios_map_devices(struct pci_bus *busses)
         if (pci_bios_init_root_regions(busses))
             panic("PCI: out of 32bit address space\n");

-        r64_mem.base = BUILD_PCIMEM64_START;
+        r64_mem.base = pcimem64_start;
         u64 sum = pci_region_sum(&r64_mem);
         u64 align = pci_region_align(&r64_pref);
         r64_pref.base = ALIGN(r64_mem.base + sum, align);
-        if (r64_pref.base + pci_region_sum(&r64_pref) > BUILD_PCIMEM64_END)
+        if (r64_pref.base + pci_region_sum(&r64_pref) > pcimem64_end)
             panic("PCI: out of 64bit address space\n");
         pci_region_map_entries(busses, &r64_mem);
         pci_region_map_entries(busses, &r64_pref);

[PATCH 5/6] update dsdt ressources at runtime

[Gerd Hoffmann]

Write the pci window location to memory and add a pointer to the SSDT
(BDAT region).  Turn \SB.PCI0._CRS into a method which looks up the
information there and updates the ressources accordingly.

Signed-off-by: Gerd Hoffmann 
---
 src/acpi-dsdt.dsl |   63 +++++++++++++++++++++++++++++++++++++++++++++++++++-
 src/acpi.c        |   28 ++++++++++++++++++++++-
 2 files changed, 88 insertions(+), 3 deletions(-)

diff --git a/src/acpi-dsdt.dsl b/src/acpi-dsdt.dsl
index 4bdc268..5fd3bb2 100644
--- a/src/acpi-dsdt.dsl
+++ b/src/acpi-dsdt.dsl
@@ -132,7 +132,7 @@ DefinitionBlock (
                 B0EJ, 32,
             }

-            Name (_CRS, ResourceTemplate ()
+            Name (CRES, ResourceTemplate ()
             {
                 WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
                     0x0000,             // Address Space Granularity
@@ -174,8 +174,67 @@ DefinitionBlock (
                     0xFEBFFFFF,         // Address Range Maximum
                     0x00000000,         // Address Translation Offset
                     0x1EC00000,         // Address Length
-                    ,, , AddressRangeMemory, TypeStatic)
+                    ,, PW32, AddressRangeMemory, TypeStatic)
+            })
+            Name (CR64, ResourceTemplate ()
+            {
+                QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
+                    0x00000000,          // Address Space Granularity
+                    0x8000000000,        // Address Range Minimum
+                    0xFFFFFFFFFF,        // Address Range Maximum
+                    0x00000000,          // Address Translation Offset
+                    0x8000000000,        // Address Length
+                    ,, PW64, AddressRangeMemory, TypeStatic)
             })
+            Method (_CRS, 0)
+            {
+                External (_SB.BDAT)
+                Field(_SB.BDAT, QWordAcc, NoLock, Preserve) {
+                    QW0, 64,
+                    QW1, 64,
+                    QW2, 64,
+                    QW3, 64,
+                    QW4, 64,
+                    QW5, 64,
+                }
+                Field(_SB.BDAT, DWordAcc, NoLock, Preserve) {
+                    DWL0, 32,
+                    DWH0, 32,
+                    DWL1, 32,
+                    DWH1, 32,
+                    DWL2, 32,
+                    DWH2, 32,
+                    DWL3, 32,
+                    DWH3, 32,
+                    DWL4, 32,
+                    DWH4, 32,
+                    DWL5, 32,
+                    DWH5, 32,
+		}
+
+                /* fixup 32bit pci io window */
+		CreateDWordField (CRES,_SB.PCI0.PW32._MIN, PS32)
+		CreateDWordField (CRES,_SB.PCI0.PW32._MAX, PE32)
+		CreateDWordField (CRES,_SB.PCI0.PW32._LEN, PL32)
+		Store (DWL0, PS32)
+		Store (DWL1, PE32)
+		Store (DWL2, PL32)
+
+		If (LAnd(LEqual(DWL3, 0x00),LEqual(DWH3, 0x00))) {
+		    Return (CRES)
+		} Else {
+		    /* fixup 64bit pci io window */
+		    CreateQWordField (CR64,_SB.PCI0.PW64._MIN, PS64)
+		    CreateQWordField (CR64,_SB.PCI0.PW64._MAX, PE64)
+		    CreateQWordField (CR64,_SB.PCI0.PW64._LEN, PL64)
+		    Store (QW3, PS64)
+		    Store (QW4, PE64)
+		    Store (QW5, PL64)
+		    /* add window and return result */
+		    ConcatenateResTemplate (CRES, CR64, Local0)
+		    Return (Local0)
+		}
+            }
         }
     }

diff --git a/src/acpi.c b/src/acpi.c
index 30888b9..a13298d 100644
--- a/src/acpi.c
+++ b/src/acpi.c
@@ -415,7 +415,8 @@ build_ssdt(void)
     int length = ((1+3+4)
                   + (acpi_cpus * SD_SIZEOF)
                   + (1+2+5+(12*acpi_cpus))
-                  + (6+2+1+(1*acpi_cpus)));
+                  + (6+2+1+(1*acpi_cpus))
+                  + 17);
     u8 *ssdt = malloc_high(sizeof(struct acpi_table_header) + length);
     if (! ssdt) {
         warn_noalloc();
@@ -477,6 +478,31 @@ build_ssdt(void)
     for (i=0; i<acpi_cpus; i++)
         *(ssdt_ptr++) = (i < CountCPUs) ? 0x01 : 0x00;

+    // store pci io windows: start, end, length
+    // this way we don't have to do the math in the dsdt
+    u64 *pcimem = malloc_high(sizeof(*pcimem) * 6);
+    pcimem[0] = pcimem_start;
+    pcimem[1] = pcimem_end - 1;
+    pcimem[2] = pcimem_end - pcimem_start - 1;
+    pcimem[3] = pcimem64_start;
+    pcimem[4] = pcimem64_end - 1;
+    pcimem[5] = pcimem64_end - pcimem64_start - 1;
+
+    // build "OperationRegion(BDAT, SystemMemory, 0x12345678, 0x87654321)"
+    *(ssdt_ptr++) = 0x5B; // ExtOpPrefix
+    *(ssdt_ptr++) = 0x80; // OpRegionOp
+    *(ssdt_ptr++) = 'B';
+    *(ssdt_ptr++) = 'D';
+    *(ssdt_ptr++) = 'A';
+    *(ssdt_ptr++) = 'T';
+    *(ssdt_ptr++) = 0x00; // SystemMemory
+    *(ssdt_ptr++) = 0x0C; // DWordPrefix
+    *(u32*)ssdt_ptr = (u32)pcimem;
+    ssdt_ptr += 4;
+    *(ssdt_ptr++) = 0x0C; // DWordPrefix
+    *(u32*)ssdt_ptr = sizeof(*pcimem) * 6;
+    ssdt_ptr += 4;
+
     build_header((void*)ssdt, SSDT_SIGNATURE, ssdt_ptr - ssdt, 1);

//hexdump(ssdt, ssdt_ptr - ssdt);

[PATCH 5/6] update dsdt ressources at runtime

[Kevin O'Connor]

On Tue, May 15, 2012 at 12:46:25PM +0200, Gerd Hoffmann wrote:
> Write the pci window location to memory and add a pointer to the SSDT
> (BDAT region).  Turn \SB.PCI0._CRS into a method which looks up the
> information there and updates the ressources accordingly.
>
> Signed-off-by: Gerd Hoffmann

[...]
> diff --git a/src/acpi.c b/src/acpi.c
> index 30888b9..a13298d 100644
> --- a/src/acpi.c
> +++ b/src/acpi.c
> @@ -415,7 +415,8 @@ build_ssdt(void)
>      int length = ((1+3+4)
>                    + (acpi_cpus * SD_SIZEOF)
>                    + (1+2+5+(12*acpi_cpus))
>              + (6+2+1+(1*acpi_cpus)));
>              + (6+2+1+(1*acpi_cpus))
>              + 17);
> u8 *ssdt = malloc_high(sizeof(struct acpi_table_header) + length);
>    if (! ssdt) {
>        warn_noalloc();
>
> @@ -477,6 +478,31 @@ build_ssdt(void)
>      for (i=0; i<acpi_cpus; i++)
>          *(ssdt_ptr++) = (i < CountCPUs) ? 0x01 : 0x00;
> // store pci io windows: start, end, length
> // this way we don't have to do the math in the dsdt
> u64 *pcimem = malloc_high(sizeof(*pcimem) * 6);
> pcimem[0] = pcimem_start;
> pcimem[1] = pcimem_end - 1;
> pcimem[2] = pcimem_end - pcimem_start - 1;
> pcimem[3] = pcimem64_start;
> pcimem[4] = pcimem64_end - 1;
> pcimem[5] = pcimem64_end - pcimem64_start - 1;

I think we should really define a struct here instead of an array -
that should make it more obvious what's going on.

-Kevin

[PATCH 5/6] update dsdt ressources at runtime

[Gerd Hoffmann]

On 05/18/12 05:07, Kevin O'Connor wrote:
> On Tue, May 15, 2012 at 12:46:25PM +0200, Gerd Hoffmann wrote:
> > Write the pci window location to memory and add a pointer to the SSDT
> > (BDAT region).  Turn \SB.PCI0._CRS into a method which looks up the
> > information there and updates the ressources accordingly.
> >
> > Signed-off-by: Gerd Hoffmann
>
> [...]
> > diff --git a/src/acpi.c b/src/acpi.c
> > index 30888b9..a13298d 100644
> > --- a/src/acpi.c
> > +++ b/src/acpi.c
> > @@ -415,7 +415,8 @@ build_ssdt(void)
> >      int length = ((1+3+4)
> >                    + (acpi_cpus * SD_SIZEOF)
> >                    + (1+2+5+(12*acpi_cpus))
> >              + (6+2+1+(1*acpi_cpus)));
> >              + (6+2+1+(1*acpi_cpus))
> >              + 17);
> > u8 *ssdt = malloc_high(sizeof(struct acpi_table_header) + length);
> >    if (! ssdt) {
> >        warn_noalloc();
> >
> > @@ -477,6 +478,31 @@ build_ssdt(void)
> >      for (i=0; i<acpi_cpus; i++)
> >          *(ssdt_ptr++) = (i < CountCPUs) ? 0x01 : 0x00;
> > // store pci io windows: start, end, length
> > // this way we don't have to do the math in the dsdt
> > u64 *pcimem = malloc_high(sizeof(*pcimem) * 6);
> > pcimem[0] = pcimem_start;
> > pcimem[1] = pcimem_end - 1;
> > pcimem[2] = pcimem_end - pcimem_start - 1;
> > pcimem[3] = pcimem64_start;
> > pcimem[4] = pcimem64_end - 1;
> > pcimem[5] = pcimem64_end - pcimem64_start - 1;
>
> I think we should really define a struct here instead of an array -
> that should make it more obvious what's going on.
>
> -Kevin

Done, also created a virtual device in the dsdt to access those fields
so we have a single place in the dsdt we have to keep in sync with
acpi.h in case we are going to add more stuff there (as discussed for s3).

Comments?

[ for review only, guess we want pin down the w2k8 issue before
  committing, although that one is less critical than the winxp
  issue as it triggers only in case something is actually mapped
  high ... ]

cheers,
  Gerd

[PATCH 5/6] update dsdt ressources at runtime

[Gleb Natapov]

On Tue, May 22, 2012 at 11:55:02AM +0200, Gerd Hoffmann wrote:
> On 05/18/12 05:07, Kevin O'Connor wrote:
> > On Tue, May 15, 2012 at 12:46:25PM +0200, Gerd Hoffmann wrote:
> > > Write the pci window location to memory and add a pointer to the SSDT
> > > (BDAT region).  Turn \SB.PCI0._CRS into a method which looks up the
> > > information there and updates the ressources accordingly.
> > >
> > > Signed-off-by: Gerd Hoffmann
> >
> > [...]
> > > diff --git a/src/acpi.c b/src/acpi.c
> > > index 30888b9..a13298d 100644
> > > --- a/src/acpi.c
> > > +++ b/src/acpi.c
> > > @@ -415,7 +415,8 @@ build_ssdt(void)
> > >      int length = ((1+3+4)
> > >                    + (acpi_cpus * SD_SIZEOF)
> > >                    + (1+2+5+(12*acpi_cpus))
> > >              + (6+2+1+(1*acpi_cpus)));
> > >              + (6+2+1+(1*acpi_cpus))
> > >              + 17);
> > > u8 *ssdt = malloc_high(sizeof(struct acpi_table_header) + length);
> > >    if (! ssdt) {
> > >        warn_noalloc();
> > >
> > > @@ -477,6 +478,31 @@ build_ssdt(void)
> > >      for (i=0; i<acpi_cpus; i++)
> > >          *(ssdt_ptr++) = (i < CountCPUs) ? 0x01 : 0x00;
> > > // store pci io windows: start, end, length
> > > // this way we don't have to do the math in the dsdt
> > > u64 *pcimem = malloc_high(sizeof(*pcimem) * 6);
> > > pcimem[0] = pcimem_start;
> > > pcimem[1] = pcimem_end - 1;
> > > pcimem[2] = pcimem_end - pcimem_start - 1;
> > > pcimem[3] = pcimem64_start;
> > > pcimem[4] = pcimem64_end - 1;
> > > pcimem[5] = pcimem64_end - pcimem64_start - 1;
> >
> > I think we should really define a struct here instead of an array -
> > that should make it more obvious what's going on.
> >
> > -Kevin
>
> Done, also created a virtual device in the dsdt to access those fields
> so we have a single place in the dsdt we have to keep in sync with
> acpi.h in case we are going to add more stuff there (as discussed for s3).
>
> Comments?

For S3 I just patch the value directly and do not see the reason to
complicated it.
> [ for review only, guess we want pin down the w2k8 issue before
>   committing, although that one is less critical than the winxp
>   issue as it triggers only in case something is actually mapped
>   high ... ]
>
> cheers,
>   Gerd
> > From 581045edb168717c7f5691be1af5f75d35c3ebf5 Mon Sep 17 00:00:00 2001
>
> From: Gerd Hoffmann 
> Date: Tue, 15 May 2012 10:38:05 +0200
> Subject: [PATCH] update dsdt ressources at runtime
>
> Write the pci window location to memory and add a pointer to the SSDT
> (BDAT region).  Turn \SB.PCI0._CRS into a method which looks up the
> information there and updates the ressources accordingly.
> Signed-off-by: Gerd Hoffmann
>
> src/acpi-dsdt.dsl |   77 +++++++++++++++++++++++++++++++++++++++++++++++++++-
>  src/acpi.c        |   28 ++++++++++++++++++-
>  src/acpi.h        |    9 ++++++
>  3 files changed, 111 insertions(+), 3 deletions(-)
>
> diff --git a/src/acpi-dsdt.dsl b/src/acpi-dsdt.dsl
> index 4bdc268..3e3999a 100644
> --- a/src/acpi-dsdt.dsl
> +++ b/src/acpi-dsdt.dsl
> @@ -61,6 +61,38 @@ DefinitionBlock (
>
> /****************************************************************
> Data area filled by seabios (see acpi.h, struct bfld)
> ****************************************************************/
> Scope(_SB) {
>    Device(BFLD) {
>        External (\_SB.BDAT)
>        Field(\_SB.BDAT, QWordAcc, NoLock, Preserve) {
>            P0S, 64,
>            P0E, 64,
>            P0L, 64,
>            P1S, 64,
>            P1E, 64,
>            P1L, 64,
>        }
>        Field(\_SB.BDAT, DWordAcc, NoLock, Preserve) {
>            P0SL, 64,
>            P0SH, 64,
>            P0EL, 64,
>            P0EH, 64,
>            P0LL, 64,
>            P0LH, 64,
>            P1SL, 64,
>            P1SH, 64,
>            P1EL, 64,
>            P1EH, 64,
>            P1LL, 64,
>            P1LH, 64,
>        }
>    }
> }
>
> +/****************************************************************
> PCI Bus definition
>
> ****************************************************************/
>
> @@ -132,7 +164,7 @@ DefinitionBlock (
>                  B0EJ, 32,
>              }
>        Name (_CRS, ResourceTemplate ()
>        Name (CRES, ResourceTemplate ()
>        {
>            WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
>                0x0000,             // Address Space Granularity
>
> @@ -174,8 +206,49 @@ DefinitionBlock (
>                      0xFEBFFFFF,         // Address Range Maximum
>                      0x00000000,         // Address Translation Offset
>                      0x1EC00000,         // Address Length
>                ,, , AddressRangeMemory, TypeStatic)
>                ,, PW32, AddressRangeMemory, TypeStatic)
>        })
>        Name (CR64, ResourceTemplate ()
>        {
>            QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
>                0x00000000,          // Address Space Granularity
>                0x8000000000,        // Address Range Minimum
>                0xFFFFFFFFFF,        // Address Range Maximum
>                0x00000000,          // Address Translation Offset
>                0x8000000000,        // Address Length
>                ,, PW64, AddressRangeMemory, TypeStatic)
>        })
>        Method (_CRS, 0)
>        {
>            DBUG("pci0 _crs: enter")
>            /* fixup 32bit pci io window */
> CreateDWordField (CRES,\_SB.PCI0.PW32._MIN, PS32)
> CreateDWordField (CRES,\_SB.PCI0.PW32._MAX, PE32)
> CreateDWordField (CRES,\_SB.PCI0.PW32._LEN, PL32)
> Store (\_SB.BFLD.P0SL, PS32)
> Store (\_SB.BFLD.P0EL, PE32)
> Store (\_SB.BFLD.P0LL, PL32)
> If (LAnd(LEqual(\_SB.BFLD.P1SL, 0x00),
>                     LEqual(\_SB.BFLD.P1SH, 0x00))) {
>     DBUG("pci0 _crs: 32bit")
>     Return (CRES)
> } Else {
>     DBUG("pci0 _crs: 64bit")
>     /* fixup 64bit pci io window */
>     CreateQWordField (CR64,\_SB.PCI0.PW64._MIN, PS64)
>     CreateQWordField (CR64,\_SB.PCI0.PW64._MAX, PE64)
>     CreateQWordField (CR64,\_SB.PCI0.PW64._LEN, PL64)
>     Store (\_SB.BFLD.P1S, PS64)
>     Store (\_SB.BFLD.P1E, PE64)
>     Store (\_SB.BFLD.P1L, PL64)
>     /* add window and return result */
>     ConcatenateResTemplate (CRES, CR64, Local0)
>     DBUG("pci0 _crs: done")
>     Return (Local0)
> }
>        }
>    }
> }
>
> diff --git a/src/acpi.c b/src/acpi.c
> index 30888b9..5c3aaec 100644
> --- a/src/acpi.c
> +++ b/src/acpi.c
> @@ -415,7 +415,8 @@ build_ssdt(void)
>      int length = ((1+3+4)
>                    + (acpi_cpus * SD_SIZEOF)
>                    + (1+2+5+(12*acpi_cpus))
>              + (6+2+1+(1*acpi_cpus)));
>              + (6+2+1+(1*acpi_cpus))
>              + 17);
> u8 *ssdt = malloc_high(sizeof(struct acpi_table_header) + length);
>    if (! ssdt) {
>        warn_noalloc();
>
> @@ -477,6 +478,31 @@ build_ssdt(void)
>      for (i=0; i<acpi_cpus; i++)
>          *(ssdt_ptr++) = (i < CountCPUs) ? 0x01 : 0x00;
>
> // store pci io windows: start, end, length
>
> // this way we don't have to do the math in the dsdt
>
> struct bfld *bfld = malloc_high(sizeof(struct bfld));
>
> bfld->p0s = pcimem_start;
>
> bfld->p0e = pcimem_end - 1;
>
> bfld->p0l = pcimem_end - pcimem_start - 1;
>
> bfld->p1s = pcimem64_start;
>
> bfld->p1e = pcimem64_end - 1;
>
> bfld->p1l = pcimem64_end - pcimem64_start - 1;
>
> // build "OperationRegion(BDAT, SystemMemory, 0x12345678, 0x87654321)"
>
> *(ssdt_ptr++) = 0x5B; // ExtOpPrefix
>
> *(ssdt_ptr++) = 0x80; // OpRegionOp
>
> *(ssdt_ptr++) = 'B';
>
> *(ssdt_ptr++) = 'D';
>
> *(ssdt_ptr++) = 'A';
>
> *(ssdt_ptr++) = 'T';
>
> *(ssdt_ptr++) = 0x00; // SystemMemory
>
> *(ssdt_ptr++) = 0x0C; // DWordPrefix
>
> *(u32*)ssdt_ptr = (u32)bfld;
>
> ssdt_ptr += 4;
>
> *(ssdt_ptr++) = 0x0C; // DWordPrefix
>
> *(u32*)ssdt_ptr = sizeof(struct bfld);
>
> ssdt_ptr += 4;
>
> build_header((void*)ssdt, SSDT_SIGNATURE, ssdt_ptr - ssdt, 1);
>
> //hexdump(ssdt, ssdt_ptr - ssdt);
>
> diff --git a/src/acpi.h b/src/acpi.h
> index e01315a..cb21561 100644
> --- a/src/acpi.h
> +++ b/src/acpi.h
> @@ -98,4 +98,13 @@ struct fadt_descriptor_rev1
>  #endif
>  } PACKED;
>
> +struct bfld {
> u64 p0s;  /* pci window 0 (below 4g) - start  */
> u64 p0e;  /* pci window 0 (below 4g) - end    */
> u64 p0l;  /* pci window 0 (below 4g) - length */
> u64 p1s;  /* pci window 1 (above 4g) - start  */
> u64 p1e;  /* pci window 1 (above 4g) - end    */
> u64 p1l;  /* pci window 1 (above 4g) - length */
>
> +} PACKED;
> #endif // acpi.h
>
> 1.7.1
> SeaBIOS mailing list
> [e-mail]
> http://www.seabios.org/mailman/listinfo/seabios

[PATCH 5/6] update dsdt ressources at runtime

[Kevin O'Connor]

On Tue, May 22, 2012 at 11:55:02AM +0200, Gerd Hoffmann wrote:
> On 05/18/12 05:07, Kevin O'Connor wrote:
> > I think we should really define a struct here instead of an array -
> > that should make it more obvious what's going on.
>
> Done, also created a virtual device in the dsdt to access those fields
> so we have a single place in the dsdt we have to keep in sync with
> acpi.h in case we are going to add more stuff there (as discussed for s3).
>
> Comments?

This version does look better to me.

[...]
> /****************************************************************
> Data area filled by seabios (see acpi.h, struct bfld)
> ****************************************************************/
> Scope(_SB) {
>    Device(BFLD) {
>        External (\_SB.BDAT)
>        Field(\_SB.BDAT, QWordAcc, NoLock, Preserve) {
>            P0S, 64,
>            P0E, 64,
>            P0L, 64,
>            P1S, 64,
>            P1E, 64,
>            P1L, 64,
>        }
>        Field(\_SB.BDAT, DWordAcc, NoLock, Preserve) {
>            P0SL, 64,

Should be 32?

Thanks.
-Kevin

[PATCH 5/6] update dsdt ressources at runtime

[Gerd Hoffmann]

Hi,
> >        Field(\_SB.BDAT, DWordAcc, NoLock, Preserve) {
> >            P0SL, 64,
>
> Should be 32?

Yea, right, thanks.

cheers,
  Gerd

[PATCH 6/6] pci: runtime i/o window sizing

[Gerd Hoffmann]

Update the pci i/o windows at runtime, depending on the amount memory
the machine has.  The 32bit window starts above low memory and ends at
the ioapic map address, the 64bit window is placed above high memory.

Signed-off-by: Gerd Hoffmann 
---
 src/pciinit.c |   25 +++++++++++++++++++++----
 1 files changed, 21 insertions(+), 4 deletions(-)

diff --git a/src/pciinit.c b/src/pciinit.c
index c1d932a..23706f7 100644
--- a/src/pciinit.c
+++ b/src/pciinit.c
@@ -591,6 +591,11 @@ static void pci_region_map_entries(struct pci_bus *busses, struct pci_region *r)

static void pci_bios_map_devices(struct pci_bus *busses)
 {
+    u64 pcimem64_size;
+    int shift;
+
+    pcimem_start = RamSize;
+
     if (pci_bios_init_root_regions(busses)) {
         struct pci_region r64_mem, r64_pref;
         r64_mem.list = NULL;
@@ -603,14 +608,26 @@ static void pci_bios_map_devices(struct pci_bus *busses)
         if (pci_bios_init_root_regions(busses))
             panic("PCI: out of 32bit address space\n");

-        r64_mem.base = pcimem64_start;
-        u64 sum = pci_region_sum(&r64_mem);
-        u64 align = pci_region_align(&r64_pref);
-        r64_pref.base = ALIGN(r64_mem.base + sum, align);
+        // try 4 GB ... 512 GB
+        for (shift = 32; shift < 39; shift++) {
+            pcimem64_size = (1LL << shift);
+            pcimem64_start = (RamSizeOver4G + pcimem64_size) & ~(pcimem64_size-1);
+            pcimem64_end = pcimem64_start + pcimem64_size;
+
+            r64_mem.base = pcimem64_start;
+            u64 sum = pci_region_sum(&r64_mem);
+            u64 align = pci_region_align(&r64_pref);
+            r64_pref.base = ALIGN(r64_mem.base + sum, align);
+            if (r64_pref.base + pci_region_sum(&r64_pref) <= pcimem64_end)
+                break;
+        }
         if (r64_pref.base + pci_region_sum(&r64_pref) > pcimem64_end)
             panic("PCI: out of 64bit address space\n");
         pci_region_map_entries(busses, &r64_mem);
         pci_region_map_entries(busses, &r64_pref);
+    } else {
+        // no bars mapped high -> drop 64bit window (see dsdt)
+        pcimem64_start = 0;
     }
     // Map regions on each device.
     int bus;

[PATCH 6/6] pci: runtime i/o window sizing

[Kevin O'Connor]

On Tue, May 15, 2012 at 12:46:26PM +0200, Gerd Hoffmann wrote:
> Update the pci i/o windows at runtime, depending on the amount memory
> the machine has.  The 32bit window starts above low memory and ends at
> the ioapic map address, the 64bit window is placed above high memory.
> Signed-off-by: Gerd Hoffmann
>
> src/pciinit.c |   25 +++++++++++++++++++++----
>  1 files changed, 21 insertions(+), 4 deletions(-)
>
> diff --git a/src/pciinit.c b/src/pciinit.c
> index c1d932a..23706f7 100644
> --- a/src/pciinit.c
> +++ b/src/pciinit.c
> @@ -591,6 +591,11 @@ static void pci_region_map_entries(struct pci_bus *busses, struct pci_region *r)
>
> static void pci_bios_map_devices(struct pci_bus *busses)
>  {
> u64 pcimem64_size;
> int shift;
> pcimem_start = RamSize;
> if (pci_bios_init_root_regions(busses)) {
>        struct pci_region r64_mem, r64_pref;
>        r64_mem.list = NULL;
>
> @@ -603,14 +608,26 @@ static void pci_bios_map_devices(struct pci_bus *busses)
>          if (pci_bios_init_root_regions(busses))
>              panic("PCI: out of 32bit address space\n");
>    r64_mem.base = pcimem64_start;
>    u64 sum = pci_region_sum(&r64_mem);
>    u64 align = pci_region_align(&r64_pref);
>    r64_pref.base = ALIGN(r64_mem.base + sum, align);
>    // try 4 GB ... 512 GB
>    for (shift = 32; shift < 39; shift++) {
>        pcimem64_size = (1LL << shift);
>        pcimem64_start = (RamSizeOver4G + pcimem64_size) & ~(pcimem64_size-1);
>        pcimem64_end = pcimem64_start + pcimem64_size;
>        r64_mem.base = pcimem64_start;
>        u64 sum = pci_region_sum(&r64_mem);
>        u64 align = pci_region_align(&r64_pref);
>        r64_pref.base = ALIGN(r64_mem.base + sum, align);
>        if (r64_pref.base + pci_region_sum(&r64_pref) <= pcimem64_end)
>            break;
>    }

Can you describe what this does?  I'm guessing this attempts
progressively larger memory spaces until one fits - but why not just
always use the largest space?

-Kevin

[PATCH 6/6] pci: runtime i/o window sizing

[Gerd Hoffmann]

On 05/18/12 05:09, Kevin O'Connor wrote:
> On Tue, May 15, 2012 at 12:46:26PM +0200, Gerd Hoffmann wrote:
> > Update the pci i/o windows at runtime, depending on the amount memory
> > the machine has.  The 32bit window starts above low memory and ends at
> > the ioapic map address, the 64bit window is placed above high memory.
> > Signed-off-by: Gerd Hoffmann
> >
> > src/pciinit.c |   25 +++++++++++++++++++++----
> >  1 files changed, 21 insertions(+), 4 deletions(-)
> >
> > diff --git a/src/pciinit.c b/src/pciinit.c
> > index c1d932a..23706f7 100644
> > --- a/src/pciinit.c
> > +++ b/src/pciinit.c
> > @@ -591,6 +591,11 @@ static void pci_region_map_entries(struct pci_bus *busses, struct pci_region *r)
> >
> > static void pci_bios_map_devices(struct pci_bus *busses)
> >  {
> > u64 pcimem64_size;
> > int shift;
> > pcimem_start = RamSize;
> > if (pci_bios_init_root_regions(busses)) {
> >        struct pci_region r64_mem, r64_pref;
> >        r64_mem.list = NULL;
> >
> > @@ -603,14 +608,26 @@ static void pci_bios_map_devices(struct pci_bus *busses)
> >          if (pci_bios_init_root_regions(busses))
> >              panic("PCI: out of 32bit address space\n");
> >    r64_mem.base = pcimem64_start;
> >    u64 sum = pci_region_sum(&r64_mem);
> >    u64 align = pci_region_align(&r64_pref);
> >    r64_pref.base = ALIGN(r64_mem.base + sum, align);
> >    // try 4 GB ... 512 GB
> >    for (shift = 32; shift < 39; shift++) {
> >        pcimem64_size = (1LL << shift);
> >        pcimem64_start = (RamSizeOver4G + pcimem64_size) & ~(pcimem64_size-1);
> >        pcimem64_end = pcimem64_start + pcimem64_size;
> >        r64_mem.base = pcimem64_start;
> >        u64 sum = pci_region_sum(&r64_mem);
> >        u64 align = pci_region_align(&r64_pref);
> >        r64_pref.base = ALIGN(r64_mem.base + sum, align);
> >        if (r64_pref.base + pci_region_sum(&r64_pref) <= pcimem64_end)
> >            break;
> >    }
>
> Can you describe what this does?  I'm guessing this attempts
> progressively larger memory spaces until one fits

Exactly.
> but why not just
>
> always use the largest space?

It somehow feels more save to not use more address space than we have
to.  There are processors which have 36 physical address lines and thus
can cover 64G max.  But I'm not sure if and how that affects virtual
machines.  Maybe this care is not needed and we can go for a
half-terabyte window (which needs 40 address bits) unconditionally.

cheers,
  Gerd

[Alexey Korolev]

Hi,

It looks Win2008 R2 is not working with this patches if 64bit devices are present and going to occupy a 64bit range.
I've got the same BSOD as before.
Is there any information I could collect to help you debug this issue?
> Hi,
>
> Here is my pci patch collection, mostly but not completely related to
> 64bit pci support.  It brings back the ressource entry for the 64bit pci
> i/o window.  It is (with all patches applied) only present in case
> seabios actually mapped something high to avoid confusing old guests for
> no reason.
>
> Tested with Linux, windows xp (32bit maps only) and windows 7, all
> working fine.  Ressources show up as they should.  Linux: check
> /proc/{iomem,ioports}.  Windows: device manager -> system devices ->
> pci bus -> properties -> ressources.
>
> please review & test,
>   Gerd
>
> The following changes since commit 0c8f58d78543a06a57f4280dd3498807a1d9005d:
>
> pci: handle bridge irq mapping (2012-05-12 14:15:35 -0400)
>
> are available in the git repository at:
>   git://git.kraxel.org/seabios pci64
>
> Gerd Hoffmann (6):
>       remove iasl-generated hex files from git repo
>       pci: init all devices
>       update bios date
>       pciinit: make pci ressources configurable
>       update dsdt ressources at runtime
>       pci: runtime i/o window sizing
>
> Makefile           |    2 +-
>  src/.gitignore     |    1 +
>  src/acpi-dsdt.dsl  |   63 +-
>  src/acpi-dsdt.hex  | 4387 ----------------------------------------------------
>  src/acpi.c         |   28 +-
>  src/pci.h          |    2 +
>  src/pciinit.c      |   41 +-
>  src/smbios.c       |    2 +-
>  src/ssdt-pcihp.hex | 1672 --------------------
>  src/ssdt-proc.hex  |  134 --
>  10 files changed, 123 insertions(+), 6209 deletions(-)
>  create mode 100644 src/.gitignore
>  delete mode 100644 src/acpi-dsdt.hex
>  delete mode 100644 src/ssdt-pcihp.hex
>  delete mode 100644 src/ssdt-proc.hex
>
> SeaBIOS mailing list
> [e-mail]
> http://www.seabios.org/mailman/listinfo/seabios

[Gerd Hoffmann]

On 05/18/12 03:50, Alexey Korolev wrote:
> Hi,
>
> It looks Win2008 R2 is not working with this patches if 64bit devices are present and going to occupy a 64bit range.
> I've got the same BSOD as before.
> Is there any information I could collect to help you debug this issue?

Is win2k8 fine with the fixed entry (the reverted patch)?

You can try add DBUG("...") calls into the _CRS Method to figure the
problematic call.  That adds debug output to the seabios log.  Doesn't
work with winxp, works with win7 (and linux).  Lets hope that w2k8 is
closer to win7 ...

cheers,
  Gerd

[Alexey Korolev]

Hi,
> On 05/18/12 03:50, Alexey Korolev wrote:
> > Hi,
> >
> > It looks Win2008 R2 is not working with this patches if 64bit devices are present and going to occupy a 64bit range.
> > I've got the same BSOD as before.
> > Is there any information I could collect to help you debug this issue?
>
> Is win2k8 fine with the fixed entry (the reverted patch)?

If patches are reverted no BSOD occurs, but no 64bit resources available too :(.
> You can try add DBUG("...") calls into the _CRS Method to figure the
> problematic call.  That adds debug output to the seabios log.  Doesn't
> work with winxp, works with win7 (and linux).  Lets hope that w2k8 is
> closer to win7 ...

I tried but log doesn't have any DBUG messages inside.
I've just outputed the seabios log to serial port. Is it suitable?

Here is the log.... (it repeats as Windows rebooted after the BSOD)

Start bios (version rel-0.6.2-341-g8922086-dirty-20120522_180815-core-3000-3.et.endace.com)
enabling shadow ram
qemu_cfg_present=1
Find memory size
Ram Size=0xe0000000 (0x0000000120000000 high)
malloc setup
Relocating init from 0x000df5e0 to 0xdffe0800 (size 63180)
malloc fixup reloc
init ivt
init bda
init pic
init timer
CPU Mhz=2799
math cp init
init mtrr
pci setup
=== PCI bus & bridge init ===
PCI: pci_bios_init_bus_rec bus = 0x0
=== PCI device probing ===
PCI probe
PCI device 00:00.0 (vd=8086:1237 c=0600)
PCI device 00:01.0 (vd=8086:7000 c=0601)
PCI device 00:01.1 (vd=8086:7010 c=0101)
PCI device 00:01.2 (vd=8086:7020 c=0c03)
PCI device 00:01.3 (vd=8086:7113 c=0680)
PCI device 00:02.0 (vd=1013:00b8 c=0300)
PCI device 00:03.0 (vd=10ec:8139 c=0200)
PCI device 00:04.0 (vd=eace:eace c=0280)
PCI device 00:05.0 (vd=eace:eace c=0280)
PCI device 00:06.0 (vd=1af4:1002 c=0500)
PCI device 00:07.0 (vd=eace:eace c=0280)
PCI device 00:08.0 (vd=eace:eace c=0280)
Found 12 PCI devices (max PCI bus is 00)
=== PCI new allocation pass #1 ===
PCI: check devices
=== PCI new allocation pass #2 ===
PCI: map device bdf=00:04.0  bar 1, addr 200000000, size 20000000 [mem]
PCI: map device bdf=00:05.0  bar 1, addr 220000000, size 20000000 [mem]
PCI: map device bdf=00:07.0  bar 1, addr 240000000, size 20000000 [mem]
PCI: map device bdf=00:08.0  bar 1, addr 260000000, size 20000000 [mem]
PCI: map device bdf=00:03.0  bar 0, addr 0000c000, size 00000100 [io]
PCI: map device bdf=00:01.2  bar 4, addr 0000c100, size 00000020 [io]
PCI: map device bdf=00:06.0  bar 0, addr 0000c120, size 00000020 [io]
PCI: map device bdf=00:01.1  bar 4, addr 0000c140, size 00000010 [io]
PCI: map device bdf=00:02.0  bar 6, addr feb90000, size 00010000 [mem]
PCI: map device bdf=00:03.0  bar 6, addr feba0000, size 00010000 [mem]
PCI: map device bdf=00:04.0  bar 0, addr febb0000, size 00010000 [mem]
PCI: map device bdf=00:05.0  bar 0, addr febc0000, size 00010000 [mem]
PCI: map device bdf=00:07.0  bar 0, addr febd0000, size 00010000 [mem]
PCI: map device bdf=00:08.0  bar 0, addr febe0000, size 00010000 [mem]
PCI: map device bdf=00:02.0  bar 1, addr febf0000, size 00001000 [mem]
PCI: map device bdf=00:03.0  bar 1, addr febf1000, size 00001000 [mem]
PCI: map device bdf=00:02.0  bar 0, addr fc000000, size 02000000 [prefmem]
PCI: init bdf=00:00.0 id=8086:1237
PCI: init bdf=00:01.0 id=8086:7000
PCI: init bdf=00:01.1 id=8086:7010
PCI: init bdf=00:01.2 id=8086:7020
PCI: init bdf=00:01.3 id=8086:7113
PCI: init bdf=00:02.0 id=1013:00b8
PCI: init bdf=00:03.0 id=10ec:8139
PCI: init bdf=00:04.0 id=eace:eace
PCI: init bdf=00:05.0 id=eace:eace
PCI: init bdf=00:06.0 id=1af4:1002
PCI: init bdf=00:07.0 id=eace:eace
PCI: init bdf=00:08.0 id=eace:eace
PIIX3/PIIX4 init: elcr=00 0c
init smm
boot order:
1: /pci@i0cf8/ide@1,1/drive@0/disk@0
2: /pci@i0cf8/ide@1,1/drive@1/disk@0
Found 2 cpu(s) max supported 2 cpu(s)
init bios32
init PMM
init PNPBIOS table
init keyboard
init mouse
init PIR table
init MPTable
MP table addr=0x000fd9d0 MPC table addr=0x000fd9e0 size=284
init SMBIOS tables
SMBIOS ptr=0x000fd9b0 table=0x000fd850 size=346
init ACPI tables
ACPI DSDT=0xdfffe3f0
ACPI tables: RSDP=0x000fd820 RSDT=0xdfffe3b0
Scan for VGA option rom
Attempting to init PCI bdf 00:02.0 (vd 1013:00b8)
Copying option rom (size 35840) from 0xfeb90000 to c0000
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version rel-0.6.2-341-g8922086-dirty-20120522_180815-core-3000-3.et.endace.com)

init usb
UHCI init on dev 00:01.2 (io=c100)
/dffdf000\ Start thread
/dffde000\ Start thread
/dffdc000\ Start thread
\dffdc000/ End thread
init ps2port
/dffdc000\ Start thread
init lpt
Found 0 lpt ports
init serial
Found 1 serial ports
init floppy drives
init hard drives
ATA controller 1 at 1f0/3f4/0 (irq 14 dev 9)
/dffdb000\ Start thread
ATA controller 2 at 170/374/0 (irq 15 dev 9)
/dffda000\ Start thread
init ahci
init virtio-blk
init virtio-scsi
|dffdb000| ata0-0: QEMU HARDDISK ATA-7 Hard-Disk (51200 MiBytes)
|dffdb000| Searching bootorder for: /pci@i0cf8/*@1,1/drive@0/disk@0
|dffdb000| Registering bootable: ata0-0: QEMU HARDDISK ATA-7 Hard-Disk (51200 MiBytes) (type:2 prio:1 data:fd7d0)
\dffdb000/ End thread
|dffda000| DVD/CD [ata1-0: QEMU DVD-ROM ATAPI-4 DVD/CD]
|dffda000| Searching bootorder for: /pci@i0cf8/*@1,1/drive@1/disk@0
|dffda000| Registering bootable: DVD/CD [ata1-0: QEMU DVD-ROM ATAPI-4 DVD/CD] (type:3 prio:2 data:fd7a0)
\dffda000/ End thread
|dffde000| set_address 0xdffe0190
|dffde000| config_usb: 0xdffddd4c
|dffde000| device rev=0100 cls=00 sub=00 proto=00 size=08
|dffde000| usb_hid_init 0xdffddd4c
\dffde000/ End thread
\dffdf000/ End thread
|dffdc000| PS2 keyboard initialized
\dffdc000/ End thread
All threads complete.
Scan for option roms
Attempting to init PCI bdf 00:00.0 (vd 8086:1237)
Attempting to init PCI bdf 00:01.0 (vd 8086:7000)
Attempting to init PCI bdf 00:01.2 (vd 8086:7020)
Attempting to init PCI bdf 00:01.3 (vd 8086:7113)
Attempting to init PCI bdf 00:03.0 (vd 10ec:8139)
Copying option rom (size 61440) from 0xfeba0000 to c9000
Running option rom at c900:0003
pmm call arg1=1
pmm01: handle=18ae1000
pmm call arg1=0
pmm00: length=f00 handle=18ae1000 flags=2
pmm call arg1=1
pmm01: handle=18ae2004
pmm call arg1=0
pmm00: length=4000 handle=18ae2004 flags=2
Attempting to init PCI bdf 00:04.0 (vd eace:eace)
Attempting to init PCI bdf 00:05.0 (vd eace:eace)
Attempting to init PCI bdf 00:06.0 (vd 1af4:1002)
Attempting to init PCI bdf 00:07.0 (vd eace:eace)
Attempting to init PCI bdf 00:08.0 (vd eace:eace)
Searching bootorder for: /pci@i0cf8/*@3
Registering bootable: iPXE (PCI 00:03.0) (type:128 prio:9999 data:c9000372)
Searching bootorder for: /rom@genroms/vapic.bin
Registering bootable: Legacy option rom (type:129 prio:101 data:ca000003)
Mapping hd drive 0x000fd7d0 to 0
drive 0x000fd7d0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=104857600
Mapping cd drive 0x000fd7a0
Running option rom at ca00:0003
ebda moved from 9fc00 to 9f400
finalize PMM
malloc finalize
Returned 57344 bytes of ZoneHigh
e820 map has 7 items:
  0: 0000000000000000 - 000000000009f400 = 1 RAM
  1: 000000000009f400 - 00000000000a0000 = 2 RESERVED
  2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
  3: 0000000000100000 - 00000000dfffe000 = 1 RAM
  4: 00000000dfffe000 - 00000000e0000000 = 2 RESERVED
  5: 00000000fffbc000 - 0000000100000000 = 2 RESERVED
  6: 0000000100000000 - 0000000220000000 = 1 RAM
locking shadow ram
Jump to int19
enter handle_19:
  NULL
Booting from Hard Disk...
Booting from 0000:7c00
unimplemented handle_1aXX:493:
   a=0000bb00  b=0000aa55  c=0000ffff  d=00000080 ds=0000 es=0000 ss=0000
  si=00007e00 di=00000800 bp=000007be sp=00007bfe cs=0000 ip=06e7  f=3246
unimplemented handle_1aXX:493:
   a=0000bb00  b=00000000  c=00000000  d=000009a0 ds=07c0 es=09a0 ss=0000
  si=00007be4 di=00000800 bp=000007be sp=00007c00 cs=07c0 ip=00db  f=3246
unimplemented handle_1aXX:493:
   a=0000bb00  b=00000000  c=0000005e  d=00000000 ds=07c0 es=2000 ss=0000
  si=00003808 di=00000000 bp=000007be sp=00007bda cs=07c0 ip=0f54  f=3246
unimplemented handle_1aXX:493:
   a=0000bb00  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=23de
  si=00000000 di=00000000 bp=00000000 sp=00001462 cs=2000 ip=0a39  f=3256
unimplemented handle_1aXX:493:
   a=0000bb00  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=23de
  si=00000000 di=00000000 bp=00000000 sp=00001462 cs=2000 ip=0a39  f=3256
invalid handle_legacy_disk:847:
   a=00001500  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=23de
  si=00000000 di=00000000 bp=00000000 sp=00001462 cs=2000 ip=0a1d  f=3246
invalid handle_legacy_disk:847:
   a=00001500  b=00000000  c=00000000  d=00000001 ds=0000 es=0000 ss=23de
  si=00000000 di=00000000 bp=00000000 sp=00001462 cs=2000 ip=0a1d  f=3246
Changing serial settings was 0/0 now 3/0
In resume (status=0)
In 32bit resume
Attempting a hard reboot
enabling shadow ram
Changing serial settings was 0/0 now 3/0
Start bios (version rel-0.6.2-341-g8922086-dirty-20120522_180815-core-3000-3.et.endace.com)
enabling shadow ram
qemu_cfg_present=1
Find memory size
Ram Size=0xe0000000 (0x0000000120000000 high)
malloc setup
Relocating init from 0x000df5e0 to 0xdffe0800 (size 63180)
malloc fixup reloc
init ivt
init bda
init pic
init timer
CPU Mhz=2800
math cp init
init mtrr
pci setup
=== PCI bus & bridge init ===
PCI: pci_bios_init_bus_rec bus = 0x0
=== PCI device probing ===
PCI probe
PCI device 00:00.0 (vd=8086:1237 c=0600)
PCI device 00:01.0 (vd=8086:7000 c=0601)
PCI device 00:01.1 (vd=8086:7010 c=0101)
PCI device 00:01.2 (vd=8086:7020 c=0c03)
PCI device 00:01.3 (vd=8086:7113 c=0680)
PCI device 00:02.0 (vd=1013:00b8 c=0300)
PCI device 00:03.0 (vd=10ec:8139 c=0200)
PCI device 00:04.0 (vd=eace:eace c=0280)
PCI device 00:05.0 (vd=eace:eace c=0280)
PCI device 00:06.0 (vd=1af4:1002 c=0500)
PCI device 00:07.0 (vd=eace:eace c=0280)
PCI device 00:08.0 (vd=eace:eace c=0280)
Found 12 PCI devices (max PCI bus is 00)
=== PCI new allocation pass #1 ===
PCI: check devices
=== PCI new allocation pass #2 ===
PCI: map device bdf=00:04.0  bar 1, addr 200000000, size 20000000 [mem]
PCI: map device bdf=00:05.0  bar 1, addr 220000000, size 20000000 [mem]
PCI: map device bdf=00:07.0  bar 1, addr 240000000, size 20000000 [mem]
PCI: map device bdf=00:08.0  bar 1, addr 260000000, size 20000000 [mem]
PCI: map device bdf=00:03.0  bar 0, addr 0000c000, size 00000100 [io]
PCI: map device bdf=00:01.2  bar 4, addr 0000c100, size 00000020 [io]
PCI: map device bdf=00:06.0  bar 0, addr 0000c120, size 00000020 [io]
PCI: map device bdf=00:01.1  bar 4, addr 0000c140, size 00000010 [io]
PCI: map device bdf=00:02.0  bar 6, addr feb90000, size 00010000 [mem]
PCI: map device bdf=00:03.0  bar 6, addr feba0000, size 00010000 [mem]
PCI: map device bdf=00:04.0  bar 0, addr febb0000, size 00010000 [mem]
PCI: map device bdf=00:05.0  bar 0, addr febc0000, size 00010000 [mem]
PCI: map device bdf=00:07.0  bar 0, addr febd0000, size 00010000 [mem]
PCI: map device bdf=00:08.0  bar 0, addr febe0000, size 00010000 [mem]
PCI: map device bdf=00:02.0  bar 1, addr febf0000, size 00001000 [mem]
PCI: map device bdf=00:03.0  bar 1, addr febf1000, size 00001000 [mem]
PCI: map device bdf=00:02.0  bar 0, addr fc000000, size 02000000 [prefmem]
PCI: init bdf=00:00.0 id=8086:1237
PCI: init bdf=00:01.0 id=8086:7000
PCI: init bdf=00:01.1 id=8086:7010
PCI: init bdf=00:01.2 id=8086:7020
PCI: init bdf=00:01.3 id=8086:7113
PCI: init bdf=00:02.0 id=1013:00b8
PCI: init bdf=00:03.0 id=10ec:8139
PCI: init bdf=00:04.0 id=eace:eace
PCI: init bdf=00:05.0 id=eace:eace
PCI: init bdf=00:06.0 id=1af4:1002
PCI: init bdf=00:07.0 id=eace:eace
PCI: init bdf=00:08.0 id=eace:eace
PIIX3/PIIX4 init: elcr=00 0c
init smm
boot order:
1: /pci@i0cf8/ide@1,1/drive@0/disk@0
2: /pci@i0cf8/ide@1,1/drive@1/disk@0
Found 2 cpu(s) max supported 2 cpu(s)
init bios32
init PMM
init PNPBIOS table
init keyboard
init mouse
init PIR table
init MPTable
MP table addr=0x000fd9d0 MPC table addr=0x000fd9e0 size=284
init SMBIOS tables
SMBIOS ptr=0x000fd9b0 table=0x000fd850 size=346
init ACPI tables
ACPI DSDT=0xdfffe3f0
ACPI tables: RSDP=0x000fd820 RSDT=0xdfffe3b0
Scan for VGA option rom
Attempting to init PCI bdf 00:02.0 (vd 1013:00b8)
Copying option rom (size 35840) from 0xfeb90000 to c0000
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version rel-0.6.2-341-g8922086-dirty-20120522_180815-core-3000-3.et.endace.com)

init usb
UHCI init on dev 00:01.2 (io=c100)
/dffdf000\ Start thread
/dffde000\ Start thread
/dffdc000\ Start thread
\dffdc000/ End thread
init ps2port
/dffdc000\ Start thread
init lpt
Found 0 lpt ports
init serial
Found 1 serial ports
init floppy drives
init hard drives
ATA controller 1 at 1f0/3f4/0 (irq 14 dev 9)
/dffdb000\ Start thread
ATA controller 2 at 170/374/0 (irq 15 dev 9)
/dffda000\ Start thread
init ahci
init virtio-blk
init virtio-scsi
|dffdb000| ata0-0: QEMU HARDDISK ATA-7 Hard-Disk (51200 MiBytes)
|dffdb000| Searching bootorder for: /pci@i0cf8/*@1,1/drive@0/disk@0
|dffdb000| Registering bootable: ata0-0: QEMU HARDDISK ATA-7 Hard-Disk (51200 MiBytes) (type:2 prio:1 data:fd7d0)
\dffdb000/ End thread
|dffda000| DVD/CD [ata1-0: QEMU DVD-ROM ATAPI-4 DVD/CD]
|dffda000| Searching bootorder for: /pci@i0cf8/*@1,1/drive@1/disk@0
|dffda000| Registering bootable: DVD/CD [ata1-0: QEMU DVD-ROM ATAPI-4 DVD/CD] (type:3 prio:2 data:fd7a0)
\dffda000/ End thread
|dffde000| set_address 0xdffe0190
|dffde000| config_usb: 0xdffddd4c
|dffde000| device rev=0100 cls=00 sub=00 proto=00 size=08
|dffde000| usb_hid_init 0xdffddd4c
\dffde000/ End thread
\dffdf000/ End thread
|dffdc000| PS2 keyboard initialized
\dffdc000/ End thread
All threads complete.
Scan for option roms
Attempting to init PCI bdf 00:00.0 (vd 8086:1237)
Attempting to init PCI bdf 00:01.0 (vd 8086:7000)
Attempting to init PCI bdf 00:01.2 (vd 8086:7020)
Attempting to init PCI bdf 00:01.3 (vd 8086:7113)
Attempting to init PCI bdf 00:03.0 (vd 10ec:8139)
Copying option rom (size 61440) from 0xfeba0000 to c9000
Running option rom at c900:0003
pmm call arg1=1
pmm01: handle=18ae1000
pmm call arg1=0
pmm00: length=f00 handle=18ae1000 flags=2
pmm call arg1=1
pmm01: handle=18ae2004
pmm call arg1=0
pmm00: length=4000 handle=18ae2004 flags=2
Attempting to init PCI bdf 00:04.0 (vd eace:eace)
Attempting to init PCI bdf 00:05.0 (vd eace:eace)
Attempting to init PCI bdf 00:06.0 (vd 1af4:1002)
Attempting to init PCI bdf 00:07.0 (vd eace:eace)
Attempting to init PCI bdf 00:08.0 (vd eace:eace)
Searching bootorder for: /pci@i0cf8/*@3
Registering bootable: iPXE (PCI 00:03.0) (type:128 prio:9999 data:c9000372)
Searching bootorder for: /rom@genroms/vapic.bin
Registering bootable: Legacy option rom (type:129 prio:101 data:ca000003)
Mapping hd drive 0x000fd7d0 to 0
drive 0x000fd7d0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=104857600
Mapping cd drive 0x000fd7a0
Running option rom at ca00:0003
ebda moved from 9fc00 to 9f400
finalize PMM
malloc finalize
Returned 57344 bytes of ZoneHigh
e820 map has 7 items:
  0: 0000000000000000 - 000000000009f400 = 1 RAM
  1: 000000000009f400 - 00000000000a0000 = 2 RESERVED
  2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
  3: 0000000000100000 - 00000000dfffe000 = 1 RAM
  4: 00000000dfffe000 - 00000000e0000000 = 2 RESERVED
  5: 00000000fffbc000 - 0000000100000000 = 2 RESERVED
  6: 0000000100000000 - 0000000220000000 = 1 RAM
locking shadow ram
Jump to int19
enter handle_19:
  NULL
Booting from Hard Disk...
Booting from 0000:7c00
unimplemented handle_1aXX:493:
   a=0000bb00  b=0000aa55  c=0000ffff  d=00000080 ds=0000 es=0000 ss=0000
  si=00007e00 di=00000800 bp=000007be sp=00007bfe cs=0000 ip=06e7  f=3246
unimplemented handle_1aXX:493:
   a=0000bb00  b=00000000  c=00000000  d=000009a0 ds=07c0 es=09a0 ss=0000
  si=00007be4 di=00000800 bp=000007be sp=00007c00 cs=07c0 ip=00db  f=3246
unimplemented handle_1aXX:493:
   a=0000bb00  b=00000000  c=0000005e  d=00000000 ds=07c0 es=2000 ss=0000
  si=00003808 di=00000000 bp=000007be sp=00007bda cs=07c0 ip=0f54  f=3246
unimplemented handle_1aXX:493:
   a=0000bb00  b=00000000  c=00000000  d=00000000 ds=0000 es=0000 ss=23de
  si=00000000 di=00000000 bp=00000000 sp=00001462 cs=2000 ip=0a39  f=3256

[Gerd Hoffmann]

On 05/22/12 08:21, Alexey Korolev wrote:
> Hi,
> > On 05/18/12 03:50, Alexey Korolev wrote:
> > > Hi,
> > >
> > > It looks Win2008 R2 is not working with this patches if 64bit devices are present and going to occupy a 64bit range.
> > > I've got the same BSOD as before.
> > > Is there any information I could collect to help you debug this issue?
> >
> > Is win2k8 fine with the fixed entry (the reverted patch)?
>
> If patches are reverted no BSOD occurs, but no 64bit resources available too :(.

No, I mean your patch which adds a 64bit entry unconditionally (which
was reverted due to winxp issues), does that one work fine with w2k8?
i.e. commit 74f96123e7e37c219403b50e39dabc8e8c450948
> > You can try add DBUG("...") calls into the _CRS Method to figure the
> > problematic call.  That adds debug output to the seabios log.  Doesn't
> > work with winxp, works with win7 (and linux).  Lets hope that w2k8 is
> > closer to win7 ...
>
> I tried but log doesn't have any DBUG messages inside.
> I've just outputed the seabios log to serial port. Is it suitable?

Hmm, no.  The magic words are:

qemu $usualargsforyourguest \
   -chardev file,id=bioslog,path=/path/to/seabios.log \
   -device isa-debugcon,iobase=0x402,chardev=bioslog

That adds the seabios debug port and logfile windup.  The DBUG function
in the dsdt uses the debug port too.  Redirecting seabios output to
serial will *not* show the acpi debug stuff as this goes directly to the
debug port, seabios isn't involved here at all, they just share the port
so all output conveniently shows up in the same logfile.

cheers,
  Gerd

[Alexey Korolev]

On 22/05/12 18:38, Gerd Hoffmann wrote:
> On 05/22/12 08:21, Alexey Korolev wrote:
> > Hi,
> > > On 05/18/12 03:50, Alexey Korolev wrote:
> > > > Hi,
> > > >
> > > > It looks Win2008 R2 is not working with this patches if 64bit devices are present and going to occupy a 64bit range.
> > > > I've got the same BSOD as before.
> > > > Is there any information I could collect to help you debug this issue?
> > >
> > > Is win2k8 fine with the fixed entry (the reverted patch)?
> >
> > If patches are reverted no BSOD occurs, but no 64bit resources available too :(.
>
> No, I mean your patch which adds a 64bit entry unconditionally (which
> was reverted due to winxp issues), does that one work fine with w2k8?
> i.e. commit 74f96123e7e37c219403b50e39dabc8e8c450948

Ah I see. Yes the seabios with the static 64bit entry works without problems on Win2008r2.
> > > You can try add DBUG("...") calls into the _CRS Method to figure the
> > > problematic call.  That adds debug output to the seabios log.  Doesn't
> > > work with winxp, works with win7 (and linux).  Lets hope that w2k8 is
> > > closer to win7 ...
> >
> > I tried but log doesn't have any DBUG messages inside.
> > I've just outputed the seabios log to serial port. Is it suitable?
>
> Hmm, no.  The magic words are:
>
> qemu $usualargsforyourguest \
>    -chardev file,id=bioslog,path=/path/to/seabios.log \
>    -device isa-debugcon,iobase=0x402,chardev=bioslog
>
> That adds the seabios debug port and logfile windup.  The DBUG function
> in the dsdt uses the debug port too.  Redirecting seabios output to
> serial will *not* show the acpi debug stuff as this goes directly to the
> debug port, seabios isn't involved here at all, they just share the port
> so all output conveniently shows up in the same logfile.

Here is the log.

pci0 _crs: enter
pci0 _crs: 64bit
pci0 _crs: done

I've also tried the latest qemu version and ivshmem with 64bit support. Result is the same.

Thanks,
Alexey

[Gerd Hoffmann]

Hi,
> Ah I see. Yes the seabios with the static 64bit entry works without problems on Win2008r2.

Ok.
> Here is the log.
>
> pci0 _crs: enter
> pci0 _crs: 64bit
> pci0 _crs: done

Hmm, so it finishes the aml method, i.e. doesn't bluescreen while
executing it (saw this happening due to buggy aml code in older patch
versions with win7).

No idea offhand.
Does the bluescreen displayed offer useful any hints?

cheers,
  Gerd

[Alexey Korolev]

On 24/05/12 21:07, Gerd Hoffmann wrote:
> Does the bluescreen displayed offer useful any hints?

Well, not much really. It just tells that the BIOS is not fully ACPI compliant.
See the attachment.

[ron minnich]

Ah,the A5 BSOD, the bane of my life.

This is an ACPI issue.

That last paramter, 494e495f, is a *CLUE*. It is ASCII. It is _INI. No
idea if that helps.

There is more info available ... just google Windows A5 Stop.

thanks

ron