SeaBIOS

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3775 discussions

SeaBIOS debugging - breakpoint placement problems
by Krzysztof Bordon 14 Apr '21

14 Apr '21

Hello, I am experiencing problems with effective breakpoint setting at particular addresses while debugging Seabios with GNU GDB. The problem is that placing a breakpoint at an address (i.e.) *0xc3a8a, which belongs to vgabios region, and specifying an ignore count say 5 should make the gdb stop at it after it hits 5 times the address (on the 6th hit), but it never does - it seems to ignore the "ignore count" and stop on the next crossing instead. The same happens with some other addresses, like 0xf732a. What's more - the output of "info b" command shows that ignore counter is not updated after a hit. I suppose the reason for this misbehavior might be that those addresses belong to regions that are read only - the 0xc3a8a is a vga rom address and the 0xf732a lies somewhere in the rodata section. But if that was the case, hardware breakpoints could work, but neither those can. This is the example session showing the problem: $ ./qemu-system-x86_64 -s -S -singlestep -machine type=q35 -m 4096 -bios ~/Pobrane/seabios_1.14.0.orig/seabios-1.14.0/out/bios.bin $ $ gdb -q (gdb) target remote localhost:1234 Remote debugging using localhost:1234 warning: No executable has been specified and target does not support determining executable automatically. Try using the "file" command. 0x000000000000fff0 in ?? () (gdb) b *0xf732a Breakpoint 1 at 0xf732a (gdb) ignore 1 5 Will ignore next 5 crossings of breakpoint 1. (gdb) c Continuing. Program received signal SIGTRAP, Trace/breakpoint trap. 0x000000000000732a in ?? () (gdb) info b Num Type Disp Enb Address What 1 breakpoint keep y 0x00000000000f732a ignore next 5 hits (gdb) c Continuing. Program received signal SIGTRAP, Trace/breakpoint trap. 0x000000000000732a in ?? () (gdb) info b Num Type Disp Enb Address What 1 breakpoint keep y 0x00000000000f732a ignore next 5 hits I am using qemu 5.2.0, GNU gdb (Ubuntu 9.2-0ubuntu2) 9.2, and SeaBIOS 1.14.0 Is it possible to set a bp on any of the mentioned addresses so that their ignore counters are taken into account ?

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Bump max MPTABLE and SMBIOS sizes from 600 to 768
by Mike Banon 04 Apr '21

04 Apr '21

There are plenty of coreboot platforms whose MPTABLE size is just slightly larger than the current uneven limit of 600 bytes, which prevents these important tables from being copied. For example, G505S has 628 bytes and A88XM-E has 740 bytes. I propose 768 bytes as a new saner default for MPTABLE size, to replace the current uneven limit of 600. SMBIOS size should be bumped the similar way as well. Signed-off-by: Mike Banon <mikebdp2 at gmail.com> --- diff --git a/src/config.h b/src/config.h index 93c8dbc..71333f8 100644 --- a/src/config.h +++ b/src/config.h @@ -21,9 +21,9 @@ // Largest supported externaly facing drive id #define BUILD_MAX_EXTDRIVE 16 // Number of bytes the smbios may be and still live in the f-segment -#define BUILD_MAX_SMBIOS_FSEG 600 +#define BUILD_MAX_SMBIOS_FSEG 768 // Maximum number of bytes the mptable may be and still be copied to f-segment -#define BUILD_MAX_MPTABLE_FSEG 600 +#define BUILD_MAX_MPTABLE_FSEG 768 #define BUILD_MODEL_ID 0xFC #define BUILD_SUBMODEL_ID 0x00

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[PATCH] malloc: Add check to avoid dereference NULL pointer.
by likejun (A) 03 Apr '21

03 Apr '21

From: Kejun Li <likejun6(a)huawei.com<mailto:likejun6@huawei.com>> Date: Mon, 22 Mar 2021 14:03:10 +0800 Subject: [PATCH] malloc: Add check to avoid dereference NULL pointer. info = alloc_find_lowest() may return NULL, should check before dereference it to avoid potential coredump. Signed-off-by: Kejun Li <likejun6(a)huawei.com<mailto:likejun6@huawei.com>> --- src/malloc.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/src/malloc.c b/src/malloc.c index 3733855..d355b77 100644 --- a/src/malloc.c +++ b/src/malloc.c @@ -544,10 +544,12 @@ malloc_prepboot(void) // Clear unused f-seg ram. struct allocinfo_s *info = alloc_find_lowest(&ZoneFSeg); - u32 size = info->range_end - info->range_start; - memset(memremap(info->range_start, size), 0, size); - dprintf(1, "Space available for UMB: %x-%x, %x-%x\n" - , RomEnd, base, info->range_start, info->range_end); + if (info) { + u32 size = info->range_end - info->range_start; + memset(memremap(info->range_start, size), 0, size); + dprintf(1, "Space available for UMB: %x-%x, %x-%x\n" + , RomEnd, base, info->range_start, info->range_end); + } // Give back unused high ram. info = alloc_find_lowest(&ZoneHigh); -- 2.19.1

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[PATCH] AHCI: The attached ATA device cannot be detected when binding AHCI controller to Virtual Machine
by RunaGuo-oc＠zhaoxin.com 29 Mar '21

29 Mar '21

When binding AHCI controller to virtual machine, the attached ATA device cannot be recognized for the following reason: The first Identify PACKET CMD will be failed without dobut which will lead PORT_IRQ_TF_ERR be set in PxIS due to ERR bit set to 1 in D2H Register FIS(PxTFD.STS.ERR=1). In this case, the first CMD will be timeout for seabios only polling PORT_IRQ_D2H_REG_FIS & PORT_IRQ_PIOS_FIS before triggering error handling which leads AHCI controller is an error state, then the second IDENTIFY CMD cannot be issued by AHCI controller, no ATA device will be detected. In AHCI spec HBA Port State Machine section(5.3.8.1 and 5.3.16.5), we can see this sequence: RegFIS:Entry --> ERR:FatalTaskfile (PxTFD.STS.ERR=1) --> ERR:WaitForClear, no entry for PORT_IRQ_D2H_REG_FIS/PORT_IRQ_PIOS_FIS to be set at this time. May be we can also add PORT_IRQ_TF_ERR bit check when polling command completion status? fail log: 02.386: |bffa6000| AHCI/1: link up 02.387: |bffa6000| AHCI/1: send cmd ... 02.387: |bffa7000| phys_free bffa9c00 (detail=0xbffaa320) 02.396: |bffa7000| phys_free bffaa200 (detail=0xbffaa1d0) 02.396: |bffa7000| phys_free bffaa000 (detail=0xbffaa1a0) 02.396: |bffa7000| phys_free bffaa380 (detail=0xbffaa350) 02.400: \bffa7000/ End thread 02.401: phys_free bffa7000 (detail=0xbffaa170) 34.391: |bffa6000| WARNING - Timeout at ahci_command:153! 34.392: |bffa6000| AHCI/1: send cmd ... 66.397: |bffa6000| WARNING - Timeout at ahci_command:153! Signed-off-by: zhaoxin\runaguooc <RunaGuo-oc(a)zhaoxin.com> --- src/hw/ahci.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/src/hw/ahci.c b/src/hw/ahci.c index d45b430..bab5c35 100644 --- a/src/hw/ahci.c +++ b/src/hw/ahci.c @@ -104,7 +104,7 @@ static void ahci_port_writel(struct ahci_ctrl_s *ctrl, u32 pnr, u32 reg, u32 val static int ahci_command(struct ahci_port_s *port_gf, int iswrite, int isatapi, void *buffer, u32 bsize) { - u32 val, status, success, flags, intbits, error; + u32 val, status, success, flags, intbits, error, tf; struct ahci_ctrl_s *ctrl = port_gf->ctrl; struct ahci_cmd_s *cmd = port_gf->cmd; struct ahci_fis_s *fis = port_gf->fis; @@ -148,6 +148,14 @@ static int ahci_command(struct ahci_port_s *port_gf, int iswrite, int isatapi, error = GET_LOWFLAT(fis->rfis[3]); break; } + + if(intbits & PORT_IRQ_TF_ERR){ + tf = ahci_port_readl(ctrl,pnr,PORT_TFDATA); + status = tf & 0xff; + error = tf & 0xff00; + break; + } + } if (timer_check(end)) { warn_timeout(); -- 2.17.1

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[PATCH v3] The attached ATA device cannot be detected when binding AHCI controller to Virtual Machine
by zhaoxin\runaguooc 29 Mar '21

29 Mar '21

From: Runa Guo-oc <RunaGuo-oc(a)zhaoxin.com> 1: The first ATA_CMD_IDENTIFY_PACKET_DEVICE command will be failed for ATA device with PORT_IRQ_IF_ERR from ahci spec; 2: I have not yet found any evidences which can be used to combine above fail with PORT_IRQ_D2H/PIO_FIS set to 1 from ahci spec; 3: Seabios code only polling PORT_IRQ_D2H/PIO_FIS for command completion, then the above fail will be regarded as timeout, no eh will be triggered to reset port state machine, then the following ATA_ID_CMD will not be issued by HAB. May be the following patch will be work. Signed-off-by: Runa Guo-oc <RunaGuo-oc(a)zhaoxin.com> --- src/hw/ahci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/hw/ahci.c b/src/hw/ahci.c index d45b430..c9d379d 100644 --- a/src/hw/ahci.c +++ b/src/hw/ahci.c @@ -143,7 +143,7 @@ static int ahci_command(struct ahci_port_s *port_gf, int iswrite, int isatapi, error = GET_LOWFLAT(fis->psfis[3]); break; } - if (intbits & 0x01) { + if (intbits & (0x01| PORT_IRQ_TF_ERR)) { status = GET_LOWFLAT(fis->rfis[2]); error = GET_LOWFLAT(fis->rfis[3]); break; -- 2.17.1

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seabios unable to boot from iscsi disk in a vm with 11 virtio disks and 1 iscsi disk.
by Yiguang Chen 26 Mar '21

26 Mar '21

The seabios version is ref-1.13.0. I have a qemu vm with 11 virtio disks and 1 iscsi disk. The iscsi disk has a bootable windows system and the bootorder is '1'. When the vm start, the seabios show me "No bootable device". 

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How to change Seabios configuration to disable Legacy Bios and enable UEFI bios
by Fatemi (US), Afsheen K 24 Mar '21

24 Mar '21

Dear SeaBios Support, I'm using KVM on a Redhat 7.3. I'm having difficulty creating a Windows 10 VM as it complains in the beginning of the installation that the BIOS is set to Legacy which should be disabled and set to UEFI. The BIOS of the physical host is indeed set to UEFI but the BIOS of the virtual box that KVM is using(Seabios version 1.9.1-5.el7) appears to be set to Legacy. I don't know how to reconfigure Seabios to change it to UEFI. The VM boot menu doesn't have any options to go to its bios. Apparently there should be some "kemu" or similar command with correct parameters which might do the trick. Any help would be appreciated very much. Regards, Afsheen

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FW: [EXTERNAL] [mail.coreboot.org] Please Confirm Your E-mail Address
by Fatemi (US), Afsheen K 22 Mar '21

22 Mar '21

Dear Seabios Team, I have just registered to your website and am trying to open a discussion thread, however, I get an error when clicking on "open a new thread" button. Would you please give me instructions on how to start a discussion/thread? Thanks, Afsheen Fatemi -----Original Message----- From: mailman(a)coreboot.org [mailto:mailman@coreboot.org] Sent: Monday, March 22, 2021 1:13 PM To: Fatemi (US), Afsheen K <afsheen.k.fatemi(a)boeing.com> Subject: [EXTERNAL] [mail.coreboot.org] Please Confirm Your E-mail Address EXT email: be mindful of links/attachments. Hello from mail.coreboot.org! You're receiving this e-mail because user afsheenf14 has given your e-mail address to register an account on mail.coreboot.org. To confirm this is correct, go to https://mail.coreboot.org/accounts/confirm-email/OTQ4NA:1lOQvE:ZNAfVDvYtTjk… Thank you for using mail.coreboot.org! mail.coreboot.org

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[PATCH 1/1] usb-hid: Increase MAX_KBD_EVENT
by Stefan Ott 11 Mar '21

11 Mar '21

Some USB keyboards use max packet sizes beyond the current maximum supported by SeaBIOS. This increases the available size to support keyboards such as the Matias Ergo Pro. Signed-off-by: Stefan Ott <stefan(a)ott.net> --- src/hw/usb-hid.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/hw/usb-hid.c b/src/hw/usb-hid.c index a22765b..92c6b19 100644 --- a/src/hw/usb-hid.c +++ b/src/hw/usb-hid.c @@ -56,7 +56,7 @@ struct keyevent { u8 keys[6]; }; -#define MAX_KBD_EVENT 10 +#define MAX_KBD_EVENT 16 static int usb_kbd_setup(struct usbdevice_s *usbdev -- 2.30.1

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[PATCH 00/31] Add support for PA-RISC CPU target
by Helge Deller 08 Mar '21

08 Mar '21

This patchset modifies SeaBIOS source code to be able to build a firmware for the PA-RISC CPU architecture. This firmware can then be used to boot a virtual PA-RISC machine with PA-Linux and HP/UX on QEMU. Where possible existing SeaBIOS drivers and infrastructure is reused. Since PA-RISC is native 32/64-Bit, the various segment accessors are not needed and replaced by simple variable accesses. Helge Deller (31): Add config option for PA-RISC arch biosvar.h: Add accessors for various BIOS data areas Drivers: Use get_bda_ptr() BDA accessor byteorder.h: Add endianess conversion functions farptr.h: Add FLATPTR* accessor functions for parisc font.c: Disable built-in x86 font on parisc paravirt.h: Add PORT_QEMU_CFG_CTL for parisc pciinit.c: Initialize PA-RISC Dino PCI chip shadow.c: Compile int3 inline assembly on x86 only Add portaddr_t typedef to specify I/O port addresses ata.c: Allow to boot on PA-RISC ata.h: Add ATA IDE port addresses for PA-RISC blockcmd.c: Prevent unaligned access crash on PA-RISC scsi: Add fields for specifying target and lun of SCSI devices lsi-scsi.c: Convert SCSI script to little endian pci.c: Add PCI ports for PA-RISC and access PCI bus in little-endian rtc.h: Add CMOS/RTC addresses for PA-RISC serialio.h: Add serial port adresses for PA-RISC malloc.c: Implement a PA-RISC specific malloc() output.c: Add PA-RISC specific output behaviour output.c: Make printf() capable to print 64bit int values romfile.c: return values are returned as little-endian sercon.c: Use SEROFF_IIR constant stacks.h: Provide replacement for thread functions when !CONFIG_THREADS version.c: Mark version strings const x86.h: Provide replacement functions for PA-RISC parisc: Add PA-RISC related code string.c: reimplement mem*_far() functions for PA-RISC boot.c: Add boot disc chooser for PA-RISC block.c: Allow PA-RISC to boot from ATA drives ata.c: Add missing endianess conversion functions Makefile | 9 +- Makefile.parisc | 192 ++++ src/Kconfig | 54 +- src/biosvar.h | 31 + src/block.c | 10 +- src/block.h | 2 + src/boot.c | 48 + src/byteorder.h | 74 ++ src/farptr.h | 14 +- src/font.c | 2 + src/fw/csm.c | 2 +- src/fw/paravirt.h | 7 + src/fw/pciinit.c | 53 +- src/fw/shadow.c | 2 + src/hw/ata.c | 70 +- src/hw/ata.h | 14 +- src/hw/blockcmd.c | 17 +- src/hw/blockcmd.h | 2 +- src/hw/esp-scsi.c | 2 +- src/hw/lsi-scsi.c | 6 +- src/hw/megasas.c | 2 +- src/hw/mpt-scsi.c | 2 +- src/hw/pci.c | 13 +- src/hw/pvscsi.c | 2 +- src/hw/rtc.h | 7 + src/hw/serialio.c | 2 +- src/hw/serialio.h | 10 +- src/hw/usb-msc.c | 2 +- src/hw/usb-uas.c | 2 +- src/hw/virtio-scsi.c | 2 +- src/malloc.c | 4 +- src/malloc.h | 8 +- src/output.c | 56 +- src/parisc/b160l.h | 630 +++++++++++ src/parisc/head.S | 319 ++++++ src/parisc/hppa.h | 370 +++++++ src/parisc/hppa_hardware.h | 49 + src/parisc/lasips2.c | 66 ++ src/parisc/lasips2.h | 17 + src/parisc/malloc.c | 91 ++ src/parisc/pafirmware.lds.S | 69 ++ src/parisc/parisc.c | 1997 +++++++++++++++++++++++++++++++++++ src/parisc/pdc.h | 694 ++++++++++++ src/parisc/sti.c | 179 ++++ src/parisc/sticore.h | 326 ++++++ src/parisc/stirom.c | 652 ++++++++++++ src/parisc/timer.c | 103 ++ src/post.c | 2 +- src/romfile.c | 4 +- src/sercon.c | 2 +- src/serial.c | 4 +- src/stacks.h | 17 +- src/string.c | 27 +- src/types.h | 8 +- src/version.c | 4 +- src/x86.h | 6 + 56 files changed, 6236 insertions(+), 123 deletions(-) create mode 100644 Makefile.parisc create mode 100644 src/parisc/b160l.h create mode 100644 src/parisc/head.S create mode 100644 src/parisc/hppa.h create mode 100644 src/parisc/hppa_hardware.h create mode 100644 src/parisc/lasips2.c create mode 100644 src/parisc/lasips2.h create mode 100644 src/parisc/malloc.c create mode 100644 src/parisc/pafirmware.lds.S create mode 100644 src/parisc/parisc.c create mode 100644 src/parisc/pdc.h create mode 100644 src/parisc/sti.c create mode 100644 src/parisc/sticore.h create mode 100644 src/parisc/stirom.c create mode 100644 src/parisc/timer.c -- 2.29.2

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