SeaBIOS

seabios@seabios.org

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[PATCH v3 0/5] Make seabios linkable with lld
by Fangrui Song 11 Aug '21

11 Aug '21

This patch series make seabios linkable with lld. This is beneficial for FreeBSD ports as well https://svnweb.freebsd.org/ports/head/misc/seabios/Makefile as they can drop an LLD_UNSAFE As a maintainer of lld ELF, I have triaged numerous pieces of software. seabios is the only one making use of This drops the only instance https://sourceware.org/bugzilla/show_bug.cgi?id=12726 1, 2, 3 and 4 are really independent and can be applied in arbitrary order. 5 depends on 4. I originally combined 4 and 5 and that was why I don't think a patch series made sense. Fangrui Song (5): romlayout.S: Add missing SHF_ALLOC flag to .fixedaddr.\addr Make rom16.o linkable with lld Makefile: Change ET_EXEC to ET_REL so that lld can link bios.bin.elf romlayout32flag.lds: Use `. +=` instead of `. =` test-build.sh: Delete unneeded LD capability test Makefile | 4 ++++ scripts/layoutrom.py | 13 ++++++++++--- scripts/test-build.sh | 42 +----------------------------------------- src/romlayout.S | 2 +- 4 files changed, 16 insertions(+), 45 deletions(-) -- 2.26.0.292.g33ef6b2f38-goog

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[PATCH v2] nvme: don't keep probing namespaces after an active one has been found
by Thanos Makatos 27 Jul '21

27 Jul '21

The current implementation keeps probing NVMe namespaces even if an active one has been found. This is unnecessary and most importantly results in memory allocation failure if the are more than a few dozens of namespaces. Also, not probing the remaining namespaces after having found an active one reduces boot time. Signed-off-by: Thanos Makatos <thanos.makatos(a)nutanix.com> --- Changed since v1: * remove unnecessary code changes --- src/hw/nvme.c | 26 ++++++++++++++++++++++---- 1 file changed, 22 insertions(+), 4 deletions(-) diff --git a/src/hw/nvme.c b/src/hw/nvme.c index f035fa2..872ef43 100644 --- a/src/hw/nvme.c +++ b/src/hw/nvme.c @@ -233,9 +233,11 @@ nvme_admin_identify_ns(struct nvme_ctrl *ctrl, u32 ns_id) ns_id)->ns; } -static void +int nvme_probe_ns(struct nvme_ctrl *ctrl, u32 ns_idx, u8 mdts) { + int ret = -1; + u32 ns_id = ns_idx + 1; struct nvme_identify_ns *id = nvme_admin_identify_ns(ctrl, ns_id); @@ -303,9 +305,11 @@ nvme_probe_ns(struct nvme_ctrl *ctrl, u32 ns_idx, u8 mdts) dprintf(3, "%s\n", desc); boot_add_hd(&ns->drive, desc, bootprio_find_pci_device(ctrl->pci)); + ret = 0; free_buffer: free (id); + return ret; } @@ -560,6 +564,13 @@ nvme_wait_csts_rdy(struct nvme_ctrl *ctrl, unsigned rdy) return 0; } +static void +nvme_destroy_io_queues(struct nvme_ctrl *ctrl) +{ + nvme_destroy_sq(&ctrl->io_sq); + nvme_destroy_cq(&ctrl->io_cq); +} + /* Returns 0 on success. */ static int nvme_controller_enable(struct nvme_ctrl *ctrl) @@ -628,15 +639,22 @@ nvme_controller_enable(struct nvme_ctrl *ctrl) goto err_destroy_admin_sq; } - /* Populate namespace IDs */ + /* Find first active namespace. */ int ns_idx; - for (ns_idx = 0; ns_idx < ctrl->ns_count; ns_idx++) { - nvme_probe_ns(ctrl, ns_idx, identify->mdts); + rc = -1; + for (ns_idx = 0; ns_idx < ctrl->ns_count && rc; ns_idx++) { + rc = nvme_probe_ns(ctrl, ns_idx, identify->mdts); + } + if (rc) { + dprintf(3, "no active NVMe namespace\n"); + goto err_destroy_ioq; } dprintf(3, "NVMe initialization complete!\n"); return 0; + err_destroy_ioq: + nvme_destroy_io_queues(ctrl); err_destroy_admin_sq: nvme_destroy_sq(&ctrl->admin_sq); err_destroy_admin_cq: -- 2.22.3

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[PATCH] nvme: don't keep probing namespaces after an active one has been found
by Thanos Makatos 22 Jul '21

22 Jul '21

From: Thanos Makatos <thanos(a)nutanix.com> The current implementation keeps probing NVMe namespaces even if an active one has been found. This is unnecessary and most importantly results in memory allocation failure if the are more than a few dozens of nmespaces. Also, not probing the remaining namespaces after having found an active one reduces boot time. I've tested with 1024 namespaces where 512 where active and it worked fined. Signed-off-by: Thanos Makatos <thanos(a)nutanix.com> --- src/hw/nvme.c | 51 +++++++++++++++++++++++++++++++++++++++------------ 1 file changed, 39 insertions(+), 12 deletions(-) diff --git a/src/hw/nvme.c b/src/hw/nvme.c index 746e468..73c1a52 100644 --- a/src/hw/nvme.c +++ b/src/hw/nvme.c @@ -233,9 +233,22 @@ nvme_admin_identify_ns(struct nvme_ctrl *ctrl, u32 ns_id) ns_id)->ns; } -static void +static char* +nvme_ns_desc(const struct nvme_namespace *ns, u32 ns_id) +{ + return znprintf(MAXDESCSIZE, "NVMe NS %u: %llu MiB (%llu %u-byte " + "blocks + %u-byte metadata)\n", + ns_id, (ns->lba_count * ns->block_size) >> 20, + ns->lba_count, ns->block_size, + ns->metadata_size); +} + +/* Returns a pointer to the namespace if it's usable, NULL otherwise. */ +struct nvme_namespace* nvme_probe_ns(struct nvme_ctrl *ctrl, u32 ns_idx, u8 mdts) { + struct nvme_namespace *ns = NULL; + u32 ns_id = ns_idx + 1; struct nvme_identify_ns *id = nvme_admin_identify_ns(ctrl, ns_id); @@ -257,7 +270,7 @@ nvme_probe_ns(struct nvme_ctrl *ctrl, u32 ns_idx, u8 mdts) goto free_buffer; } - struct nvme_namespace *ns = malloc_fseg(sizeof(*ns)); + ns = malloc_fseg(sizeof(*ns)); if (!ns) { warn_noalloc(); goto free_buffer; @@ -277,6 +290,7 @@ nvme_probe_ns(struct nvme_ctrl *ctrl, u32 ns_idx, u8 mdts) buffer size. */ warn_internalerror(); free(ns); + ns = NULL; goto free_buffer; } @@ -296,16 +310,13 @@ nvme_probe_ns(struct nvme_ctrl *ctrl, u32 ns_idx, u8 mdts) ns->dma_buffer = zalloc_page_aligned(&ZoneHigh, NVME_PAGE_SIZE); - char *desc = znprintf(MAXDESCSIZE, "NVMe NS %u: %llu MiB (%llu %u-byte " - "blocks + %u-byte metadata)", - ns_id, (ns->lba_count * ns->block_size) >> 20, - ns->lba_count, ns->block_size, ns->metadata_size); - - dprintf(3, "%s\n", desc); - boot_add_hd(&ns->drive, desc, bootprio_find_pci_device(ctrl->pci)); + char *desc = nvme_ns_desc(ns, ns_id); + dprintf(3, "%s", desc); + free(desc); free_buffer: free (id); + return ns; } @@ -560,6 +571,13 @@ nvme_wait_csts_rdy(struct nvme_ctrl *ctrl, unsigned rdy) return 0; } +static void +nvme_destroy_io_queues(struct nvme_ctrl *ctrl) +{ + nvme_destroy_sq(&ctrl->io_sq); + nvme_destroy_cq(&ctrl->io_cq); +} + /* Returns 0 on success. */ static int nvme_controller_enable(struct nvme_ctrl *ctrl) @@ -628,15 +646,24 @@ nvme_controller_enable(struct nvme_ctrl *ctrl) goto err_destroy_admin_sq; } - /* Populate namespace IDs */ + /* Find first active namespace. */ int ns_idx; - for (ns_idx = 0; ns_idx < ctrl->ns_count; ns_idx++) { - nvme_probe_ns(ctrl, ns_idx, identify->mdts); + struct nvme_namespace *ns = NULL; + for (ns_idx = 0; ns_idx < ctrl->ns_count && !ns; ns_idx++) { + ns = nvme_probe_ns(ctrl, ns_idx, identify->mdts); + } + if (!ns) { + dprintf(3, "no active NVMe namespace\n"); + goto err_destroy_ioq; } + boot_add_hd(&ns->drive, nvme_ns_desc(ns, ns_idx + 1), + bootprio_find_pci_device(ctrl->pci)); dprintf(3, "NVMe initialization complete!\n"); return 0; + err_destroy_ioq: + nvme_destroy_io_queues(ctrl); err_destroy_admin_sq: nvme_destroy_sq(&ctrl->admin_sq); err_destroy_admin_cq: -- 2.22.3

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[PATCH v3 0/2] Add support for all HD and QXGA resolutions
by Elliot Killick 21 Jul '21

21 Jul '21

Hi, This patch series adds support for all HD and QXGA resolutions. It has been squashed into two commits as per your advice on version 2. Best regards, Elliot Elliot Killick (2): svgamodes: Add all HD and QXGA resolutions svgamodes: Improve formatting vgasrc/svgamodes.c | 217 +++++++++++++++++++++++++++++---------------- 1 file changed, 140 insertions(+), 77 deletions(-) -- 2.30.0

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Re: INT 14H
by Paul Edwards 21 Jul '21

21 Jul '21

Hi Peter. Thanks for the great info. >> Ok, the main thing is I don't want my OS to have to load >> this, I want it loaded before the OS is loaded. > I understood that, and an option ROM satisfies this. Ok, thanks for confirming. > The bare board only needs power to run, everything is onboard. Some > resellers may offer the board mounted in a case. Ok, I was hoping not to be involved in computers where even getting a case is a challenge. >> Does this imply most computers don’t allow their firmware to be >> flashed with SeaBIOS? > You can flash it, but the computer will no longer start. Ok. :-) > SeaBIOS doesn't perform hardware initialization of e.g. RAM and PCI > busses. > SeaBIOS was created to be a coreboot payload when a system with coreboot > needed a BIOS to start the OS. Oh I see. In that case, let me rephrase - does this imply most computers don't allow their firmware to be flashed with coreboot? >> If that is the case, is there someone else I should be negotiating with? > Good question - it probably depends on the bigger picture of your project. > What do you want to accomplish in the end? Is this a one-off thing or high > volume, how deterministic must it be in which environment etc.? I have an operating system already, called PDOS/386, available at http://pdos.org It uses the BIOS almost exclusively (switching back and forth to RM16). I intend to eliminate the non-BIOS code, and I intend to start using INT 14H to access the outside world. But for now, that’s the limits of the design changes I wish to make to the OS. I instead want to see if I can make the hardware/firmware conform to the published specs I rely on, while operating in a modern environment, with Wifi replacing modems. And then I want to recommend to anyone purchasing a computer to pay extra to get one that runs PDOS/386. Other things they should ensure is that the BIOS can convert all 3 USB sticks/ports into hard disks, not just the one that is being booted. Currently I don't know what to recommend, because I don't understand the other side of the INT 13H/14H, only the OS side. And I don't know what is technically possible, so that there is something to recommend in the future. >> > Think of an option ROM as a modular expansion to any BIOS. > >> This sounds promising. So perhaps manufacturers allow >> option ROMs to be flashed, but just not the entire >> BIOS to be replaced? > Option ROMs traditionally exist primarily on option cards. SeaBIOS is > cleverer and can also run option ROMs in the boot flash. > A proprietary BIOS or UEFI will not likely run an option ROM from the > boot flash. I don't need the proprietary one to work, so long as it can be replaced with coreboot + SeaBIOS. >> > Here's an open source option ROM: https://github.com/alson/sgabios > >> > It's x86 real mode assembly; the typical BIOS environment. > >> I took a look thanks. But actually I am hoping all of this will >> be in C. I was expecting INT 14H to be minimal x86 real >> mode that switched to UEFI C code, > Oh, UEFI.. > You may know, but interrupt services such as int 14h are a BIOS interface, > as provided by traditional BIOS implementations. Sure. For now, I want PDOS/386 to remain traditional. When I have exhausted everything that is possible via the BIOS, I will consider adding UEFI support. > UEFI implementations do > not provide interrupt services, but a CSM can. Sure. And there's no disadvantage in CSM, is there? >> the same as CSM does (right?). > I don't think UEFI mandates /how/ a CSM implements the interrupt services, > I'd expect that a CSM can do what it wants without calling into UEFI, but > depending on what it needs to do it may /want/ to call into UEFI. Yeah, I'm on the "want" side of that. I'd like to be executing C-derived code as much as possible. >> I read that SeaBIOS supports CSM. > SeaBIOS can act as CSM, at a minimum in VMs, I don't know what the > situation is with UEFI implementations on hardware. I don't really understand this. What I'm looking for, at least ideally, is for a BIOS implementation that switches to 32-bit or 64-bit mode, and C, to do the actual work. I thought that was how modern systems worked, and the very definition of CSM? >> Ok, for the specific case of converting INT 14H into Bluetooth - >> I assume that much Bluetooth hardware is proprietary. > Bluetooth is one of the most, if not the most, proprietary contemporary > technologies. I think it may be the original case of a quasi-open > standardization process coupled with fierce intent to keep any > implementations as closed as possible. Ok, this is a good starting point for analysis then. The protocol itself must be open, for two bluetooth devices to talk to each other. So at what level is it proprietary? Everyone develops their own silicon? >> But I know that libbluetooth exists. > What does libbluetooth refer to, exactly? > If you mean the shared library (.so file) on Linux systems then that > isn't relevant for your idea. Yes, that's what I was referring to. I read that the specs for bluetooth were buried in the libbluetooth source code, rather than a document. >> Basically is it possible to flash libbluetooth onto an option ROM, >> add 100 lines of x86 assembler to switch to long mode from INT 14H, >> call libbluetooth, and call it a day? > No way. Ok. But that's where my level of understanding is. :-) >> Or approximately how many lines of x86 assembler and C >> code are required in addition to what SeaBIOS + libbluetooth >> already provide? Or is there some technical problem >> prohibiting this solution? > The latter. libbluetooth.so is a mere fraction of the software involved > in using BT on a Linux system. The majority exists in the Linux kernel > and uses lots of kernel infrastructure, so can not run standalone. Could it have been modularized so that it could run standalone? Isn't that what drivers are for? Maybe if drivers were written to a particular standard they could be flashed onto the firmware? > You very likely don't want to get into developing a BT stack, especially > not one running in a BIOS environment. I had hoped it already existed, and just needed to be rearranged and flashed. The only abnormal thing I wish to do is to get a traditional INT 14H to call someone else's stack. > I strongly recommend to keep all BT parts of this project in separate > hardware outside of the x86 system and to choose/design that hardware > such that it's comfortable to use in your int 14h handler. > Since the apu board has two serial ports (one internal on a header) > its BIOS may already provide int 14h services for those ports, then you > could just connect a transparent BT UART and be done, no software needed > at all for that. The point of my firmware project is not to make BT UARTs sell like hotcakes. BT is just one target. A more useful one is Wifi. But I think BT is better for abstracting the problem. This is a general question about the hardware manufacturing process. What options exist for bending hardware (firmware) to the will of my operating system? Someone mentioned "SeaBIOS" which is why I'm here, but I may be in the wrong place. Obviously I can always go back to 1990 and my OS will work fine with a real serial port and a real modem. But I'd like to transport all of that software, designed for that environment, and change nothing at all, and have it work on a new environment that includes Wifi, bluetooth and maybe ethernet, and maybe infrared, and maybe other things I don't know about, but make sense (at some level) to be accessed via INT 14H. But I'm only talking about functions 1 (write) and 2 (read) of INT 14H. I expect function 0 (initialize) to have no meaning on modern hardware, and should always have been done via a separate "MODE" command in MSDOS (and now PDOS/386), and in a modern environment, you can do the MODE command if you want, and PDOS/386 will dutifully pass that on to function 0, as MSDOS presumably did, but (something - SeaBIOS?) will not actually do anything, because everything (ie the bluetooth hardware) is effectively operating at N,8,1 and maximum speed. Thanks. Paul.

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Re: INT 14H
by Paul Edwards 12 Jul '21

12 Jul '21

Resending ... I thought I was subscribed, but apparently I am not. -----Original Message----- From: Paul Edwards Sent: Tuesday, June 29, 2021 9:00 AM To: seabios(a)seabios.org Subject: Re: INT 14H Hi Peter. Thanks for your reply. > Sure. Implement a driver for that redirection which behaves as an > int14h handler and place the address of its entry point at address > 0000:0080. (14h*4) > The method works with any BIOS. I would like it to work with any OS that uses INT 14H (regardless of how many of those exist), rather than any BIOS. For now I am happy if it only works with SeaBIOS, and I will simply buy a PC that allows me to flash SeaBIOS onto it. Other manufacturers can do other things with INT 14H, redirecting it to some other device, such as HAM radio. > If suitable for your hardware you could do all of it in an option ROM. I'm not familiar with this terminology. Is this something that goes into SeaBIOS? I'm expecting it to be something that is set up (and even configured by the end user in the BIOS) before my OS is even loaded. Thanks. Paul.

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[PATCH] nvme: fix missing newline on sq full print
by Alex Martens 30 Jun '21

30 Jun '21

Signed-off-by: Alex Martens <alexmgit(a)protonmail.com> --- src/hw/nvme.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/hw/nvme.c b/src/hw/nvme.c index 746e468..f035fa2 100644 --- a/src/hw/nvme.c +++ b/src/hw/nvme.c @@ -155,7 +155,7 @@ static struct nvme_sqe * nvme_get_next_sqe(struct nvme_sq *sq, u8 opc, void *metadata, void *data, void *data2) { if (((sq->head + 1) & sq->common.mask) == sq->tail) { - dprintf(3, "submission queue is full"); + dprintf(3, "submission queue is full\n"); return NULL; } -- 2.31.1

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[PATCH] tcgbios: Fix details in log entries
by Stefan Berger 30 Jun '21

30 Jun '21

Fix two details of the logs: - Set the field 'SpecErrata' to 2 as required by specs. - Write the separator into the log entry's event field. Signed-off-by: Stefan Berger <stefanb(a)linux.ibm.com> --- src/tcgbios.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/tcgbios.c b/src/tcgbios.c index 82894f5..4150aa0 100644 --- a/src/tcgbios.c +++ b/src/tcgbios.c @@ -274,7 +274,7 @@ tpm20_write_EfiSpecIdEventStruct(void) .hdr.platformClass = TPM_TCPA_ACPI_CLASS_CLIENT, .hdr.specVersionMinor = 0, .hdr.specVersionMajor = 2, - .hdr.specErrata = 0, + .hdr.specErrata = 2, .hdr.uintnSize = 2, }; @@ -1016,7 +1016,8 @@ tpm_add_event_separators(void) u32 pcrIndex; for (pcrIndex = 0; pcrIndex <= 7; pcrIndex++) tpm_add_measurement_to_log(pcrIndex, EV_SEPARATOR, - NULL, 0, + (const char *)evt_separator, + sizeof(evt_separator), evt_separator, sizeof(evt_separator)); } -- 2.31.1

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[PATCH 0/2] tcgbios: Use the proper hashes for the TPM 2 PCR banks
by Stefan Berger 30 Jun '21

30 Jun '21

This PR adds the implementations for sha{256, 384, 512} and makes use of the hash implementation when extending the PCRs of the respective banks rather than always using the sha1 and zero-padding it for the PCR banks of a TPM 2. Regards, Stefan Stefan Berger (2): Add implementations for sha256, sha384, and sha512 tcgbios: Use The proper sha function for each PCR bank Makefile | 2 +- src/sha.h | 11 +++ src/sha1.c | 8 +- src/sha1.h | 8 -- src/sha256.c | 211 +++++++++++++++++++++++++++++++++++++++++++ src/sha512.c | 244 ++++++++++++++++++++++++++++++++++++++++++++++++++ src/tcgbios.c | 60 +++++++++---- src/x86.h | 7 ++ 8 files changed, 522 insertions(+), 29 deletions(-) create mode 100644 src/sha.h delete mode 100644 src/sha1.h create mode 100644 src/sha256.c create mode 100644 src/sha512.c -- 2.31.1

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Re: INT 14H
by Paul Edwards 28 Jun '21

28 Jun '21

Hi Peter. Thanks for your reply. > Sure. Implement a driver for that redirection which behaves as an > int14h handler and place the address of its entry point at address > 0000:0080. (14h*4) > The method works with any BIOS. I would like it to work with any OS that uses INT 14H (regardless of how many of those exist), rather than any BIOS. For now I am happy if it only works with SeaBIOS, and I will simply buy a PC that allows me to flash SeaBIOS onto it. Other manufacturers can do other things with INT 14H, redirecting it to some other device, such as HAM radio. > If suitable for your hardware you could do all of it in an option ROM. I'm not familiar with this terminology. Is this something that goes into SeaBIOS? I'm expecting it to be something that is set up (and even configured by the end user in the BIOS) before my OS is even loaded. Thanks. Paul.

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