SeaBIOS

seabios@seabios.org

2 participants
3799 discussions

[PATCH] memory: reserve more space for ZoneHigh
by Gerd Hoffmann 22 Apr '22

22 Apr '22

Bump BUILD_MAX_HIGHTABLE from 256k to 1M to avoid running out of memory with very large smbios tables. Signed-off-by: Gerd Hoffmann <kraxel(a)redhat.com> --- src/config.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/config.h b/src/config.h index 93c8dbc2d530..f4b19898a1f0 100644 --- a/src/config.h +++ b/src/config.h @@ -17,7 +17,7 @@ // Maximum number of map entries in the e820 map #define BUILD_MAX_E820 32 // Space to reserve in high-memory for tables -#define BUILD_MAX_HIGHTABLE (256*1024) +#define BUILD_MAX_HIGHTABLE (1024*1024) // Largest supported externaly facing drive id #define BUILD_MAX_EXTDRIVE 16 // Number of bytes the smbios may be and still live in the f-segment -- 2.35.1

2 1

[PATCH] MP: fix mptable interrupt source generation for pci devices
by Jay Khandkar 22 Apr '22

22 Apr '22

Set the correct IOAPIC INTIN pin number for pci bus interrupt sources during MP spec table generation (on emulators). Currently, the pin number is set to the interrupt line field in the device's configuration space, which is set to either IRQ 10 or 11 as the boot rom driver expects. This works since qemu maps all ISA compatible PIC IRQs onto IOAPIC pins 0-15, including PIRQs. But it will break if, for some reason, the IRQ is routed to something other than the INTLINE value using, for eg. ACPI _CRS. This patch ensures the pin number is set to the correct value (16-23) that the INTx pin is routed to in APIC mode, in agreement with the ACPI _PRT provided routing. Tested on a Linux 5.17.2 guest on qemu with the pci=nomsi and acpi=noirq boot parameters to force MP table parsing for interrupt sources. Signed-off-by: Jay Khandkar <jaykhandkar2002(a)gmail.com> --- src/fw/mptable.c | 30 ++++++++++++++++++++++++++++-- 1 file changed, 28 insertions(+), 2 deletions(-) diff --git a/src/fw/mptable.c b/src/fw/mptable.c index 47385cc..3a7b02f 100644 --- a/src/fw/mptable.c +++ b/src/fw/mptable.c @@ -18,6 +18,33 @@ #include "util.h" // MaxCountCPUs #include "x86.h" // cpuid +/* table to obtain IOAPIC INTIN pin # for a certain pci slot and pin */ + +/* daisy chaining in line with acpi _PRT */ +#define SLOT_GSIE {0x14, 0x15, 0x16, 0x17} +#define SLOT_GSIF {0x15, 0x16, 0x17, 0x14} +#define SLOT_GSIG {0x16, 0x17, 0x14, 0x15} +#define SLOT_GSIH {0x17, 0x14, 0x15, 0x16} +#define SLOT_GSIA {0x10, 0x11, 0x12, 0x13} + +u8 pirq_intin[32][4] = { SLOT_GSIE, SLOT_GSIF, SLOT_GSIG, SLOT_GSIH, + SLOT_GSIE, SLOT_GSIF, SLOT_GSIG, SLOT_GSIH, + SLOT_GSIE, SLOT_GSIF, SLOT_GSIG, SLOT_GSIH, + SLOT_GSIE, SLOT_GSIF, SLOT_GSIG, SLOT_GSIH, + SLOT_GSIE, SLOT_GSIF, SLOT_GSIG, SLOT_GSIH, + SLOT_GSIE, SLOT_GSIF, SLOT_GSIG, SLOT_GSIH, + SLOT_GSIE, + + /* INTA -> PIRQA for slot 25 - 31, but 30 + see the default value of D<N>IR */ + SLOT_GSIA, SLOT_GSIA, SLOT_GSIA, SLOT_GSIA, + SLOT_GSIA, + + /* PCIe->PCI bridge. use PIRQ[E-H] */ + SLOT_GSIE, + + SLOT_GSIA }; + void mptable_setup(void) { @@ -114,7 +141,6 @@ mptable_setup(void) if (pci_bdf_to_bus(bdf) != 0) break; int pin = pci_config_readb(bdf, PCI_INTERRUPT_PIN); - int irq = pci_config_readb(bdf, PCI_INTERRUPT_LINE); if (pin == 0) continue; if (dev != pci_bdf_to_busdev(bdf)) { @@ -131,7 +157,7 @@ mptable_setup(void) intsrc->srcbus = pci_bdf_to_bus(bdf); /* PCI bus */ intsrc->srcbusirq = (pci_bdf_to_dev(bdf) << 2) | (pin - 1); intsrc->dstapic = ioapic_id; - intsrc->dstirq = irq; + intsrc->dstirq = pirq_intin[pci_bdf_to_dev(bdf)][pin - 1]; intsrc++; } -- 2.35.2

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[PATCH] qemu: disable builtin acpi and smbios tables by default.
by Gerd Hoffmann 22 Apr '22

22 Apr '22

qemu provides acpi and smbios tables via fw_cfg for many years now. The builtin tables shipped by seabios are only used as fallback for old qemu versions. qemu is about to drop backward compatibility for old versions, machine types for versions 1.4 to 1.7 are deprecated, which turns the fallbacks into dead code. This patch flips the default for the config options controlling the fallback smbios and acpi tables from 'Yes' to 'No'. Eventually the code will be removed altogether at some point in the future. Signed-off-by: Gerd Hoffmann <kraxel(a)redhat.com> --- src/Kconfig | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index 3a8ffa15fded..83ddf45143c3 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -494,25 +494,25 @@ menu "BIOS Tables" Support generation of MPTable. config SMBIOS bool "SMBIOS" - default y + default n help Support generation of SM BIOS tables. This is also sometimes called DMI. config ACPI bool "ACPI" - default y + default n help Support generation of ACPI tables. config ACPI_DSDT bool "Include default ACPI DSDT" - default y + default n depends on ACPI help Include default DSDT ACPI table in BIOS. Required for QEMU 1.3 and older. This option can be disabled for QEMU 1.4 and newer to save some space in the ROM file. - If unsure, say Y. + If unsure, say N. config FW_ROMFILE_LOAD bool "Load BIOS tables from ROM files" depends on QEMU_HARDWARE -- 2.35.1

2 1

[PATCH 0/2] improve ZoneHigh memory management
by Gerd Hoffmann 22 Apr '22

22 Apr '22

When running out of memory get a chunk of memory from ZoneTmpHigh to expand ZoneHigh. Drop simliar logic fro pmm code because it's not needed ay more. This fixes some scalability problems, for example with lots of vcpus, where seabios runs out of memory due to large smbios/acpi tables. Gerd Hoffmann (2): malloc: add on demand ZoneHigh expansion support Revert "pmm: use tmp zone on oom" src/malloc.c | 16 ++++++++++++++++ src/pmm.c | 13 ------------- 2 files changed, 16 insertions(+), 13 deletions(-) -- 2.35.1

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[PATCH] fw/coreboot.c: Use coreboot table to find cbfs
by Arthur Heymans 21 Apr '22

21 Apr '22

The "cbfs master header" cbfs file is considered a legacy feature in coreboot and is planned for removal in the master branch. Since 2015 the coreboot tables have exported info about the active cbfs. This change uses the cbfs information in the coreboot tables instead of following the cbfs master header pointer in the bootblock to find cbfs. This change makes it possible to access CBFS fmap regions that don't feature a "cbfs master header", which is the case with Googles VBOOT solution. This breaks compatibility with very old coreboot build (build before fb5d5b16 "2015-07-14, cbtable: describe boot media"). Keeping backward compatibility with the "cbfs master header" would complicate the code. Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> diff --git a/src/Kconfig b/src/Kconfig index 3a8ffa1..51ba827 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -93,15 +93,6 @@ endchoice help Support CBFS files compressed using the lzma decompression algorithm. - config CBFS_LOCATION - depends on COREBOOT_FLASH - hex "CBFS memory end location" - default 0 - help - Memory address of where the CBFS data ends. This should - be zero for normal builds. It may be a non-zero value if - the CBFS filesystem is at a non-standard location (eg, - 0xffe00000 if CBFS ends 2Meg below the end of flash). config MULTIBOOT depends on COREBOOT diff --git a/src/fw/coreboot.c b/src/fw/coreboot.c index 7c0954b..8a35c1d 100644 --- a/src/fw/coreboot.c +++ b/src/fw/coreboot.c @@ -88,6 +88,18 @@ struct cbmem_console { #define CBMC_OVERFLOW (1 << 31) static struct cbmem_console *cbcon = NULL; +#define CB_TAG_BOOT_MEDIA_PARAMS 0x30 + +struct cb_boot_media_params { + u32 tag; + u32 size; + /* offsets are relative to start of boot media */ + u64 fmap_offset; + u64 cbfs_offset; + u64 cbfs_size; + u64 boot_media_size; +}; + static u16 ipchksum(char *buf, int count) { @@ -146,7 +158,12 @@ find_cb_subtable(struct cb_header *cbh, u32 tag) struct cb_header * find_cb_table(void) { - struct cb_header *cbh = find_cb_header(0, 0x1000); + static struct cb_header *cbh; + + if (cbh) + return cbh; + + cbh= find_cb_header(0, 0x1000); if (!cbh) return NULL; struct cb_forward *cbf = find_cb_subtable(cbh, CB_TAG_FORWARD); @@ -317,20 +334,8 @@ ulzma(u8 *dst, u32 maxlen, const u8 *src, u32 srclen) * Coreboot flash format ****************************************************************/ -#define CBFS_HEADER_MAGIC 0x4F524243 -#define CBFS_VERSION1 0x31313131 - -struct cbfs_header { - u32 magic; - u32 version; - u32 romsize; - u32 bootblocksize; - u32 align; - u32 offset; - u32 pad[2]; -} PACKED; - #define CBFS_FILE_MAGIC 0x455649484352414cLL // LARCHIVE +#define CBFS_ALIGNMENT 64 struct cbfs_file { u64 magic; @@ -429,30 +434,50 @@ coreboot_cbfs_init(void) if (!CONFIG_COREBOOT_FLASH) return; - struct cbfs_header *hdr = *(void **)(CONFIG_CBFS_LOCATION - 4); - if ((u32)hdr & 0x03) { - dprintf(1, "Invalid CBFS pointer %p\n", hdr); + dprintf(3, "Attempting to initialize coreboot cbfs\n"); + + struct cb_header *cbh = find_cb_table(); + if (!cbh) { + dprintf(1, "cbfs_init: unable to find cb table\n"); return; } - if (CONFIG_CBFS_LOCATION && (u32)hdr > CONFIG_CBFS_LOCATION) - // Looks like the pointer is relative to CONFIG_CBFS_LOCATION - hdr = (void*)hdr + CONFIG_CBFS_LOCATION; - if (hdr->magic != cpu_to_be32(CBFS_HEADER_MAGIC)) { - dprintf(1, "Unable to find CBFS (ptr=%p; got %x not %x)\n" - , hdr, hdr->magic, cpu_to_be32(CBFS_HEADER_MAGIC)); + + struct cb_boot_media_params *cbbmp = + find_cb_subtable(cbh, CB_TAG_BOOT_MEDIA_PARAMS); + + if (!cbbmp) { + dprintf(1, "cbfs_init: unable to find boot media params\n"); return; } - dprintf(1, "Found CBFS header at %p\n", hdr); - u32 romsize = be32_to_cpu(hdr->romsize); - u32 romstart = CONFIG_CBFS_LOCATION - romsize; - struct cbfs_file *fhdr = (void*)romstart + be32_to_cpu(hdr->offset); + const u32 romsize = cbbmp->boot_media_size; + const u32 cbfs_start = cbbmp->cbfs_offset - romsize; + const u32 cbfs_end = cbfs_start + cbbmp->cbfs_size - 1; + + dprintf(3, "cbfs_init: cbfs_start=0x%08x, cbfs_end=0x%08x\n", cbfs_start, + cbfs_end); + + u32 offset = cbfs_start; + for (;;) { - if ((u32)fhdr - romstart > romsize) - break; - u64 magic = fhdr->magic; - if (magic != CBFS_FILE_MAGIC) + if (offset > cbfs_end || offset < cbfs_start) break; + + struct cbfs_file *fhdr = (void*)offset; + + if (fhdr->magic != CBFS_FILE_MAGIC) { + offset++; + offset = ALIGN(offset, CBFS_ALIGNMENT); + continue; + } + + /* Skip empty space */ + if (strcmp(fhdr->filename, "") == 0) { + offset += ALIGN(be32_to_cpu(fhdr->offset) + be32_to_cpu(fhdr->len) + , CBFS_ALIGNMENT); + continue; + } + struct cbfs_romfile_s *cfile = malloc_tmp(sizeof(*cfile)); if (!cfile) { warn_noalloc(); @@ -473,8 +498,8 @@ coreboot_cbfs_init(void) } romfile_add(&cfile->file); - fhdr = (void*)ALIGN((u32)cfile->data + cfile->rawsize - , be32_to_cpu(hdr->align)); + offset = ALIGN((u32)cfile->data + cfile->rawsize + , CBFS_ALIGNMENT); } process_links_file(); -- 2.30.2

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CDROM/DVD timeouts on real hardware
by Petr Cvek 21 Apr '22

21 Apr '22

Hi, Has anybody tried to boot from CDROM/DVD non-QEMU seabios lately? I've tried to boot a few CDs/DVDs on AHCI and IDE drives and although the drive is detected, it will fail to boot. There is a timeout after which the next drive will boot. It seems the timeout is located somewhere in payloads/external/SeaBIOS/seabios/src/cdrom.c in function cdrom_boot(). When I tried to comment out this test: int ret = scsi_is_ready(&dop); if (ret) dprintf(5, "scsi_is_ready returned %d\n", ret); I was able to boot windows 98SE installation CD, but it failed after a few sectors (probably when the readiness was needed to be tested :D). If somebody can confirm it is not just my board setup (kontron 986lcd-m with the current coreboot branch) I would be grateful. regards, Petr

1 0

Floppy setup
by Petr Cvek 21 Apr '22

21 Apr '22

Hello, I was playing with coreboot + floppy and it seems the drive type can be read from CMOS only if the machine is QEMU. payloads/external/SeaBIOS/seabios/src/hw/floppy.c floppy_setup(void) { ... if (CONFIG_QEMU) { u8 type = rtc_read(CMOS_FLOPPY_DRIVE_TYPE); if (type & 0xf0) addFloppy(0, type >> 4); ... } else { u8 type = romfile_loadint("etc/floppy0", 0); ... Is it possible enable this function for a real coreboot target? What way is the most acceptable way to do it (something like || CONFIG_USE_CMOS)? I've forced it with "always true" condition and after adding configurations to cmos table and superio in coreboot, I was able to boot msdos on kontron 986lcd-m board. Regards, Petr

1 0

[PATCH v3 0/2] Fix reset issue with QEMU -machine q35
by Volker Rümelin 04 Apr '22

04 Apr '22

This reset issue was reported on the QEMU issue tracker at https://gitlab.com/qemu-project/qemu/-/issues/766 A reset with QEMU -machine q35 -accel tcg leads to a reset loop and with -machine q35 -accel kvm the reset only works because KVM ignores the read-only semantics of the C-F segments. Details about the issue are in "reset: force standard PCI configuration access". v2: The commit message of patch "reset: force standard PCI config- uration access" now uses the correct PCI configuration register name PCIEXBAR. v3: Removes the unnecessary pci_disable_mmconfig() function calls and the function itself. [Kevin] Volker Rümelin (2): pci: refactor the pci_config_*() functions reset: force standard PCI configuration access src/fw/shadow.c | 14 ++++----- src/hw/pci.c | 81 +++++++++++++++++++++++++++++++++++++++++-------- src/hw/pci.h | 18 ++++++++++- 3 files changed, 93 insertions(+), 20 deletions(-) -- 2.34.1

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Bootsplash.jpg encoding question.
by AreYouLoco? 31 Mar '22

31 Mar '22

Hi, I am trying to make SeaBIOS on Thinkpad T420 running coreboot display bootsplash but I am failing to prepare the file. I tried to export file using GIMP and this info: https://puri.sm/wp-content/uploads/2017/02/coreboot-splash-gimp-export-opti… Relevant part of the coreboot log is: 1508[INFO ] Setting up bootsplash in 1366x768@32 1509[INFO ] CBFS: Found 'bootsplash.jpg' @0x46480 size 0x48e5 in mcache @0x7ffdd1c8 1510[DEBUG] Bootsplash image resolution: 1366x768 1511[ERROR] Bootsplash could not be decoded. jpeg_decode returned 4. I also tried to add bootsplash.bmp but then it says it didnt found bootsplash.jpg. Any hints? AreYouLoco?

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[PATCH v2 0/2] Fix reset issue with QEMU -machine q35
by Volker Rümelin 31 Mar '22

31 Mar '22

This reset issue was reported on the QEMU issue tracker at https://gitlab.com/qemu-project/qemu/-/issues/766 A reset with QEMU -machine q35 -accel tcg leads to a reset loop and with -machine q35 -accel kvm the reset only works because KVM ignores the read-only semantics of the C-F segments. Details about the issue are in "reset: force standard PCI configuration access". v2: The commit message of patch "reset: force standard PCI config- uration access" now uses the correct PCI configuration register name PCIEXBAR. Volker Rümelin (2): pci: refactor the pci_config_*() functions reset: force standard PCI configuration access src/fw/shadow.c | 16 +++++---- src/hw/pci.c | 86 ++++++++++++++++++++++++++++++++++++++++++------- src/hw/pci.h | 19 ++++++++++- 3 files changed, 101 insertions(+), 20 deletions(-) -- 2.34.1

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