July 2012 - SeaBIOS - mail.coreboot.org

Re: [SeaBIOS] [Qemu-devel] [QEMU RFC PATCH 6/7] i386: topology & APIC ID utility functions
by Eduardo Habkost July 23, 2012

July 23, 2012

On Sat, Jul 14, 2012 at 09:14:30AM +0000, Blue Swirl wrote: [...] > >> > diff --git a/tests/Makefile b/tests/Makefile > >> > index b605e14..89bd890 100644 > >> > --- a/tests/Makefile > >> > +++ b/tests/Makefile > >> > @@ -15,6 +15,7 @@ check-unit-y += tests/test-string-output-visitor$(EXESUF) > >> > check-unit-y += tests/test-coroutine$(EXESUF) > >> > check-unit-y += tests/test-visitor-serialization$(EXESUF) > >> > check-unit-y += tests/test-iov$(EXESUF) > >> > +check-unit-y += tests/test-x86-cpuid$(EXESUF) > >> > >> This probably tries to build the cpuid test also for non-x86 targets > >> and break them all. > > > > I don't think there's any concept of "targets" for the check-unit tests. > > How about: > check-qtest-i386-y = tests/test-x86-cpuid$(EXESUF) test-x86-cpuid is not a qtest test case. > > > I had to do the following, to be able to make a test that uses the > > target-i386 code: > > > >> > +tests/test-x86-cpuid.o: QEMU_INCLUDES += -Itarget-i386 > > > > Any suggestions to avoid this hack would be welcome. > > Maybe it would be simpler to adjust #include path in the file. Using the full path on the #include line would break in case target-i386/topology.h include other files from the target-i386 directory. -- Eduardo

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[RFC seabios PATCH] enumerate APIC IDs directly from CPUs
by Eduardo Habkost July 23, 2012

July 23, 2012

This patch is an attempt to fix the non-continguous-APIC-ID problem without the FW_CFG_LAPIC_INFO approach I have sent proposed last week. Basically, this changes Seabios to probe for APIC IDs directly from the CPUs on boot, instead of getting it using fw_cfg, store the found APIC IDs on a bitmap, and use that information whe building the MADT, SRAT, and SSDT ACPI tables. To do this properly, we have to decide the meaning of "CPU IDs" in the QEMU<->Seabios interfaces, too. I see two possible approaches: 1) Have Seabios and QEMU agree on a a "CPU identifier", that is independent from the APIC ID. 2) Always use the Initial APIC ID on all communication between QEMU and Seabios. This patch implements the second approach. That means: - QEMU won't know anything about the ACPI Processor IDs chosen by Seabios; - The NUMA CPU affinity table in QEMU_CFG_NUMA is APIC-ID-based, not Processor-ID-based; - The CPU hotplug bitmaps on I/O port 0xaf00 will be APIC-ID-based, too. Internally, the following changes were made on the ACPI code: - The CPON array is now APIC-ID-based - The NTFY method now gets the CPU APIC ID as parameter - The CPMA method now gets two parameters: the Processor ID and the APIC ID - The CPST method now gets the CPU APIC ID as parameter To try to make things less likely to break on the common, non-hotplug case, this patch makes the Processor IDs be chosen this way: - The CPUs present on boot get contiguous Processor IDs (even if the APIC IDs are not contiguous); - The remaining Processor declarations are going to associated to the remaining APIC IDs (immediately after the last present APIC ID), sequentially. This means that hotplugged CPUs may not get contiguous Processor declarations if their APIC IDs are not contiguous. I would like to know what others think about this approach. I think it is a much simpler approach than relying on some APIC ID <=> CPU ID translation to make Seabios and QEMU agree. This way, Seabios has absolute freedom to choose the ACPI Processor IDs. Signed-off-by: Eduardo Habkost <ehabkost(a)redhat.com> --- src/acpi-dsdt.dsl | 11 ++++-- src/acpi.c | 109 ++++++++++++++++++++++++++++++++++++++++++++--------- src/smp.c | 17 +++++++++ src/ssdt-proc.dsl | 12 ++++-- src/util.h | 3 ++ 5 files changed, 127 insertions(+), 25 deletions(-) diff --git a/src/acpi-dsdt.dsl b/src/acpi-dsdt.dsl index 2060686..51ca037 100644 --- a/src/acpi-dsdt.dsl +++ b/src/acpi-dsdt.dsl @@ -674,20 +674,23 @@ DefinitionBlock ( External(CPON, PkgObj) /* Methods called by run-time generated SSDT Processor objects */ - Method (CPMA, 1, NotSerialized) { + Method (CPMA, 2, NotSerialized) { // _MAT method - create an madt apic buffer + // Arg0 = Processor ID + // Arg1 = Local APIC ID // Local0 = CPON flag for this cpu - Store(DerefOf(Index(CPON, Arg0)), Local0) + Store(DerefOf(Index(CPON, Arg1)), Local0) // Local1 = Buffer (in madt apic form) to return Store(Buffer(8) {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0}, Local1) // Update the processor id, lapic id, and enable/disable status Store(Arg0, Index(Local1, 2)) - Store(Arg0, Index(Local1, 3)) + Store(Arg1, Index(Local1, 3)) Store(Local0, Index(Local1, 4)) Return (Local1) } Method (CPST, 1, NotSerialized) { // _STA method - return ON status of cpu + // Arg0 = Local APIC ID // Local0 = CPON flag for this cpu Store(DerefOf(Index(CPON, Arg0)), Local0) If (Local0) { Return(0xF) } Else { Return(0x0) } @@ -708,7 +711,7 @@ DefinitionBlock ( Store (PRS, Local5) // Local2 = last read byte from bitmap Store (Zero, Local2) - // Local0 = cpuid iterator + // Local0 = APIC ID iterator Store (Zero, Local0) While (LLess(Local0, SizeOf(CPON))) { // Local1 = CPON flag for this cpu diff --git a/src/acpi.c b/src/acpi.c index 55e4607..149ff42 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -302,6 +302,63 @@ build_fadt(struct pci_device *pci) return fadt; } + +/* APIC IDs of each Processor indexed by ACPI Processor ID. + * Used to make the MADT entries and SSDT Processor declarations + * match each other. + */ +static u8 *processor_apic_ids; + +/* Number of Processor IDs that have a valid 8-bit APIC ID */ +static int count_valid_apic_ids; + +/* Build a ACPI Processor ID -> Local APIC ID table, used for the MADT + * and SSDT Processor declarations. + * The CPUs present at boot will be assigned to the first entries. + * The remaining entries will get sequential APIC IDs. + */ +static void +check_apic_ids(void) +{ + processor_apic_ids = malloc_high(MaxCountCPUs); + if (!processor_apic_ids) { + warn_noalloc(); + count_valid_apic_ids = 0; + return; + } + + int i; + int apic_id = 0; + int last_present_apic_id = 0; + + // the first entries are for the already-present CPUs: + for (i = 0; i < MaxCountCPUs; i++) { + // look for next present APIC ID: + while (apic_id <= MAX_APIC_ID && !apic_id_is_present(apic_id)) + apic_id++; + + if (apic_id > MAX_APIC_ID) + break; // no more valid APIC IDs + + processor_apic_ids[i] = apic_id; + last_present_apic_id = apic_id; + apic_id++; + } + + // the remaining entries will get sequential APIC IDs assigned, up to + // MAX_APIC_ID + apic_id = last_present_apic_id; + for ( ; i < MaxCountCPUs; i++) { + apic_id++; + if (apic_id > MAX_APIC_ID) + break; + + processor_apic_ids[i] = apic_id; + } + + count_valid_apic_ids = i; +} + static void* build_madt(void) { @@ -321,15 +378,16 @@ build_madt(void) madt->flags = cpu_to_le32(1); struct madt_processor_apic *apic = (void*)&madt[1]; int i; - for (i=0; i<MaxCountCPUs; i++) { + for (i = 0; i < count_valid_apic_ids; i++) { apic->type = APIC_PROCESSOR; apic->length = sizeof(*apic); apic->processor_id = i; - apic->local_apic_id = i; - if (i < CountCPUs) + apic->local_apic_id = processor_apic_ids[i]; + if (apic_id_is_present(apic->local_apic_id)) { apic->flags = cpu_to_le32(1); - else + } else { apic->flags = cpu_to_le32(0); + } apic++; } struct madt_io_apic *io_apic = (void*)apic; @@ -402,6 +460,7 @@ encodeLen(u8 *ssdt_ptr, int length, int bytes) #define SD_OFFSET_CPUHEX (*ssdt_proc_name - *ssdt_proc_start + 2) #define SD_OFFSET_CPUID1 (*ssdt_proc_name - *ssdt_proc_start + 4) #define SD_OFFSET_CPUID2 (*ssdt_proc_id - *ssdt_proc_start) +#define SD_OFFSET_APICID (*ssdt_proc_apic_id - *ssdt_proc_start) #define SD_SIZEOF (*ssdt_proc_end - *ssdt_proc_start) #define SD_PROC (ssdp_proc_aml + *ssdt_proc_start) @@ -410,12 +469,13 @@ encodeLen(u8 *ssdt_ptr, int length, int bytes) static void* build_ssdt(void) { - int acpi_cpus = MaxCountCPUs > 0xff ? 0xff : MaxCountCPUs; + int acpi_cpus = count_valid_apic_ids; + int cpon_size = count_valid_apic_ids ? processor_apic_ids[count_valid_apic_ids - 1] + 1 : 0; // length = ScopeOp + procs + NTYF method + CPON package int length = ((1+3+4) + (acpi_cpus * SD_SIZEOF) + (1+2+5+(12*acpi_cpus)) - + (6+2+1+(1*acpi_cpus)) + + (6+2+1+(1*cpon_size)) + 17); u8 *ssdt = malloc_high(sizeof(struct acpi_table_header) + length); if (! ssdt) { @@ -440,10 +500,12 @@ build_ssdt(void) ssdt_ptr[SD_OFFSET_CPUHEX+1] = getHex(i); ssdt_ptr[SD_OFFSET_CPUID1] = i; ssdt_ptr[SD_OFFSET_CPUID2] = i; + ssdt_ptr[SD_OFFSET_APICID] = processor_apic_ids[i]; ssdt_ptr += SD_SIZEOF; } // build "Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)} ...}" + // Arg0 = APIC ID *(ssdt_ptr++) = 0x14; // MethodOp ssdt_ptr = encodeLen(ssdt_ptr, 2+5+(12*acpi_cpus), 2); *(ssdt_ptr++) = 'N'; @@ -457,7 +519,7 @@ build_ssdt(void) *(ssdt_ptr++) = 0x93; // LEqualOp *(ssdt_ptr++) = 0x68; // Arg0Op *(ssdt_ptr++) = 0x0A; // BytePrefix - *(ssdt_ptr++) = i; + *(ssdt_ptr++) = processor_apic_ids[i]; *(ssdt_ptr++) = 0x86; // NotifyOp *(ssdt_ptr++) = 'C'; *(ssdt_ptr++) = 'P'; @@ -467,6 +529,7 @@ build_ssdt(void) } // build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })" + // CPON array is APIC-ID based, not Processor ID based *(ssdt_ptr++) = 0x08; // NameOp *(ssdt_ptr++) = 'C'; *(ssdt_ptr++) = 'P'; @@ -474,9 +537,9 @@ build_ssdt(void) *(ssdt_ptr++) = 'N'; *(ssdt_ptr++) = 0x12; // PackageOp ssdt_ptr = encodeLen(ssdt_ptr, 2+1+(1*acpi_cpus), 2); - *(ssdt_ptr++) = acpi_cpus; - for (i=0; i<acpi_cpus; i++) - *(ssdt_ptr++) = (i < CountCPUs) ? 0x01 : 0x00; + *(ssdt_ptr++) = cpon_size; + for (i=0; i<cpon_size; i++) + *(ssdt_ptr++) = (apic_id_is_present(i)) ? 0x01 : 0x00; // store pci io windows: start, end, length // this way we don't have to do the math in the dsdt @@ -644,30 +707,40 @@ build_srat(void) memset(srat, 0, srat_size); srat->reserved1=1; struct srat_processor_affinity *core = (void*)(srat + 1); - int i; + int apic_id; u64 curnode; + u64 *cpudata = numadata; - for (i = 0; i < MaxCountCPUs; ++i) { + /* Note that the fw_cfg NUMA CPU affinity data is APIC-ID-based, not + * Processor ID based, but the size of the tablesble is based on MaxCountCPUs + */ + for (apic_id = 0; apic_id < MaxCountCPUs; ++apic_id) { + if (apic_id > MAX_APIC_ID) + break; + curnode = *cpudata++; core->type = SRAT_PROCESSOR; core->length = sizeof(*core); - core->local_apic_id = i; - curnode = *numadata++; core->proximity_lo = curnode; memset(core->proximity_hi, 0, 3); core->local_sapic_eid = 0; - if (i < CountCPUs) + core->local_apic_id = apic_id; + if (apic_id_is_present(apic_id)) { core->flags = cpu_to_le32(1); - else - core->flags = 0; + } else { + core->flags = cpu_to_le32(0); + } core++; } + numadata += MaxCountCPUs; + /* the memory map is a bit tricky, it contains at least one hole * from 640k-1M and possibly another one from 3.5G-4G. */ struct srat_memory_affinity *numamem = (void*)core; int slots = 0; + int i; u64 mem_len, mem_base, next_base = 0; acpi_build_srat_memory(numamem, 0, 640*1024, 0, 1); @@ -742,6 +815,8 @@ acpi_bios_init(void) tbl_idx++; \ } while(0) + check_apic_ids(); + struct fadt_descriptor_rev1 *fadt = build_fadt(pci); ACPI_INIT_TABLE(fadt); ACPI_INIT_TABLE(build_ssdt()); diff --git a/src/smp.c b/src/smp.c index 8c077a1..af92e4a 100644 --- a/src/smp.c +++ b/src/smp.c @@ -36,6 +36,8 @@ wrmsr_smp(u32 index, u64 val) u32 CountCPUs VAR16VISIBLE; u32 MaxCountCPUs VAR16VISIBLE; +// 256 bits for the found APIC IDs +u32 FoundAPICIDs[256/32] VAR16VISIBLE; extern void smp_ap_boot_code(void); ASM16( " .global smp_ap_boot_code\n" @@ -59,6 +61,12 @@ ASM16( " jmp 1b\n" "2:\n" + // get apic ID on EBX, set bit on FoundAPICIDs + " mov $1, %eax\n" + " cpuid\n" + " shrl $24, %ebx\n" + " lock bts %ebx, FoundAPICIDs\n" + // Increment the cpu counter " lock incl CountCPUs\n" @@ -67,6 +75,11 @@ ASM16( " jmp 1b\n" ); +int apic_id_is_present(u8 apic_id) +{ + return FoundAPICIDs[apic_id/32] & (1 << (apic_id % 32)); +} + // find and initialize the CPUs by launching a SIPI to them void smp_probe(void) @@ -82,6 +95,10 @@ smp_probe(void) return; } + // mark the BSP initial APIC ID as found, too: + u8 apic_id = ebx>>24; + FoundAPICIDs[apic_id/32] |= (1 << (apic_id % 32)); + // Init the counter. writel(&CountCPUs, 1); diff --git a/src/ssdt-proc.dsl b/src/ssdt-proc.dsl index 0339422..7e7e855 100644 --- a/src/ssdt-proc.dsl +++ b/src/ssdt-proc.dsl @@ -5,13 +5,15 @@ * be placed in the \_SB_ namespace. * * In addition to the aml code generated from this file, the - * src/acpi.c file creates a NTFY method with an entry for each cpu: + * src/acpi.c file creates a NTFY method with an entry for each cpu, + * that checks for the APIC ID: * Method(NTFY, 2) { * If (LEqual(Arg0, 0x00)) { Notify(CP00, Arg1) } * If (LEqual(Arg0, 0x01)) { Notify(CP01, Arg1) } * ... * } - * and a CPON array with the list of active and inactive cpus: + * and a CPON array with the list of active and inactive cpus, + * indexed by the APIC ID: * Name(CPON, Package() { One, One, ..., Zero, Zero, ... }) */ @@ -25,6 +27,8 @@ DefinitionBlock ("ssdt-proc.aml", "SSDT", 0x01, "BXPC", "BXSSDT", 0x1) Processor (CPAA, 0xAA, 0x0000b010, 0x06) { ACPI_EXTRACT_NAME_BYTE_CONST ssdt_proc_id Name (ID, 0xAA) + ACPI_EXTRACT_NAME_BYTE_CONST ssdt_proc_apic_id + Name (APIC, 0xAA) /* * The src/acpi.c code requires the above ACP_EXTRACT tags so that it can update * CPAA and 0xAA with the appropriate CPU id (see @@ -36,10 +40,10 @@ DefinitionBlock ("ssdt-proc.aml", "SSDT", 0x01, "BXPC", "BXSSDT", 0x1) External(CPST, MethodObj) External(CPEJ, MethodObj) Method(_MAT, 0) { - Return(CPMA(ID)) + Return(CPMA(ID, APIC)) } Method (_STA, 0) { - Return(CPST(ID)) + Return(CPST(APIC)) } Method (_EJ0, 1, NotSerialized) { CPEJ(ID, Arg0) diff --git a/src/util.h b/src/util.h index ef8ec7c..a68f56b 100644 --- a/src/util.h +++ b/src/util.h @@ -351,10 +351,13 @@ void pci_setup(void); void smm_init(void); // smp.c +#define MAX_APIC_ID 0xFE + extern u32 CountCPUs; extern u32 MaxCountCPUs; void wrmsr_smp(u32 index, u64 val); void smp_probe(void); +int apic_id_is_present(u8 apic_id); // coreboot.c extern const char *CBvendor, *CBpart; -- 1.7.10.4

2 4

[PATCH] Increase debug level of Xen detection code.
by Kevin O'Connor July 22, 2012

July 22, 2012

Now that Xen is enabled by default the detection code will frequently not find a valid Xen hypervisor signature, so don't spam the debug logs. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/xen.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/xen.c b/src/xen.c index 41aab98..a4669d0 100644 --- a/src/xen.c +++ b/src/xen.c @@ -62,7 +62,7 @@ void xen_probe(void) memcpy(signature + 8, &edx, 4); signature[12] = 0; - dprintf(1, "Found hypervisor signature \"%s\" at %x\n", + dprintf(9, "Found hypervisor signature \"%s\" at %x\n", signature, base); if (strcmp(signature, "XenVMMXenVMM") == 0) { /* Set debug_io_port first, so the following messages work. */ -- 1.7.10.4

2 1

[PATCH] Unify ATAPI command processing.
by Kevin O'Connor July 21, 2012

July 21, 2012

Unify the ATA and AHCI ATAPI command processing into one function in block.c (process_atapi_op). This patch disables the existing handlers for ATA ATAPI isready and reset. However, it's unlikely that support is needed and it does not appear that the implemented support is fully correct. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/ahci.c | 61 +++++++++++++++++--------------------------------------- src/ata.c | 58 +++++++++++++---------------------------------------- src/ata.h | 1 - src/block.c | 19 ++++++++++++++---- src/blockcmd.c | 7 ++----- src/cdrom.c | 2 +- src/disk.c | 6 +++--- src/disk.h | 13 ++++++------ 8 files changed, 60 insertions(+), 107 deletions(-) diff --git a/src/ahci.c b/src/ahci.c index 1d7dbf8..4a8eafb 100644 --- a/src/ahci.c +++ b/src/ahci.c @@ -301,49 +301,23 @@ ahci_disk_readwrite(struct disk_op_s *op, int iswrite) // command demuxer int process_ahci_op(struct disk_op_s *op) { - struct ahci_port_s *port; - u32 atapi; - if (!CONFIG_AHCI) return 0; - - port = container_of(op->drive_g, struct ahci_port_s, drive); - atapi = GET_GLOBAL(port->atapi); - - if (atapi) { - switch (op->command) { - case CMD_READ: - return cdb_read(op); - case CMD_WRITE: - case CMD_FORMAT: - return DISK_RET_EWRITEPROTECT; - case CMD_RESET: - /* FIXME: what should we do here? */ - case CMD_VERIFY: - case CMD_SEEK: - return DISK_RET_SUCCESS; - default: - dprintf(1, "AHCI: unknown cdrom command %d\n", op->command); - op->count = 0; - return DISK_RET_EPARAM; - } - } else { - switch (op->command) { - case CMD_READ: - return ahci_disk_readwrite(op, 0); - case CMD_WRITE: - return ahci_disk_readwrite(op, 1); - case CMD_RESET: - /* FIXME: what should we do here? */ - case CMD_FORMAT: - case CMD_VERIFY: - case CMD_SEEK: - return DISK_RET_SUCCESS; - default: - dprintf(1, "AHCI: unknown disk command %d\n", op->command); - op->count = 0; - return DISK_RET_EPARAM; - } + switch (op->command) { + case CMD_READ: + return ahci_disk_readwrite(op, 0); + case CMD_WRITE: + return ahci_disk_readwrite(op, 1); + case CMD_FORMAT: + case CMD_RESET: + case CMD_ISREADY: + case CMD_VERIFY: + case CMD_SEEK: + return DISK_RET_SUCCESS; + default: + dprintf(1, "AHCI: unknown disk command %d\n", op->command); + op->count = 0; + return DISK_RET_EPARAM; } } @@ -516,12 +490,12 @@ static int ahci_port_init(struct ahci_port_s *port) return -1; } - port->drive.type = DTYPE_AHCI; port->drive.cntl_id = pnr; port->drive.removable = (buffer[0] & 0x80) ? 1 : 0; if (!port->atapi) { // found disk (ata) + port->drive.type = DTYPE_AHCI; port->drive.blksize = DISK_SECTOR_SIZE; port->drive.pchs.cylinders = buffer[1]; port->drive.pchs.heads = buffer[3]; @@ -548,11 +522,12 @@ static int ahci_port_init(struct ahci_port_s *port) port->prio = bootprio_find_ata_device(ctrl->pci_tmp, pnr, 0); } else { // found cdrom (atapi) + port->drive.type = DTYPE_AHCI_ATAPI; port->drive.blksize = CDROM_SECTOR_SIZE; port->drive.sectors = (u64)-1; u8 iscd = ((buffer[0] >> 8) & 0x1f) == 0x05; if (!iscd) { - dprintf(1, "AHCI/%d: atapi device is'nt a cdrom\n", port->pnr); + dprintf(1, "AHCI/%d: atapi device isn't a cdrom\n", port->pnr); return -1; } port->desc = znprintf(MAXDESCSIZE diff --git a/src/ata.c b/src/ata.c index 3246acb..7ff5f86 100644 --- a/src/ata.c +++ b/src/ata.c @@ -141,31 +141,6 @@ isready(struct atadrive_s *adrive_g) return DISK_RET_ENOTREADY; } -// Default 16bit command demuxer for ATA and ATAPI devices. -static int -process_ata_misc_op(struct disk_op_s *op) -{ - if (!CONFIG_ATA) - return 0; - - struct atadrive_s *adrive_g = container_of( - op->drive_g, struct atadrive_s, drive); - switch (op->command) { - case CMD_RESET: - ata_reset(adrive_g); - return DISK_RET_SUCCESS; - case CMD_ISREADY: - return isready(adrive_g); - case CMD_FORMAT: - case CMD_VERIFY: - case CMD_SEEK: - return DISK_RET_SUCCESS; - default: - op->count = 0; - return DISK_RET_EPARAM; - } -} - /**************************************************************** * ATA send command @@ -580,13 +555,25 @@ process_ata_op(struct disk_op_s *op) if (!CONFIG_ATA) return 0; + struct atadrive_s *adrive_g = container_of( + op->drive_g, struct atadrive_s, drive); switch (op->command) { case CMD_READ: return ata_readwrite(op, 0); case CMD_WRITE: return ata_readwrite(op, 1); + case CMD_RESET: + ata_reset(adrive_g); + return DISK_RET_SUCCESS; + case CMD_ISREADY: + return isready(adrive_g); + case CMD_FORMAT: + case CMD_VERIFY: + case CMD_SEEK: + return DISK_RET_SUCCESS; default: - return process_ata_misc_op(op); + op->count = 0; + return DISK_RET_EPARAM; } } @@ -662,23 +649,6 @@ fail: return DISK_RET_SUCCESS; } -// 16bit command demuxer for ATAPI cdroms. -int -process_atapi_op(struct disk_op_s *op) -{ - if (!CONFIG_ATA) - return 0; - switch (op->command) { - case CMD_READ: - return cdb_read(op); - case CMD_FORMAT: - case CMD_WRITE: - return DISK_RET_EWRITEPROTECT; - default: - return process_ata_misc_op(op); - } -} - /**************************************************************** * ATA detect and init @@ -762,7 +732,7 @@ init_drive_atapi(struct atadrive_s *dummy, u16 *buffer) struct atadrive_s *adrive_g = init_atadrive(dummy, buffer); if (!adrive_g) return NULL; - adrive_g->drive.type = DTYPE_ATAPI; + adrive_g->drive.type = DTYPE_ATA_ATAPI; adrive_g->drive.blksize = CDROM_SECTOR_SIZE; adrive_g->drive.sectors = (u64)-1; u8 iscd = ((buffer[0] >> 8) & 0x1f) == 0x05; diff --git a/src/ata.h b/src/ata.h index cfc6108..1f41233 100644 --- a/src/ata.h +++ b/src/ata.h @@ -28,7 +28,6 @@ int cdrom_read(struct disk_op_s *op); int atapi_cmd_data(struct disk_op_s *op, void *cdbcmd, u16 blocksize); void ata_setup(void); int process_ata_op(struct disk_op_s *op); -int process_atapi_op(struct disk_op_s *op); // Global defines -- ATA register and register bits. // command block & control block regs diff --git a/src/block.c b/src/block.c index 2de9c5d..1c200cc 100644 --- a/src/block.c +++ b/src/block.c @@ -280,8 +280,6 @@ map_floppy_drive(struct drive_s *drive_g) static int process_scsi_op(struct disk_op_s *op) { - if (!CONFIG_VIRTIO_SCSI && !CONFIG_USB_MSC && !CONFIG_USB_UAS && !CONFIG_LSI_SCSI) - return 0; switch (op->command) { case CMD_READ: return cdb_read(op); @@ -299,6 +297,18 @@ process_scsi_op(struct disk_op_s *op) } } +static int +process_atapi_op(struct disk_op_s *op) +{ + switch (op->command) { + case CMD_WRITE: + case CMD_FORMAT: + return DISK_RET_EWRITEPROTECT; + default: + return process_scsi_op(op); + } +} + // Execute a disk_op request. int process_op(struct disk_op_s *op) @@ -310,8 +320,6 @@ process_op(struct disk_op_s *op) return process_floppy_op(op); case DTYPE_ATA: return process_ata_op(op); - case DTYPE_ATAPI: - return process_atapi_op(op); case DTYPE_RAMDISK: return process_ramdisk_op(op); case DTYPE_CDEMU: @@ -320,6 +328,9 @@ process_op(struct disk_op_s *op) return process_virtio_blk_op(op); case DTYPE_AHCI: return process_ahci_op(op); + case DTYPE_ATA_ATAPI: + case DTYPE_AHCI_ATAPI: + return process_atapi_op(op); case DTYPE_USB: case DTYPE_UAS: case DTYPE_VIRTIO_SCSI: diff --git a/src/blockcmd.c b/src/blockcmd.c index 0d0acfd..95406c6 100644 --- a/src/blockcmd.c +++ b/src/blockcmd.c @@ -23,13 +23,13 @@ cdb_cmd_data(struct disk_op_s *op, void *cdbcmd, u16 blocksize) { u8 type = GET_GLOBAL(op->drive_g->type); switch (type) { - case DTYPE_ATAPI: + case DTYPE_ATA_ATAPI: return atapi_cmd_data(op, cdbcmd, blocksize); case DTYPE_USB: return usb_cmd_data(op, cdbcmd, blocksize); case DTYPE_UAS: return uas_cmd_data(op, cdbcmd, blocksize); - case DTYPE_AHCI: + case DTYPE_AHCI_ATAPI: return ahci_cmd_data(op, cdbcmd, blocksize); case DTYPE_VIRTIO_SCSI: return virtio_scsi_cmd_data(op, cdbcmd, blocksize); @@ -96,9 +96,6 @@ scsi_is_ready(struct disk_op_s *op) int scsi_init_drive(struct drive_s *drive, const char *s, int prio) { - if (!CONFIG_USB_UAS && !CONFIG_USB_MSC && !CONFIG_VIRTIO_SCSI && !CONFIG_LSI_SCSI) - return 0; - struct disk_op_s dop; memset(&dop, 0, sizeof(dop)); dop.drive_g = drive; diff --git a/src/cdrom.c b/src/cdrom.c index 6e0055d..42d8e08 100644 --- a/src/cdrom.c +++ b/src/cdrom.c @@ -201,7 +201,7 @@ cdrom_boot(struct drive_s *drive_g) dprintf(1, "scsi_is_ready returned %d\n", ret); // Read the Boot Record Volume Descriptor - u8 buffer[2048]; + u8 buffer[CDROM_SECTOR_SIZE]; dop.lba = 0x11; dop.count = 1; dop.buf_fl = buffer; diff --git a/src/disk.c b/src/disk.c index 8eff464..8e1d3ec 100644 --- a/src/disk.c +++ b/src/disk.c @@ -530,7 +530,7 @@ disk_1348(struct bregs *regs, struct drive_s *drive_g) , size, type, npc, nph, npspt, (u32)lba, blksize); SET_FARVAR(seg, param_far->size, 26); - if (type == DTYPE_ATAPI) { + if (type == DTYPE_ATA_ATAPI) { // 0x74 = removable, media change, lockable, max values SET_FARVAR(seg, param_far->infos, 0x74); SET_FARVAR(seg, param_far->cylinders, 0xffffffff); @@ -552,7 +552,7 @@ disk_1348(struct bregs *regs, struct drive_s *drive_g) SET_FARVAR(seg, param_far->blksize, blksize); if (size < 30 || - (type != DTYPE_ATA && type != DTYPE_ATAPI && + (type != DTYPE_ATA && type != DTYPE_ATA_ATAPI && type != DTYPE_VIRTIO_BLK && type != DTYPE_VIRTIO_SCSI)) { disk_ret(regs, DISK_RET_SUCCESS); return; @@ -565,7 +565,7 @@ disk_1348(struct bregs *regs, struct drive_s *drive_g) u64 device_path = 0; u8 channel = 0; SET_FARVAR(seg, param_far->size, 30); - if (type == DTYPE_ATA || type == DTYPE_ATAPI) { + if (type == DTYPE_ATA || type == DTYPE_ATA_ATAPI) { SET_FARVAR(seg, param_far->dpte, SEGOFF(SEG_LOW, (u32)&DefaultDPTE)); // Fill in dpte diff --git a/src/disk.h b/src/disk.h index 6810cd7..2b2511f 100644 --- a/src/disk.h +++ b/src/disk.h @@ -224,15 +224,16 @@ struct drive_s { #define DTYPE_NONE 0x00 #define DTYPE_FLOPPY 0x01 #define DTYPE_ATA 0x02 -#define DTYPE_ATAPI 0x03 +#define DTYPE_ATA_ATAPI 0x03 #define DTYPE_RAMDISK 0x04 #define DTYPE_CDEMU 0x05 #define DTYPE_AHCI 0x06 -#define DTYPE_VIRTIO_SCSI 0x07 -#define DTYPE_VIRTIO_BLK 0x08 -#define DTYPE_USB 0x09 -#define DTYPE_UAS 0x0a -#define DTYPE_LSI_SCSI 0x0b +#define DTYPE_AHCI_ATAPI 0x07 +#define DTYPE_VIRTIO_SCSI 0x08 +#define DTYPE_VIRTIO_BLK 0x09 +#define DTYPE_USB 0x0a +#define DTYPE_UAS 0x0b +#define DTYPE_LSI_SCSI 0x0c #define MAXDESCSIZE 80 -- 1.7.10.4

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why need 32bit code in seabios?
by wx July 21, 2012

July 21, 2012

Hi, I have a Childish question,why need 32bit code in seabios?. I found some files are compiled in 16bit and 32bit twice. Thanks!

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[PATCH v2 0/3] scsi boot
by Gerd Hoffmann July 21, 2012

July 21, 2012

Hi, Quick review, giving me the opportunity for a quick v2 before disappearing into my summer vacation, fixing the nits pointed out by Kevin. The series also got a third commit which moves the usb mass storage defines from usb-msc.h to usb.h, so the uas code can easily reuse them. cheers, Gerd Gerd Hoffmann (3): move usb mass storage defines to usb.h usb attached scsi boot support lsi53c895a boot support Makefile | 3 +- src/Kconfig | 14 +++- src/block.c | 4 +- src/blockcmd.c | 8 ++- src/disk.h | 2 + src/lsi-scsi.c | 212 +++++++++++++++++++++++++++++++++++++++++++++ src/lsi-scsi.h | 8 ++ src/post.c | 2 + src/usb-msc.h | 11 --- src/usb-uas.c | 264 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ src/usb-uas.h | 9 ++ src/usb.c | 10 ++- src/usb.h | 11 +++ 13 files changed, 540 insertions(+), 18 deletions(-) create mode 100644 src/lsi-scsi.c create mode 100644 src/lsi-scsi.h create mode 100644 src/usb-uas.c create mode 100644 src/usb-uas.h

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[PATCH 0/2] scsi boot
by Gerd Hoffmann July 20, 2012

July 20, 2012

Hi, This patch series adds more scsi support to seabios. I've hacked up a UAS (usb attached scsi) driver, so you can boot from upcoming[1] uas devices. And while being at it I also added lsi53c895a support, allowing qemu boot from lsi without depending on the extboot hack. enjoy, Gerd PS: I'll be offline for two weeks starting next monday, will deal with review comments once I'm back. Unless someone else is faster or the patches are committed meanwhile ;) [1] Pull request pending, bits are available from git://git.kraxel.org/qemu usb.57 Gerd Hoffmann (2): usb attached scsi boot support lsi53c895a boot support Makefile | 3 +- src/Kconfig | 14 +++- src/block.c | 4 +- src/blockcmd.c | 8 ++- src/disk.h | 2 + src/lsi-scsi.c | 213 +++++++++++++++++++++++++++++++++++++++++++++ src/lsi-scsi.h | 2 + src/post.c | 2 + src/usb-uas.c | 264 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ src/usb-uas.h | 2 + src/usb.c | 10 ++- 11 files changed, 517 insertions(+), 7 deletions(-) create mode 100644 src/lsi-scsi.c create mode 100644 src/lsi-scsi.h create mode 100644 src/usb-uas.c create mode 100644 src/usb-uas.h

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[PATCH]: enable USE_PLATFORM_CLOCK bit in FADT flags
by Marcelo Tosatti July 20, 2012

July 20, 2012

Enable bit 15 (USE_PLATFORM_CLOCK) of FADT flags field so that older Windows guests do not make use of the TSC for timestamping. >From the ACPI manual: "A value of one indicates that OSPM should use a platform provided timer to drive any monotonically non-decreasing counters, such as OSPM performance counter services. Which particular platform timer will be used is OSPM specific, however, it is recommended that the timer used is based on the following algorithm: If the HPET is exposed to OSPM, OSPM should use the HPET. Otherwise, OSPM will use the ACPI power management timer. A value of one indicates that the platform is known to have a correctly implemented ACPI power management timer." Problems using the TSC include: 1) Migration to a host with different frequency. 2) Unsynchronized TSCs in SMP hosts (KVM does not guarantee synchronization). 3) Processors which do not increment TSC on low power states. Signed-off-by: Marcelo Tosatti <mtosatti(a)redhat.com> diff --git a/src/acpi.c b/src/acpi.c index 0559443..fd5c7ea 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -336,8 +336,9 @@ build_fadt(int bdf) fadt->plvl3_lat = cpu_to_le16(0xfff); // C3 state not supported fadt->gpe0_blk = cpu_to_le32(0xafe0); fadt->gpe0_blk_len = 4; - /* WBINVD + PROC_C1 + SLP_BUTTON + FIX_RTC */ - fadt->flags = cpu_to_le32((1 << 0) | (1 << 2) | (1 << 5) | (1 << 6)); + /* WBINVD + PROC_C1 + SLP_BUTTON + FIX_RTC + USE_PLATFORM_CLOCK */ + fadt->flags = cpu_to_le32((1 << 0) | (1 << 2) | (1 << 5) | (1 << 6) | + (1 << 15)); build_header((void*)fadt, FACP_SIGNATURE, sizeof(*fadt), 1);

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Re: [SeaBIOS] [RFC PATCH v2 03/21] acpi-dsdt: Implement functions for memory hotplug
by Wen Congyang July 20, 2012

July 20, 2012

At 07/11/2012 06:31 PM, Vasilis Liaskovitis Wrote: > Extend the DSDT to include methods for handling memory hot-add and hot-remove > notifications and memory device status requests. These functions are called > from the memory device SSDT methods. > > Signed-off-by: Vasilis Liaskovitis <vasilis.liaskovitis(a)profitbricks.com> > --- > src/acpi-dsdt.dsl | 70 +++++++++++++++++++++++++++++++++++++++++++++++++++- > 1 files changed, 68 insertions(+), 2 deletions(-) > > diff --git a/src/acpi-dsdt.dsl b/src/acpi-dsdt.dsl > index 2060686..5d3e92b 100644 > --- a/src/acpi-dsdt.dsl > +++ b/src/acpi-dsdt.dsl > @@ -737,6 +737,71 @@ DefinitionBlock ( > } > Return(One) > } > + /* Objects filled in by run-time generated SSDT */ > + External(MTFY, MethodObj) > + External(MEON, PkgObj) > + > + Method (CMST, 1, NotSerialized) { > + // _STA method - return ON status of memdevice > + // Local0 = MEON flag for this cpu > + Store(DerefOf(Index(MEON, Arg0)), Local0) > + If (Local0) { Return(0xF) } Else { Return(0x0) } > + } > + > + /* Memory hotplug notify array */ > + OperationRegion(MEST, SystemIO, 0xaf80, 32) > + Field (MEST, ByteAcc, NoLock, Preserve) > + { > + MES, 256 > + } > + > + /* Memory eject byte */ > + OperationRegion(MEMJ, SystemIO, 0xafa0, 1) > + Field (MEMJ, ByteAcc, NoLock, Preserve) > + { > + MPE, 8 > + } > + > + Method(MESC, 0) { > + // Local5 = active memdevice bitmap > + Store (MES, Local5) > + // Local2 = last read byte from bitmap > + Store (Zero, Local2) > + // Local0 = memory device iterator > + Store (Zero, Local0) > + While (LLess(Local0, SizeOf(MEON))) { > + // Local1 = MEON flag for this memory device > + Store(DerefOf(Index(MEON, Local0)), Local1) > + If (And(Local0, 0x07)) { > + // Shift down previously read bitmap byte > + ShiftRight(Local2, 1, Local2) > + } Else { > + // Read next byte from memdevice bitmap > + Store(DerefOf(Index(Local5, ShiftRight(Local0, 3))), Local2) > + } > + // Local3 = active state for this memory device > + Store(And(Local2, 1), Local3) > + > + If (LNotEqual(Local1, Local3)) { There are two ways to hot remove a memory device: 1. dimm_del 2. echo 1 >/sys/bus/acpi/devices/PNP0C80:XX/eject In the 2nd case, we cannot hotplug this memory device again, because both Local1 and Local3 are 1. So, I think MEON flag for this meory device should be set to 0 in method _EJ0 or implement method _PS3 for memory device. Thanks Wen Congyang > + // State change - update MEON with new state > + Store(Local3, Index(MEON, Local0)) > + // Do MEM notify > + If (LEqual(Local3, 1)) { > + MTFY(Local0, 1) > + } Else { > + MTFY(Local0, 3) > + } > + } > + Increment(Local0) > + } > + Return(One) > + } > + > + Method (MPEJ, 2, NotSerialized) { > + // _EJ0 method - eject callback > + Store(Arg0, MPE) > + Sleep(200) > + } > } > > > @@ -759,8 +824,9 @@ DefinitionBlock ( > // CPU hotplug event > Return(\_SB.PRSC()) > } > - Method(_L03) { > - Return(0x01) > + Method(_E03) { > + // Memory hotplug event > + Return(\_SB.MESC()) > } > Method(_L04) { > Return(0x01)

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Re: [SeaBIOS] why need 32bit code in seabios?
by Darmawan Salihun July 20, 2012

July 20, 2012

> On 7/20/12, wx <fred_xw(a)hotmail.com> wrote: >> >> >> >> >> Hi, I have a Childish question,why need 32bit code in seabios?. I >> found >> some files are compiled in 16bit and 32bit twice. Thanks! > Hi, I'm not 100% sure about SeaBIOS, but there is this thing called BIOS32 Service Directory. Probably, you were looking at the implementation of the BIOS32 service directory, when you saw the 32-bit code. See: http://www.superfrink.net/athenaeum/OS-FAQ/os-faq-pci.html Regards, Darmawan PS: sorry for top-posting previously. -- -------------------------------------------------------------------- -= Human knowledge belongs to the world =-

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