January 2012 - SeaBIOS - mail.coreboot.org

Re: [SeaBIOS] [RFC] acpi: Do not advertise S3
by Gleb Natapov Jan. 15, 2012

Jan. 15, 2012

On Sun, Jan 15, 2012 at 12:35:07PM +0100, Fred . wrote: > SeaBIOS is used in more than just QEMU. The DSDT provided by Seabios is not used by anyone but QEMU (and may be XEN). > If QEMU does not support S3, then they should patch (or configure) > SeaBIOS to not advertise S3 support. > > On Sun, Jan 15, 2012 at 10:00 AM, Gleb Natapov <gleb(a)redhat.com> wrote: > > On Fri, Jan 13, 2012 at 05:11:27PM -0200, Luiz Capitulino wrote: > >> S3 is broken in qemu in the following ways: > >> > >> 1. S3 is immediately followed by a resume (or it doesn't even > >> take place) > > The only real problem. I am not aware of "it doesn't even take place" > > part. If there are such cases they are guest problems. Guest can refuse > > to do S3 for number of reasons. This has nothing to do with QEMU. > > > >> 2. The screen goes black after S3 > > Guest problem. > > > >> 3. Some people reported a hang (I couldn't reproduce it myself) > > Guest problem. > > > >> > >> Chances are we can get these bugs fixed for 1.1, until there let's > >> not advertise S3 to prevent things like qemu-ga from breaking qemu. > >> > > I am OK with this, but make it "#if DSDT_S3", so that it can be enabled > > without changing the source. > > > >> Signed-off-by: Luiz Capitulino <lcapitulino(a)redhat.com> > >> --- > >> src/acpi-dsdt.dsl | 3 +++ > >> src/acpi-dsdt.hex | 16 ++-------------- > >> 2 files changed, 5 insertions(+), 14 deletions(-) > >> > >> diff --git a/src/acpi-dsdt.dsl b/src/acpi-dsdt.dsl > >> index 7082b65..2bd8d95 100644 > >> --- a/src/acpi-dsdt.dsl > >> +++ b/src/acpi-dsdt.dsl > >> @@ -599,6 +599,8 @@ DefinitionBlock ( > >> * S3 (suspend-to-ram), S4 (suspend-to-disk) and S5 (power-off) type codes: > >> * must match piix4 emulation. > >> */ > >> +#if 0 > >> + S3 is br0ken in qemu, do not advertise it > >> Name (\_S3, Package (0x04) > >> { > >> 0x01, /* PM1a_CNT.SLP_TYP */ > >> @@ -606,6 +608,7 @@ DefinitionBlock ( > >> Zero, /* reserved */ > >> Zero /* reserved */ > >> }) > >> +#endif > >> Name (\_S4, Package (0x04) > >> { > >> Zero, /* PM1a_CNT.SLP_TYP */ > >> diff --git a/src/acpi-dsdt.hex b/src/acpi-dsdt.hex > >> index 5dc7bb4..9dcef05 100644 > >> --- a/src/acpi-dsdt.hex > >> +++ b/src/acpi-dsdt.hex > >> @@ -3,12 +3,12 @@ static unsigned char AmlCode[] = { > >> 0x53, > >> 0x44, > >> 0x54, > >> -0xd3, > >> +0xc7, > >> 0x10, > >> 0x0, > >> 0x0, > >> 0x1, > >> -0x2d, > >> +0xa3, > >> 0x42, > >> 0x58, > >> 0x50, > >> @@ -3850,18 +3850,6 @@ static unsigned char AmlCode[] = { > >> 0x8, > >> 0x5f, > >> 0x53, > >> -0x33, > >> -0x5f, > >> -0x12, > >> -0x6, > >> -0x4, > >> -0x1, > >> -0x1, > >> -0x0, > >> -0x0, > >> -0x8, > >> -0x5f, > >> -0x53, > >> 0x34, > >> 0x5f, > >> 0x12, > >> -- > >> 1.7.9.rc0.dirty > > > > -- > > Gleb. > > > > _______________________________________________ > > SeaBIOS mailing list > > SeaBIOS(a)seabios.org > > http://www.seabios.org/mailman/listinfo/seabios -- Gleb.

2 2

Geode vga pci code
by Kevin O'Connor Jan. 15, 2012

Jan. 15, 2012

Hi Nils, I noticed that the Geode VGA code seems to be doing manual PCI reads - which is kinda odd. Does the patch below work for you? You'll need to register the rom in cbfs as "pci100b,0030.rom", you'll need to make sure coreboot is enabling the vga memory ranges, and you'll need to make sure out/autoconf.h really has CONFIG_VGA_DID/VID defined corectly - but otherwise it should work. -Kevin --- a/vgasrc/geodevga.c +++ b/vgasrc/geodevga.c @@ -7,12 +7,13 @@ // This file may be distributed under the terms of the GNU LGPLv3 license. #include "geodevga.h" // geodevga_init -#include "ioport.h" // outb #include "farptr.h" // SET_FARVAR #include "biosvar.h" // GET_BDA #include "vgabios.h" // VGAREG_* #include "util.h" // memset #include "stdvga.h" // stdvga_crtc_write +#include "pci.h" // pci_config_readl +#include "pci_regs.h" // PCI_BASE_ADDRESS_0 /**************************************************************** @@ -226,8 +227,7 @@ static int dc_setup(void) /* read fb-bar from pci, then point dc to the fb base */ dc_fb = dc_read(seg,DC_GLIU0_MEM_OFFSET); - outl(GEODE_PCI_FB,PORT_PCI_CMD); - fb = inl(PORT_PCI_DATA); + fb = pci_config_readl(GET_GLOBAL(VgaBDF), PCI_BASE_ADDRESS_0); if (fb!=dc_fb) { dc_write(seg,DC_GLIU0_MEM_OFFSET,fb); } @@ -254,13 +254,12 @@ int vp_setup(void) dprintf(2,"VP_SETUP\n"); /* set output to crt and RGB/YUV */ if (CONFIG_VGA_GEODEGX2) - geode_msrWrite(VP_MSR_CONFIG_GX2,~0 ,~0xf8,0,0); + geode_msrWrite(VP_MSR_CONFIG_GX2, ~0, ~0xf8, 0, 0); else - geode_msrWrite(VP_MSR_CONFIG_LX,~0 ,~0xf8,0,0); + geode_msrWrite(VP_MSR_CONFIG_LX, ~0, ~0xf8, 0, 0); /* get vp register base from pci */ - outl(GEODE_PCI_VP,PORT_PCI_CMD); - vp = inl(PORT_PCI_DATA); + vp = pci_config_readl(GET_GLOBAL(VgaBDF), PCI_BASE_ADDRESS_3); /* Set mmio registers * there may be some timing issues here, the reads seem diff --git a/vgasrc/geodevga.h b/vgasrc/geodevga.h index ec019a4..fd7ce43 100644 --- a/vgasrc/geodevga.h +++ b/vgasrc/geodevga.h @@ -26,12 +26,6 @@ #define OEM_BAR2 0x58 #define OEM_BAR3 0x5C -#define GEODE_PCI_ADDR 0x80000900 -#define GEODE_PCI_CMD (GEODE_PCI_ADDR + 0x04) -#define GEODE_PCI_FB (GEODE_PCI_ADDR + 0x10) -#define GEODE_PCI_DC (GEODE_PCI_ADDR + 0x18) -#define GEODE_PCI_VP (GEODE_PCI_ADDR + 0x1c) - #define DC_LOCK_LOCK 0x00000000 #define DC_LOCK_UNLOCK 0x00004758

1 0

[PATCH 0/5] Use wrappers for VGA IO port accesses
by Kevin O'Connor Jan. 15, 2012

Jan. 15, 2012

Introduce standard wrappers for accessing the VGA IO ports. The VGA ports are pretty bizarre - using wrappers makes the code easier to understand. -Kevin Kevin O'Connor (5): vgabios: Add wrapper functions for accessing standard VGA registers. vgabios: Use standard VGA IO wrapper functions in stdvga.c. vgabios: Use standard VGA IO wrapper functions in bochsvga. vgabios: Use standard VGA IO wrappers in clext.c. vgabios: Use standard VGA IO wrappers in geodevga.c. Makefile | 7 +- vgasrc/bochsvga.c | 53 +++----- vgasrc/bochsvga.h | 2 +- vgasrc/clext.c | 125 ++++++----------- vgasrc/geodevga.c | 19 +-- vgasrc/stdvga.c | 408 +++++++++++++---------------------------------------- vgasrc/stdvga.h | 31 +++- vgasrc/stdvgaio.c | 185 ++++++++++++++++++++++++ vgasrc/vgabios.c | 16 +- 9 files changed, 389 insertions(+), 457 deletions(-) create mode 100644 vgasrc/stdvgaio.c -- 1.7.6.4

1 5

[PATCH 1/2] Permit multiple BEV and BEV/BCV combinations in a single option rom.
by Kevin O'Connor Jan. 14, 2012

Jan. 14, 2012

The BBS spec is unclear on multiple BEV entry points for a rom. However, the LSI scsi rom has been seen to register a BEV followed by multiple BCV entry points. Add support for it, as there's no harm in it. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/optionroms.c | 21 ++++++++++----------- 1 files changed, 10 insertions(+), 11 deletions(-) diff --git a/src/optionroms.c b/src/optionroms.c index 725767b..27cfffd 100644 --- a/src/optionroms.c +++ b/src/optionroms.c @@ -388,19 +388,18 @@ optionrom_setup(void) , getRomPriority(sources, rom, 0)); continue; } - // PnP rom. - if (pnp->bev) { - // Can boot system - add to IPL list. - boot_add_bev(FLATPTR_TO_SEG(rom), pnp->bev, pnp->productname - , getRomPriority(sources, rom, 0)); - } else { - // Check for BCV (there may be multiple). - int instance = 0; - while (pnp && pnp->bcv) { + // PnP rom - check for BEV and BCV boot capabilities. + int instance = 0; + while (pnp) { + if (pnp->bev) + boot_add_bev(FLATPTR_TO_SEG(rom), pnp->bev, pnp->productname + , getRomPriority(sources, rom, instance++)); + else if (pnp->bcv) boot_add_bcv(FLATPTR_TO_SEG(rom), pnp->bcv, pnp->productname , getRomPriority(sources, rom, instance++)); - pnp = get_pnp_next(rom, pnp); - } + else + break; + pnp = get_pnp_next(rom, pnp); } } } -- 1.7.6.4

2 2

[PATCH 00/15] More vgabios work.
by Kevin O'Connor Jan. 14, 2012

Jan. 14, 2012

More work on the vgabios. Much of the changes are for unifying the mode lists shared between the various drivers. This series culminates with the Cirrus driver getting basic VBE support. -Kevin Kevin O'Connor (15): vgabios: Use vesa style memory model flags in stdvga code. vgabios: Use standard naming for cirrus memmodel. vgabios: Add char width to stdvga mode table. vgabios: Remove dummy 0xfe mode from list of cirrus modes. vgabios: Make struct vgamode_s more similar to bochs/cirrus mode tables. vgabios: Add memmodel field to bochsvga mode list. vgabios: Unify page size calculations; remove page size from vgamode_s. vgabios: Extract out common parts of struct vgamode_s. vgabios: Use vgamode_s in cirrus and bochsvga mode tables. vgabios: Unify code to generate the vbe mode list. vgabios: Make VBE code independent of bochsvga. vgabios: Unify cirrus and vbe vesa functions. vgabios: Make cirrus line lengths standard. vgabios: Hook up Cirrus extended bios functions. vgabios: Add cirrus linear framebuffer detection; enable VBE in cirrus. Makefile | 2 +- vgasrc/bochsvga.c | 327 +++++++++++++--------------------- vgasrc/bochsvga.h | 11 +- vgasrc/clext.c | 499 ++++++++++++++++++---------------------------------- vgasrc/clext.h | 6 +- vgasrc/geodevga.c | 6 +- vgasrc/stdvga.c | 34 ++-- vgasrc/stdvga.h | 36 +--- vgasrc/vbe.c | 94 +++++----- vgasrc/vgabios.c | 85 +++++---- vgasrc/vgabios.h | 42 +++-- vgasrc/vgafb.c | 90 ++++------ vgasrc/vgahw.h | 17 ++ vgasrc/vgatables.c | 86 +++++---- 14 files changed, 564 insertions(+), 771 deletions(-) -- 1.7.6.4

1 15

[PATCH 2/2] BCVs should inherrit the legacy harddrive priority.
by Kevin O'Connor Jan. 14, 2012

Jan. 14, 2012

A BCV will (almost assuredly) be a hard drive, so it makes sense to prioritize them the same as builtin hard drives when only the legacy priority system is used. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/boot.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/src/boot.c b/src/boot.c index 93928d3..e26dad1 100644 --- a/src/boot.c +++ b/src/boot.c @@ -326,7 +326,7 @@ boot_add_bev(u16 seg, u16 bev, u16 desc, int prio) void boot_add_bcv(u16 seg, u16 ip, u16 desc, int prio) { - bootentry_add(IPL_TYPE_BCV, defPrio(prio, DEFAULT_PRIO) + bootentry_add(IPL_TYPE_BCV, defPrio(prio, DefaultHDPrio) , SEGOFF(seg, ip).segoff , desc ? MAKE_FLATPTR(seg, desc) : "Legacy option rom"); } -- 1.7.6.4

1 0

Re: [SeaBIOS] [PATCH 0/3] acpi_piix4: Add CPU eject handling
by Jan Kiszka Jan. 13, 2012

Jan. 13, 2012

On 2012-01-13 12:11, Vasilis Liaskovitis wrote: > This patch series adds support for CPU _EJ0 callback in Seabios and qemu-kvm. > The first patch defines the CPU eject bitmap in Seabios and writes to it > during the callback. The second patch adds empty stub functions to qemu-kvm to > handle the bitmap writes. Please work against upstream (uq/master for kvm-related patches), not qemu-kvm. It possibly makes no technical difference here, but we do not want to let the code bases needlessly diverge again. If if does make a difference and upstream lacks further bits, push them first. Thanks, Jan -- Siemens AG, Corporate Technology, CT T DE IT 1 Corporate Competence Center Embedded Linux

2 1

Re: [SeaBIOS] [PATCH 3/3] acpi_piix4: Call KVM_SETSTATE_VCPU ioctl on cpu ejection
by Jan Kiszka Jan. 13, 2012

Jan. 13, 2012

On 2012-01-13 12:11, Vasilis Liaskovitis wrote: > Signed-off-by: Vasilis Liaskovitis <vasilis.liaskovitis(a)profitbricks.com> > --- > hw/acpi_piix4.c | 21 +++++++++++++++++++++ > 1 files changed, 21 insertions(+), 0 deletions(-) > > diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c > index 8bf30dd..12eef55 100644 > --- a/hw/acpi_piix4.c > +++ b/hw/acpi_piix4.c > @@ -502,6 +502,27 @@ static uint32_t cpuej_read(void *opaque, uint32_t addr) > > static void cpuej_write(void *opaque, uint32_t addr, uint32_t val) > { > + struct kvm_vcpu_state state; > + CPUState *env; > + int cpu; > + int ret; > + > + cpu = ffs(val); > + /* zero means no bit was set, i.e. no CPU ejection happened */ > + if (!cpu) > + return; > + cpu--; > + env = cpu_phyid_to_cpu((uint64_t)cpu); > + if (env != NULL) { > + if (env->state == CPU_STATE_ZAPREQ) { > + state.vcpu_id = env->cpu_index; > + state.state = 1; > + ret = kvm_vm_ioctl(env->kvm_state, KVM_SETSTATE_VCPU, &state); That breaks in the absence of KVM or if it is not enabled. Also, where was this IOCTL introduced? Where are the linux header changes? > + if (ret) > + fprintf(stderr, "KVM_SETSTATE_VCPU failed: %s\n", > + strerror(ret)); > + } > + } > PIIX4_DPRINTF("cpuej write %x <== %d\n", addr, val); > } > Jan -- Siemens AG, Corporate Technology, CT T DE IT 1 Corporate Competence Center Embedded Linux

2 1

[PATCH 3/3] acpi_piix4: Call KVM_SETSTATE_VCPU ioctl on cpu ejection
by Vasilis Liaskovitis Jan. 13, 2012

Jan. 13, 2012

Signed-off-by: Vasilis Liaskovitis <vasilis.liaskovitis(a)profitbricks.com> --- hw/acpi_piix4.c | 21 +++++++++++++++++++++ 1 files changed, 21 insertions(+), 0 deletions(-) diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index 8bf30dd..12eef55 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -502,6 +502,27 @@ static uint32_t cpuej_read(void *opaque, uint32_t addr) static void cpuej_write(void *opaque, uint32_t addr, uint32_t val) { + struct kvm_vcpu_state state; + CPUState *env; + int cpu; + int ret; + + cpu = ffs(val); + /* zero means no bit was set, i.e. no CPU ejection happened */ + if (!cpu) + return; + cpu--; + env = cpu_phyid_to_cpu((uint64_t)cpu); + if (env != NULL) { + if (env->state == CPU_STATE_ZAPREQ) { + state.vcpu_id = env->cpu_index; + state.state = 1; + ret = kvm_vm_ioctl(env->kvm_state, KVM_SETSTATE_VCPU, &state); + if (ret) + fprintf(stderr, "KVM_SETSTATE_VCPU failed: %s\n", + strerror(ret)); + } + } PIIX4_DPRINTF("cpuej write %x <== %d\n", addr, val); } -- 1.7.7.3

1 0

[PATCH 2/3] acpi_piix4: Add stub functions for CPU eject callback
by Vasilis Liaskovitis Jan. 13, 2012

Jan. 13, 2012

Signed-off-by: Vasilis Liaskovitis <vasilis.liaskovitis(a)profitbricks.com> --- hw/acpi_piix4.c | 15 +++++++++++++++ 1 files changed, 15 insertions(+), 0 deletions(-) diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index d5743b6..8bf30dd 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -37,6 +37,7 @@ #define GPE_BASE 0xafe0 #define PROC_BASE 0xaf00 +#define PROC_EJ_BASE 0xaf20 #define GPE_LEN 4 #define PCI_BASE 0xae00 #define PCI_EJ_BASE 0xae08 @@ -493,6 +494,17 @@ static void pcihotplug_write(void *opaque, uint32_t addr, uint32_t val) PIIX4_DPRINTF("pcihotplug write %x <== %d\n", addr, val); } +static uint32_t cpuej_read(void *opaque, uint32_t addr) +{ + PIIX4_DPRINTF("cpuej read %x\n", addr); + return 0; +} + +static void cpuej_write(void *opaque, uint32_t addr, uint32_t val) +{ + PIIX4_DPRINTF("cpuej write %x <== %d\n", addr, val); +} + static uint32_t pciej_read(void *opaque, uint32_t addr) { PIIX4_DPRINTF("pciej read %x\n", addr); @@ -553,6 +565,9 @@ static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s) register_ioport_write(PROC_BASE, 32, 1, gpe_writeb, s); register_ioport_read(PROC_BASE, 32, 1, gpe_readb, s); + register_ioport_write(PROC_EJ_BASE, 32, 1, cpuej_write, s); + register_ioport_read(PROC_EJ_BASE, 32, 1, cpuej_read, s); + register_ioport_write(PCI_BASE, 8, 4, pcihotplug_write, pci0_status); register_ioport_read(PCI_BASE, 8, 4, pcihotplug_read, pci0_status); -- 1.7.7.3

1 0