ср, 23 авг. 2017 г. в 5:46, Michael S. Tsirkin <mst(a)redhat.com>:
On Tue, Aug 22, 2017 at 02:43:39PM +0300, Marcel
On 18/08/2017 2:36, Aleksandr Bezzubikov wrote:
> This series introduces a new device - Generic PCI Express to PCI
> and also makes all necessary changes to
enable hotplug of the bridge
device into the bridge.
Tested-by: Marcel Apfelbaum <marcel(a)redhat.com>
(focused on changes from v6)
Michael, will Alecsandr need to re-send it after freeze?
re-send or ping pls.
I am asking because the GSOC project is ending in
a week or so.
> Changes v6->v7:
> Change IO/MEM/PREF reservation properties type to SIZE.
> Changes v5->v6:
> 1. Fix indentation in the cap creation function (addresses Marcel's
> 2. Simplify capability pref_mem_* fields
> 3. Documentation fixes:
> - fix mutually exclusive fields definition (addresses Laszlo's
> - fix pcie-pci-bridge usage example
(addresses Marcel's comment)
> Changes v4->v5:
> 1. Change PCIE-PCI Bridge license (addresses Marcel's comment)
> 2. The capability layout changes (adress Laszlo' comments):
> - separate pref_mem into pref_mem_32 and pref_mem_64 fields
side has the same changes)
> - accordingly change the Generic Root
> 3. Do not add the capability to the root port if no valid values are
(adresses Michael's comment)
> 4. Rename the capability type to
> 5. Remove shpc_present check function
(addresses Marcel's comment)
> 6. Fix the 4th patch message (adresses Michael's comment)
> 7. Patch for SHPC enabling in _OSC method has been already merged
> Changes v3->v4:
> 1. PCIE-PCI Bridge device: "msi_enable"->"msi",
> make "msi" property OnOffAuto,
shpc_present() is still here
> to avoid SHPC_VMSTATE refactoring (address Marcel's comments).
> 2. Change QEMU PCI capability layout (SeaBIOS side has the same
> - change reservation fields types:
bus_res - uint32_t, others -
> - rename 'non_pref' and
> - interpret -1 value as 'ignore'
> 3. Use parent_realize in Generic PCI Express Root Port properly.
> 4. Fix documentation: fully replace the DMI-PCI bridge references with
new PCIE-PCI bridge,
Express", small mistakes and typos - address Laszlo's and
> 5. Rename QEMU PCI cap creation fucntion -
addresses Marcel's comment.
> Changes v2->v3:
> (0). 'do_not_use' capability field flag is still _not_ in here since
we haven't come to consesus on it yet.
> 1. Merge commits 5 (bus_reserve property
creation) and 6 (property
usage) together - addresses Michael's comment.
> 2. Add 'bus_reserve' property and
QEMU PCI capability only to Generic
PCIE Root Port - addresses Michael's and
> 3. Change 'bus_reserve'
property's default value to 0 - addresses
> 4. Rename QEMU bridge-specific PCI
capability creation function -
addresses Michael's comment.
> 5. Init the whole QEMU PCI capability with
zeroes - addresses
Michael's and Laszlo's comments.
> 6. Change QEMU PCI capability layout
(SeaBIOS side has the same
> - add 'type' field to distinguish
> RedHat-specific capabilities - addresses Michael's comment
> - do not mimiс PCI Config space register layout, but use mutually
> sized fields for IO and prefetchable
memory limits - addresses
> 7. Correct error handling in PCIE-PCI bridge
> 8. Replace a '2' constant with PCI_CAP_FLAGS in the capability
creation function - addresses Michael's comment.
> 9. Remove a comment on _OSC which isn't
correct anymore - address
> 10. Add documentation for the Generic
PCIE-PCI Bridge and QEMU PCI
capability - addresses Michael's comment.
> Changes v1->v2:
> 1. Enable SHPC for the bridge.
> 2. Enable SHPC support for the Q35 machine (ACPI stuff).
> 3. Introduce PCI capability to help firmware on the system init.
> This allows the bridge to be hotpluggable. Now it's supported
> only for pcie-root-port. Now it's supposed to used with
> SeaBIOS only, look at the SeaBIOS corresponding series
> "Allow RedHat PCI bridges reserve more buses than necessary during
> Aleksandr Bezzubikov (4):
> hw/pci: introduce pcie-pci-bridge device
> hw/pci: introduce bridge-only vendor-specific capability to provide
> some hints to firmware
> hw/pci: add QEMU-specific PCI capability to the Generic PCI Express
> Root Port
> docs: update documentation considering PCIE-PCI bridge
> docs/pcie.txt | 49 +++++-----
> docs/pcie_pci_bridge.txt | 114 ++++++++++++++++++++++
> hw/pci-bridge/Makefile.objs | 2 +-
> hw/pci-bridge/gen_pcie_root_port.c | 36 +++++++
> hw/pci-bridge/pcie_pci_bridge.c | 192
> hw/pci/pci_bridge.c | 46
> include/hw/pci/pci.h | 1 +
> include/hw/pci/pci_bridge.h | 25 +++++
> include/hw/pci/pcie_port.h | 1 +
> 9 files changed, 442 insertions(+), 24 deletions(-)
> create mode 100644 docs/pcie_pci_bridge.txt
> create mode 100644 hw/pci-bridge/pcie_pci_bridge.c