Hi,
This patch adds a config option to move PORT_ACPI_PM_BASE, then use the full I/O address space on q35.
Patches have been sent already a few months back, but IIRC we didn't came to a final conclusion. Resending rebased + with minor help text update to re-kick discussion.
cheers, Gerd
Gerd Hoffmann (2): Add config option to move PORT_ACPI_PM_BASE out of the way Allow using full io region on q35
src/Kconfig | 7 +++++++ src/fw/paravirt.h | 9 +++++++-- src/fw/pciinit.c | 16 +++++++++------- 3 files changed, 23 insertions(+), 9 deletions(-)
Signed-off-by: Gerd Hoffmann kraxel@redhat.com --- src/Kconfig | 7 +++++++ src/fw/paravirt.h | 9 +++++++-- 2 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/src/Kconfig b/src/Kconfig index a863866..8c9c99a 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -298,6 +298,13 @@ menu "Hardware support" default y help Initialize the Memory Type Range Registers (on emulators). + config PMBASE_LOW + depends on QEMU + bool "Map ACPI PM below 0x1000" + default n + help + Map ACPI PM bar below 0x1000. This makes room in the io address + space for PCI bridges, but requires qemu 2.0+ to work correctly. config PMTIMER bool "Use ACPI timer" default y diff --git a/src/fw/paravirt.h b/src/fw/paravirt.h index 04fb4b9..3392519 100644 --- a/src/fw/paravirt.h +++ b/src/fw/paravirt.h @@ -29,8 +29,13 @@ static inline int runningOnKVM(void) { #define PORT_SMI_STATUS 0x00b3 #define PORT_QEMU_CFG_CTL 0x0510 #define PORT_QEMU_CFG_DATA 0x0511 -#define PORT_ACPI_PM_BASE 0xb000 -#define PORT_SMB_BASE 0xb100 +#ifdef CONFIG_PMBASE_LOW +# define PORT_ACPI_PM_BASE 0x0600 +# define PORT_SMB_BASE 0x0700 +#else +# define PORT_ACPI_PM_BASE 0xb000 +# define PORT_SMB_BASE 0xb100 +#endif
void qemu_preinit(void); void qemu_platform_setup(void);
Signed-off-by: Gerd Hoffmann kraxel@redhat.com --- src/fw/pciinit.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c index bbaecd6..6d637b0 100644 --- a/src/fw/pciinit.c +++ b/src/fw/pciinit.c @@ -36,6 +36,7 @@ u64 pcimem_start = BUILD_PCIMEM_START; u64 pcimem_end = BUILD_PCIMEM_END; u64 pcimem64_start = BUILD_PCIMEM64_START; u64 pcimem64_end = BUILD_PCIMEM64_END; +u64 pci_io_low_end = 0xa000;
struct pci_region_entry { struct pci_device *dev; @@ -404,6 +405,12 @@ static void mch_mem_addr_setup(struct pci_device *dev, void *arg) pcimem_start = addr + size;
pci_slot_get_irq = mch_pci_slot_get_irq; + + /* setup io address space */ + if (PORT_ACPI_PM_BASE < 0x1000) + pci_io_low_end = 0x10000; + else + pci_io_low_end = PORT_ACPI_PM_BASE; }
static const struct pci_device_id pci_platform_tbl[] = { @@ -721,16 +728,11 @@ static int pci_bios_init_root_regions_io(struct pci_bus *bus) if (sum < 0x4000) { /* traditional region is big enougth, use it */ r_io->base = 0xc000; - } else if (sum < 0x9000) { + } else if (sum < pci_io_low_end - 0x1000) { /* use the larger region at 0x1000 */ r_io->base = 0x1000; } else { - /* - * Not enougth io address space -> error out. - * - * TODO: on q35 we can move PORT_ACPI_PM_BASE out of - * the way, then use the whole 1000 -> ffff region. - */ + /* Not enougth io address space -> error out. */ return -1; } dprintf(1, "PCI: IO: %4llx - %4llx\n", r_io->base, r_io->base + sum - 1);
Gerd Hoffmann wrote:
+++ b/src/fw/pciinit.c
...
@@ -721,16 +728,11 @@ static int pci_bios_init_root_regions_io(struct pci_bus *bus) if (sum < 0x4000) { /* traditional region is big enougth, use it */ r_io->base = 0xc000;
- } else if (sum < 0x9000) {
- } else if (sum < pci_io_low_end - 0x1000) { /* use the larger region at 0x1000 */ r_io->base = 0x1000; } else {
/** Not enougth io address space -> error out.** TODO: on q35 we can move PORT_ACPI_PM_BASE out of* the way, then use the whole 1000 -> ffff region.*/
/* Not enougth io address space -> error out. */
Typo here ---^
//Peter
On Mon, May 12, 2014 at 03:28:25PM +0200, Gerd Hoffmann wrote:
Hi,
This patch adds a config option to move PORT_ACPI_PM_BASE, then use the full I/O address space on q35.
Patches have been sent already a few months back, but IIRC we didn't came to a final conclusion. Resending rebased + with minor help text update to re-kick discussion.
Were you looking for this series to be included into the upcoming release?
My concern with the series is patch 1 - I don't think we should be adding a compile time config setting for what I believe should be detected at runtime.
It would seem to me that the QEMU<->firmware interfaces would be simpler if QEMU just passed the desired iobase to the firmware. (I understand the setting may be needed early in the bootstrap process, but a fw_cfg file could be at a static address, which could then be read during bootstrap with only a few instructions.)
However, if passing the iobase from QEMU to firmware isn't an option, then I think SeaBIOS should at least detect at runtime if it is running on a QEMU version that supports a dynamic iobase.
Am I missing something?
-Kevin
On Mo, 2014-05-12 at 11:00 -0400, Kevin O'Connor wrote:
On Mon, May 12, 2014 at 03:28:25PM +0200, Gerd Hoffmann wrote:
Hi,
This patch adds a config option to move PORT_ACPI_PM_BASE, then use the full I/O address space on q35.
Patches have been sent already a few months back, but IIRC we didn't came to a final conclusion. Resending rebased + with minor help text update to re-kick discussion.
Were you looking for this series to be included into the upcoming release?
Would be nice to have it in, yes.
My concern with the series is patch 1 - I don't think we should be adding a compile time config setting for what I believe should be detected at runtime.
New series with runtime detection just posted.
cheers, Gerd
-
Gerd Hoffmann -
Kevin O'Connor -
Peter Stuge