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3783 discussions

Problems with parallel build and SeaVGABIOS
by Paul Menzel 29 Dec '16

29 Dec '16

Dear SeaBIOS folks, building SeaBIOS for coreboot with SeaVGABIOS in parallel, I get an error. > $ nproc > 8 > $ git log --oneline -1 > b98c658 drop "etc/boot-cpus" fw_cfg file and reuse legacy QEMU_CFG_NB_CPUS > $ grep VGA_COREBOOT .config > CONFIG_VGA_COREBOOT=y > $ make menuconfig && make clean && make -j > scripts/kconfig/mconf /home/pmenzel/src/seabios/src/Kconfig > > > *** End of the configuration. > *** Execute 'make' to start the build or try 'make help'. > > Compiling to assembler out/src/asm-offsets.s > Precompiling out/vgasrc/vgalayout.lds > cc1: fatal error: opening output file out/vgasrc/vgalayout.lds: No such file or directory > compilation terminated. > Makefile:138: recipe for target 'out/vgasrc/vgalayout.lds' failed > make: *** [out/vgasrc/vgalayout.lds] Error 1 > make: *** Waiting for unfinished jobs.... > Build Kconfig config file Probably the Makefile just needs some tweaking. Please find the configuration file attached. Kind regards, Paul

2 1

iPXE on multiple chips with the same PCI ID
by Аладышев Константин 29 Dec '16

29 Dec '16

I have a board with multiple external PCIe Ethernet I350 chips. In my lspci I have: 03.00.0 (4-port I350) 03.00.1 03.00.2 03.00.3 04.00.0 (4-port I350) 04.00.1 04.00.2 04.00.3 05.00.0 (2-port I350) 05.00.1 I builtin iPXE image to coreboot and I have all of these devices in Seabios bootmenu. But the problem is that I can only boot from ports of the first appeared chip. In the example above it will be 03.00.x boot devices. If I'll physically unplug 03.00.x chip, I'll be able to boot from 04.00.x boot devices. And if I'll unplug 03.00.x and 04.00.x chip, I'll be able to boot from 05.00.x boot devices. Does someone had the same problem and is there any idea of how to solve it? Coreboot+SeaBIOS log is in attachment (it has some additional printk's)

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[PATCH] searialio: Support for mmap serial ports
by Ricardo Ribalda Delgado 21 Dec '16

21 Dec '16

Some chipsets have memory mapped serial ports. The protocol is the same as an standard uart, but with memory read/write instead of inb/outb. Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda(a)gmail.com> --- src/Kconfig | 3 +++ src/hw/serialio.c | 28 +++++++++++++++++++++------- src/serial.c | 2 +- 3 files changed, 25 insertions(+), 8 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index e767be1351c3..ff1f960ef361 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -532,6 +532,9 @@ menu "Debugging" default 0x3f8 help Base port for serial - generally 0x3f8, 0x2f8, 0x3e8, or 0x2e8. + On some boards the serial port is memory mapped, in those cases + provide the 32 bit address. E.g. 0xFEDC6000 for the AMD Kern + (a.k.a Hudson UART). config DEBUG_IO depends on QEMU_HARDWARE && DEBUG_LEVEL != 0 diff --git a/src/hw/serialio.c b/src/hw/serialio.c index 6486fc086b1c..d02ab65f6e9b 100644 --- a/src/hw/serialio.c +++ b/src/hw/serialio.c @@ -17,6 +17,20 @@ #define DEBUG_TIMEOUT 100000 +static void +serial_outb(u8 val, u32 port, u8 offset){ + if (port < 0x10000) + return outb(val, port + offset); + writeb((void *)port + 4*offset, val); +} + +static u8 +serial_inb(u32 port, u8 offset){ + if (port < 0x10000) + return inb(port + offset); + return readb((void *)port + 4*offset); +} + // Setup the debug serial port for output. void serial_debug_preinit(void) @@ -25,12 +39,12 @@ serial_debug_preinit(void) return; // setup for serial logging: 8N1 u8 oldparam, newparam = 0x03; - oldparam = inb(CONFIG_DEBUG_SERIAL_PORT+SEROFF_LCR); - outb(newparam, CONFIG_DEBUG_SERIAL_PORT+SEROFF_LCR); + oldparam = serial_inb(CONFIG_DEBUG_SERIAL_PORT, SEROFF_LCR); + serial_outb(newparam, CONFIG_DEBUG_SERIAL_PORT, SEROFF_LCR); // Disable irqs u8 oldier, newier = 0; - oldier = inb(CONFIG_DEBUG_SERIAL_PORT+SEROFF_IER); - outb(newier, CONFIG_DEBUG_SERIAL_PORT+SEROFF_IER); + oldier = serial_inb(CONFIG_DEBUG_SERIAL_PORT, SEROFF_IER); + serial_outb(newier, CONFIG_DEBUG_SERIAL_PORT, SEROFF_IER); if (oldparam != newparam || oldier != newier) dprintf(1, "Changing serial settings was %x/%x now %x/%x\n" @@ -44,11 +58,11 @@ serial_debug(char c) if (!CONFIG_DEBUG_SERIAL) return; int timeout = DEBUG_TIMEOUT; - while ((inb(CONFIG_DEBUG_SERIAL_PORT+SEROFF_LSR) & 0x20) != 0x20) + while ((serial_inb(CONFIG_DEBUG_SERIAL_PORT, SEROFF_LSR) & 0x20) != 0x20) if (!timeout--) // Ran out of time. return; - outb(c, CONFIG_DEBUG_SERIAL_PORT+SEROFF_DATA); + serial_outb(c, CONFIG_DEBUG_SERIAL_PORT, SEROFF_DATA); } void @@ -66,7 +80,7 @@ serial_debug_flush(void) if (!CONFIG_DEBUG_SERIAL) return; int timeout = DEBUG_TIMEOUT; - while ((inb(CONFIG_DEBUG_SERIAL_PORT+SEROFF_LSR) & 0x60) != 0x60) + while ((serial_inb(CONFIG_DEBUG_SERIAL_PORT, SEROFF_LSR) & 0x60) != 0x60) if (!timeout--) // Ran out of time. return; diff --git a/src/serial.c b/src/serial.c index 88349c8a9267..27710cb19af9 100644 --- a/src/serial.c +++ b/src/serial.c @@ -21,7 +21,7 @@ static u16 detect_serial(u16 port, u8 timeout, u8 count) { - if (CONFIG_DEBUG_SERIAL && port == CONFIG_DEBUG_SERIAL_PORT + if (CONFIG_DEBUG_SERIAL && port == (u16) CONFIG_DEBUG_SERIAL_PORT && !romfile_loadint("etc/advertise-serial-debug-port", 1)) return 0; outb(0x02, port+SEROFF_IER); -- 2.10.2

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[PATCH] tpm: Log TPM 2 digest structure in little endian format
by Stefan Berger 03 Dec '16

03 Dec '16

The parameters for extending the PCRs of a TPM 2 are written in big endian format when sent to the TPM. However, the log needs to be written in little endian format, so we cannot just copy the structure into the log as-is. To support the little endian format in the log, we extend the function writing the TPM 2 digest structure with a parameter that allows us to choose the endianess of a few parameters. We then rewrite the digest structure in little endian format for the log. Signed-off-by: Stefan Berger <stefanb(a)linux.vnet.ibm.com> --- src/tcgbios.c | 25 ++++++++++++++++++------- 1 file changed, 18 insertions(+), 7 deletions(-) diff --git a/src/tcgbios.c b/src/tcgbios.c index 4cff4ce..fea88a6 100644 --- a/src/tcgbios.c +++ b/src/tcgbios.c @@ -311,11 +311,13 @@ tpm20_write_EfiSpecIdEventStruct(void) * * le: the log entry to build the digest in * sha1: the sha1 hash value to use + * bigEndian: whether to build in big endian format for the TPM or + * little endian for the log * * Returns the digest size; -1 on fatal error */ static int -tpm20_build_digest(struct tpm_log_entry *le, const u8 *sha1) +tpm20_build_digest(struct tpm_log_entry *le, const u8 *sha1, int bigEndian) { if (!tpm20_pcr_selection) return -1; @@ -346,7 +348,11 @@ tpm20_build_digest(struct tpm_log_entry *le, const u8 *sha1) return -1; } - v->hashAlg = sel->hashAlg; + if (bigEndian) + v->hashAlg = sel->hashAlg; + else + v->hashAlg = be16_to_cpu(sel->hashAlg); + memset(v->hash, 0, hsize); memcpy(v->hash, sha1, hsize > SHA1_BUFSIZE ? SHA1_BUFSIZE : hsize); @@ -360,7 +366,10 @@ tpm20_build_digest(struct tpm_log_entry *le, const u8 *sha1) } struct tpm2_digest_values *v = (void*)le->hdr.digest; - v->count = cpu_to_be32(count); + if (bigEndian) + v->count = cpu_to_be32(count); + else + v->count = count; return dest - (void*)le->hdr.digest; } @@ -374,13 +383,13 @@ tpm12_build_digest(struct tpm_log_entry *le, const u8 *sha1) } static int -tpm_build_digest(struct tpm_log_entry *le, const u8 *sha1) +tpm_build_digest(struct tpm_log_entry *le, const u8 *sha1, int bigEndian) { switch (TPM_version) { case TPM_VERSION_1_2: return tpm12_build_digest(le, sha1); case TPM_VERSION_2: - return tpm20_build_digest(le, sha1); + return tpm20_build_digest(le, sha1, bigEndian); } return -1; } @@ -709,7 +718,7 @@ tpm_add_measurement_to_log(u32 pcrindex, u32 event_type, .hdr.pcrindex = pcrindex, .hdr.eventtype = event_type, }; - int digest_len = tpm_build_digest(&le, hash); + int digest_len = tpm_build_digest(&le, hash, 1); if (digest_len < 0) return; int ret = tpm_extend(&le, digest_len); @@ -717,6 +726,7 @@ tpm_add_measurement_to_log(u32 pcrindex, u32 event_type, tpm_set_failure(); return; } + tpm_build_digest(&le, hash, 0); tpm_log_event(&le.hdr, digest_len, event, event_length); } @@ -1249,7 +1259,7 @@ hash_log_extend(struct pcpes *pcpes, const void *hashdata, u32 hashdata_length .hdr.pcrindex = pcpes->pcrindex, .hdr.eventtype = pcpes->eventtype, }; - int digest_len = tpm_build_digest(&le, pcpes->digest); + int digest_len = tpm_build_digest(&le, pcpes->digest, 1); if (digest_len < 0) return TCG_GENERAL_ERROR; if (extend) { @@ -1257,6 +1267,7 @@ hash_log_extend(struct pcpes *pcpes, const void *hashdata, u32 hashdata_length if (ret) return TCG_TCG_COMMAND_ERROR; } + tpm_build_digest(&le, pcpes->digest, 0); int ret = tpm_log_event(&le.hdr, digest_len , pcpes->event, pcpes->eventdatasize); if (ret) -- 2.5.5

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[PATCH 0/6] Misc tpm updates
by Kevin O'Connor 03 Dec '16

03 Dec '16

Hi Stefan, I dusted off some TPM patches I had worked on earlier in the year. Mostly just code movement, but the last patch I think helps simplify tpm_build_and_send_cmd(). Do they look okay to you? -Kevin Kevin O'Connor (6): tpm: Add comment banners to tcg.c separating major parts of spec tpm: Don't call tpm_set_failure() from tpm12_get_capability() tpm: Move code around in tcgbios.c to keep like code together acpi: Generalize find_fadt() and find_tcpa_by_rsdp() into find_acpi_table() tpm: Don't call tpm_build_and_send_cmd() from tpm20_stirrandom() tpm: Rework tpm_build_and_send_cmd() into tpm_simple_cmd() src/fw/biostables.c | 18 +- src/std/acpi.h | 7 - src/std/tcg.h | 199 +++++++++-------- src/tcgbios.c | 611 ++++++++++++++++++++++------------------------------ src/util.h | 1 + 5 files changed, 369 insertions(+), 467 deletions(-) -- 2.5.5

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[PATCH for-1.10-stable] drop "etc/boot-cpus" fw_cfg file and reuse legacy QEMU_CFG_NB_CPUS
by Igor Mammedov 22 Nov '16

22 Nov '16

since QEMU_CFG_NB_CPUS not going away anytime soon and serves the same purpose as just added "etc/boot-cpus" fw_cfg drop support for "etc/boot-cpus" while this code is not in use yet (i.e. QEMU with "etc/boot-cpus" hasn't been released) and reuse QEMU_CFG_NB_CPUS instead of it. Signed-off-by: Igor Mammedov <imammedo(a)redhat.com> --- corresponding QEMU part has been posted to qemu-devel [PATCH for-2.8 0/2] pc: remove redundant fw_cfg file "etc/boot-cpus" --- src/fw/paravirt.h | 1 - src/fw/paravirt.c | 37 ++++++------------------------------- src/fw/smp.c | 2 +- 3 files changed, 7 insertions(+), 33 deletions(-) diff --git a/src/fw/paravirt.h b/src/fw/paravirt.h index 6f26fd0..d8eb7c4 100644 --- a/src/fw/paravirt.h +++ b/src/fw/paravirt.h @@ -52,7 +52,6 @@ void qemu_preinit(void); void qemu_platform_setup(void); void qemu_cfg_init(void); -u16 qemu_init_present_cpus_count(void); u16 qemu_get_present_cpus_count(void); #endif diff --git a/src/fw/paravirt.c b/src/fw/paravirt.c index 125066d..a3ea152 100644 --- a/src/fw/paravirt.c +++ b/src/fw/paravirt.c @@ -205,6 +205,7 @@ qemu_platform_setup(void) #define QEMU_CFG_UUID 0x02 #define QEMU_CFG_NUMA 0x0d #define QEMU_CFG_BOOT_MENU 0x0e +#define QEMU_CFG_NB_CPUS 0x05 #define QEMU_CFG_MAX_CPUS 0x0f #define QEMU_CFG_FILE_DIR 0x19 #define QEMU_CFG_ARCH_LOCAL 0x8000 @@ -319,40 +320,14 @@ qemu_romfile_add(char *name, int select, int skip, int size) romfile_add(&qfile->file); } -static int -qemu_romfile_get_fwcfg_entry(char *name, int *select) -{ - struct romfile_s *file = romfile_find(name); - if (!file) - return 0; - struct qemu_romfile_s *qfile; - qfile = container_of(file, struct qemu_romfile_s, file); - if (select) - *select = qfile->select; - return file->size; -} - -static int boot_cpus_sel; -static int boot_cpus_file_sz; - -u16 -qemu_init_present_cpus_count(void) -{ - u16 smp_count = romfile_loadint("etc/boot-cpus", - rtc_read(CMOS_BIOS_SMP_COUNT) + 1); - boot_cpus_file_sz = - qemu_romfile_get_fwcfg_entry("etc/boot-cpus", &boot_cpus_sel); - return smp_count; -} - u16 qemu_get_present_cpus_count(void) { - u16 smp_count; - if (!boot_cpus_file_sz) { - smp_count = rtc_read(CMOS_BIOS_SMP_COUNT) + 1; - } else { - qemu_cfg_read_entry(&smp_count, boot_cpus_sel, boot_cpus_file_sz); + u16 smp_count = 0; + qemu_cfg_read_entry(&smp_count, QEMU_CFG_NB_CPUS, sizeof smp_count); + u16 cmos_cpu_count = rtc_read(CMOS_BIOS_SMP_COUNT) + 1; + if (smp_count < cmos_cpu_count) { + smp_count = cmos_cpu_count; } return smp_count; } diff --git a/src/fw/smp.c b/src/fw/smp.c index bcbad69..46d1da1 100644 --- a/src/fw/smp.c +++ b/src/fw/smp.c @@ -176,7 +176,7 @@ smp_setup(void) return; MaxCountCPUs = romfile_loadint("etc/max-cpus", 0); - u16 smp_count = qemu_init_present_cpus_count(); + u16 smp_count = qemu_get_present_cpus_count(); if (MaxCountCPUs < smp_count) MaxCountCPUs = smp_count; -- 2.7.4

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Patch: Add multiboot-capability to documentation
by Dennis Guse 21 Nov '16

21 Nov '16

Hello, so far the multiboot support is not included in the documentation. This small patch changes docs/Runtime_config.md to include multiboot. I think adding how to use multiboot with Grub would be nice, but this does not seem to fit to the content of Runtime_config.md. Do you have any suggestions where to put it? > This example shows how to start SeaBIOS from Grub2 via multiboot. SeaVGABIOS is passed as a module. ``` set root=(usb0,msdos1) multiboot /bios.elf.bin module /vgabios.bin name=vgaroms/seavgabios.bin boot ``` > Best, --- Dennis Guse

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Re: [SeaBIOS] Starting SEABIOS as Grub payload and NOT loading roms/configuration from CBFS
by Kevin O'Connor 21 Nov '16

21 Nov '16

On Fri, Nov 18, 2016 at 10:48:02AM +0100, Dennis Guse wrote: > I know usually Seabios is loaded by Coreboot and then Seabios loads > its modules from CBFS. > I want to do it slightly different: > * Hardware starts coreboot (actually libreboot flashed to a Lenovo X60) > * Coreboot starts Grub2 > * Grub2 chainloads Seabios from external storage, e.g., USB0: > `chainloader (usb0,msdos1)/bios.bin.elf` > * Seabios starts and loads its roms and configuration NOT from CBFS > > My actual reason for not accessing CBFS is that I want to avoid > flashing the CBFS to hardware for every change of Seabios or its > configuration. > However, I want to have VGA output... The multiboot support should allow one to pass modules from grub2 to SeaBIOS. I've not used multiboot, but this was an example posted in the past: menuentry "SeaBIOS (mb)" --unrestricted { root=ahci0,2 multiboot /bios.bin.elf module /vgabios_x230.rom name=pci8086,0166.rom } > So far, I can chainload Seabios from Grub2 (mostly via USB0). > Then Seabios is accessing the CBFS and automatically loads Grub2 from CBFS. I don't see why SeaBIOS would automatically chainload grub2 unless you asked it to. SeaBIOS only brings in payloads that are stored in the "img/" directory of CBFS - as long as one doesn't put images in that directory, SeaBIOS wont attempt to boot them. > For my case, it would be perfect if the roms (mainly VGA.rom) and > configuration would be compiled into the `bios.bin.elf`. > > I looked into the source and did not find a built in option for this > (I think nobody ever came with such a use case). > What would be a good starting point for me? There's no support for compiling in binaries to SeaBIOS. I'm CC'ing Vladimir as he added the multiboot support. -Kevin

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Starting SEABIOS as Grub payload and NOT loading roms/configuration from CBFS
by Dennis Guse 18 Nov '16

18 Nov '16

Hey, I know usually Seabios is loaded by Coreboot and then Seabios loads its modules from CBFS. I want to do it slightly different: * Hardware starts coreboot (actually libreboot flashed to a Lenovo X60) * Coreboot starts Grub2 * Grub2 chainloads Seabios from external storage, e.g., USB0: `chainloader (usb0,msdos1)/bios.bin.elf` * Seabios starts and loads its roms and configuration NOT from CBFS My actual reason for not accessing CBFS is that I want to avoid flashing the CBFS to hardware for every change of Seabios or its configuration. However, I want to have VGA output... So far, I can chainload Seabios from Grub2 (mostly via USB0). Then Seabios is accessing the CBFS and automatically loads Grub2 from CBFS. For my case, it would be perfect if the roms (mainly VGA.rom) and configuration would be compiled into the `bios.bin.elf`. I looked into the source and did not find a built in option for this (I think nobody ever came with such a use case). What would be a good starting point for me? Best, --- Dennis Guse

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SeaBIOS doesn't boot from secondary hard drive with OS if primary hard drive is empty
by Аладышев Константин 18 Nov '16

18 Nov '16

When I have 2 SATA disks attached to my board, and only second priority device is with OS, SeaBIOS doesn't boot. The "empty" disk doesn't have MBR, so SeaBIOS doesn't stuck on it, it goes to the end message "No bootable device. Retrying in 60 seconds." But if I manually press "ESC" and choose correct disk in interactive promt, system boots successfully. Two logs attached to the message (with and without "ESC" interaction). I use SeaBIOS (d7adf6044a4c772b497e97272adf97426b34a249) as a payload to coreboot.

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