SeaBIOS

seabios@seabios.org

3783 discussions

Boot menu key does not work with config options threads set to 2
by Paul Menzel 02 Feb '17

02 Feb '17

Dear SeaBIOS folks, On the ASRock E350M1 with coreboot and SeaBIOS, setting the runtime config option `threads` to 2, I am unable to press the boot menu key (ESC). [1] > By default, SeaBIOS will parallelize hardware initialization during bootup to reduce boot time. Multiple hardware devices can be initialized in parallel between vga initialization and option rom initialization. One can set this file to a value of zero to force hardware initialization to run serially. Alternatively, one can set this file to 2 to enable early hardware initialization that runs in parallel with vga, option rom initialization, and the boot menu. My rotating hard drive is pretty slow, and SeaBIOS is waiting for that. Not adding `etc/threads` to CBFS, pressing the key works, and the boot menu is displayed. Is that the expected behavior? Kind regards, Paul [1] https://www.seabios.org/Runtime_config

3 3

[PATCH 1/2] fw/acpi: Build MADT the way commodity BIOSes do
by Filippo Sironi 02 Feb '17

02 Feb '17

When running Linux on an Intel machine with a commodity BIOS, CPUs are numbered starting from 0 and the first half refers to the first logical CPU on each core while the second half refers to the second logical CPU on each core. As an example, on machine with 2 sockets, 4 cores per socket, and 2 logical CPUs per core, CPUs would be numbered: * 0 1 2 3 - first logical CPU on each core of socket 0 * 4 5 6 7 - first logical CPU on each core of socket 1 * 8 9 10 11 - second logical CPU on each core of socket 0 * 12 13 14 15 - second logical CPU on each core of socket 1 With seabios (prior to this patch), CPU 0 would be the first logical CPU on core 0 of socket 0, CPU 1 would be the second logical CPU on core 0 of socket 0, and so on. This is due to the fact that processor_id and local_apic_id are assigned with the same value when building MADT. Exhaust the most-significant 7 bits of the 8-bit APIC ID and then come back to the least-significant bit when assigning local_apic_id, since the least-significant bit identifies the second logical CPU on a core. If HTT isn't available, keep the previous behavior. Signed-off-by: Filippo Sironi <sironi(a)amazon.de> --- src/fw/acpi.c | 42 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 41 insertions(+), 1 deletion(-) diff --git a/src/fw/acpi.c b/src/fw/acpi.c index 8bc2ca6..864c247 100644 --- a/src/fw/acpi.c +++ b/src/fw/acpi.c @@ -158,13 +158,53 @@ build_madt(void) memset(madt, 0, madt_size); madt->local_apic_address = cpu_to_le32(BUILD_APIC_ADDR); madt->flags = cpu_to_le32(1); + u32 eax, ebx, ecx, edx; + cpuid(1, &eax, &ebx, &ecx, &edx); + int htt = 0; + if (!eax) { + dprintf(1, "No cpuid\n"); + } else { + htt = !!(edx & (1 << 28)); + /* assuming at most 2 logical CPUs per core */ + if (htt) + dprintf(4, "Found HTT feature\n"); + } struct madt_processor_apic *apic = (void*)&madt[1]; int i; for (i=0; i<MaxCountCPUs; i++) { apic->type = APIC_PROCESSOR; apic->length = sizeof(*apic); apic->processor_id = i; - apic->local_apic_id = i; + if (htt) { + /* + * In a system with 2 packages, 4 cores per package, and 2 CPUs per + * core we want to achieve the following coupling: + * CPU# APIC ID + * 0 0 [first socket, first logical CPUs] + * 1 2 + * 2 4 + * 3 6 + * 4 8 [second socket, first logical CPUs] + * 5 10 + * 6 12 + * 7 14 + * 8 1 [first socket, second logical CPUs] + * 9 3 + * 10 5 + * 11 7 + * 12 9 [second socket, second logical CPUs] + * 13 11 + * 14 13 + * 15 15 + * where the least-significant bit of the APIC ID identifies the + * first (0) or second (1) logical CPU in a core. + */ + apic->local_apic_id = i * 2; + if (apic->local_apic_id >= MaxCountCPUs) + apic->local_apic_id -= MaxCountCPUs - 1; + } else { + apic->local_apic_id = i; + } if (apic_id_is_present(apic->local_apic_id)) apic->flags = cpu_to_le32(1); else -- 2.7.4

5 11

Dealing with fallback and normal coreboot images
by Paul Menzel 30 Jan '17

30 Jan '17

Dear SeaBIOS folks, coreboot allows to prefix images to add different romstage, ramstage, and payloads, and depending on the behavior during boot, choose a certain one. Commonly *normal* and *fallback* are used as prefixes, while the bootblock code loads the *normal* image first, but if there is a failure, commonly after three tries, boots the fallback image. SeaBIOS takes runtime configuration values always from `etc/`. That way, only one configuration can be used for different coreboot builds. What could be a solution for that problem? Also allow `fallback/etc/`, and `normal/etc`? Kind regards, Paul

2 1

[PATCH] vgasrc: Increase debug level
by Paul Menzel 30 Jan '17

30 Jan '17

Date: Fri, 20 Jan 2017 16:52:44 +0100 You only want this information for debugging. As it also slows down the boot considerably, as, for example, for every character of the GRUB menu, something is sent over the serial console. Therefore, increase the debugging level to 9. Signed-off-by: Paul Menzel <pmenzel(a)molgen.mpg.de> --- vgasrc/vgabios.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/vgasrc/vgabios.h b/vgasrc/vgabios.h index 3d5bbfe..e2edec0 100644 --- a/vgasrc/vgabios.h +++ b/vgasrc/vgabios.h @@ -73,7 +73,7 @@ static inline int vga_emulate_text(void) { // Debug settings #define DEBUG_VGA_POST 1 -#define DEBUG_VGA_10 3 +#define DEBUG_VGA_10 9 // vgabios.c int vga_bpp(struct vgamode_s *vmode_g); -- 2.7.4

2 1

[PATCH v2 0/2] QEMU: Add capability to write back fw_cfg address to QEMU
by ben＠skyportsystems.com 27 Jan '17

27 Jan '17

From: Ben Warren <ben(a)skyportsystems.com> This patch set adds the capability to write to QEMU across the DMA link and adds a higher-level command to allocate a fw_cfg file and write its address back to another, writeable fw_cfg file. The initial use case is for Windows VM Generation ID, where QEMU needs to change the contents of fw_cfg data at runtime, while still having BIOS allocate and manage the memory. v1->v2: separated patch into two functional units changed so writes only occur over the DMA interface fixed coding style removed change to romfile struct definition (removed new write_back method) Ben Warren (2): QEMU DMA: Add DMA write capability QEMU fw_cfg: Add command to write back address of file src/fw/paravirt.c | 49 +++++++++++++++++++++++++++++++++++++++++++++++++ src/fw/paravirt.h | 3 +++ src/fw/romfile_loader.c | 38 ++++++++++++++++++++++++++++++++++++++ src/fw/romfile_loader.h | 23 ++++++++++++++++++++--- 4 files changed, 110 insertions(+), 3 deletions(-) -- 2.7.4

3 5

Re: [SeaBIOS] [PATCH] QEMU DMA: Add ability to write back to fw_cfg file
by Kevin O'Connor 23 Jan '17

23 Jan '17

On Thu, Jan 19, 2017 at 10:20:50PM -0800, ben(a)skyportsystems.com wrote: > From: Ben Warren <ben(a)skyportsystems.com> > > This adds a new command to the DMA protocol. The command allows the > memory allocation of a fw_cfg file by BIOS and subsequent return of > the allocated address to QEMU. The initial use case is for Windows VM > Generation ID, where QEMU needs to change the contents of fw_cfg > data at runtime, while still having BIOS allocate and manage the memory. Thanks - see my comments below. [...] > --- a/src/fw/paravirt.c > +++ b/src/fw/paravirt.c > @@ -253,6 +253,20 @@ qemu_cfg_read(void *buf, int len) > } > > static void > +qemu_cfg_write(void *buf, int len) > +{ > + if (len == 0) { > + return; > + } > + > + if (qemu_cfg_dma_enabled()) { > + qemu_cfg_dma_transfer(buf, len, QEMU_CFG_DMA_CTL_WRITE); > + } else { > + outsb(PORT_QEMU_CFG_DATA, buf, len); > + } > +} > + > +static void > qemu_cfg_skip(int len) > { > if (len == 0) { > @@ -280,6 +294,19 @@ qemu_cfg_read_entry(void *buf, int e, int len) > } > } > > +static void > +qemu_cfg_write_entry(void *buf, int e, int len) > +{ > + if (qemu_cfg_dma_enabled()) { > + u32 control = (e << 16) | QEMU_CFG_DMA_CTL_SELECT > + | QEMU_CFG_DMA_CTL_WRITE; > + qemu_cfg_dma_transfer(buf, len, control); > + } else { > + qemu_cfg_select(e); > + qemu_cfg_write(buf, len); > + } > +} > + > struct qemu_romfile_s { > struct romfile_s file; > int select, skip; > @@ -303,6 +330,24 @@ qemu_cfg_read_file(struct romfile_s *file, void *dst, u32 maxlen) > return file->size; > } > > +static int > +qemu_cfg_write_file(void *src, struct romfile_s *file, u32 maxlen) > +{ > + if (file->size < maxlen) > + return -1; > + struct qemu_romfile_s *qfile; > + qfile = container_of(file, struct qemu_romfile_s, file); > + if (qfile->skip == 0) { > + /* Do it in one transfer */ > + qemu_cfg_write_entry(src, qfile->select, file->size); > + } else { > + qemu_cfg_select(qfile->select); > + qemu_cfg_skip(qfile->skip); > + qemu_cfg_write(src, file->size); > + } > + return file->size; > +} I'd prefer if we could break this patch into two parts - one part to add the write interface to fw_cfg and one part to add ALLOCATE_RET_ADDR. I'm fine with both interfaces, but the QEMU parts still need to be committed prior to committing to SeaBIOS. Having the patch in separate parts will make it both easier to review and commit at their appropriate times. > + > static void > qemu_romfile_add(char *name, int select, int skip, int size) > { > @@ -317,6 +362,7 @@ qemu_romfile_add(char *name, int select, int skip, int size) > qfile->select = select; > qfile->skip = skip; > qfile->file.copy = qemu_cfg_read_file; > + qfile->file.write_back = qemu_cfg_write_file; > romfile_add(&qfile->file); > } I don't think it is worthwhile to extend the romfile mechanism with a write_back() method. Instead, I'd export qemu_cfg_write_file(), extend it to verify the passed in romfile is a fw_cfg file (file->copy == qemu_cfg_read_file), and change the callers to call it directly. > > diff --git a/src/fw/paravirt.h b/src/fw/paravirt.h > index d8eb7c4..479eaf9 100644 > --- a/src/fw/paravirt.h > +++ b/src/fw/paravirt.h > @@ -43,6 +43,7 @@ static inline int runningOnKVM(void) { > #define QEMU_CFG_DMA_CTL_READ 0x02 > #define QEMU_CFG_DMA_CTL_SKIP 0x04 > #define QEMU_CFG_DMA_CTL_SELECT 0x08 > +#define QEMU_CFG_DMA_CTL_WRITE 0x10 > > // QEMU_CFG_DMA ID bit > #define QEMU_CFG_VERSION_DMA 2 > diff --git a/src/fw/romfile_loader.c b/src/fw/romfile_loader.c > index f4b17ff..945572f 100644 > --- a/src/fw/romfile_loader.c > +++ b/src/fw/romfile_loader.c > @@ -127,6 +127,38 @@ err: > warn_internalerror(); > } > > +static void romfile_loader_return_addr(struct romfile_loader_entry_s *entry, > + struct romfile_loader_files *files) > +{ > + struct romfile_loader_file *alloc_file; > + struct romfile_loader_file *addr_file; > + u64 addr; > + int ret; > + > + alloc_file = romfile_loader_find(entry->alloc_ret_file, files); > + addr_file = romfile_loader_find(entry->alloc_ret_addr_file, files); > + > + if (!alloc_file || !addr_file || !alloc_file->data || !addr_file->data || > + addr_file->file->size < sizeof(addr)) > + goto err; > + > + /* Get the address of the just-allocated file > + * and stuff it in the address file */ > + memcpy(&addr, &alloc_file->data, sizeof(addr)); > + addr = cpu_to_le64(addr); > + memcpy(addr_file->data, &addr, sizeof(addr)); > + > + if (!addr_file->file->write_back) > + goto err; > + > + ret = addr_file->file->write_back(&addr, addr_file->file, sizeof(addr)); > + if (ret != sizeof(addr)) > + goto err; > + return; > +err: > + warn_internalerror(); > +} > + > int romfile_loader_execute(const char *name) > { > struct romfile_loader_entry_s *entry; > @@ -161,6 +193,11 @@ int romfile_loader_execute(const char *name) > break; > case ROMFILE_LOADER_COMMAND_ADD_CHECKSUM: > romfile_loader_add_checksum(entry, files); > + break; > + case ROMFILE_LOADER_COMMAND_ALLOCATE_RET_ADDR: > + romfile_loader_allocate(entry, files); > + romfile_loader_return_addr(entry, files); > + break; > default: > /* Skip commands that we don't recognize. */ > break; > diff --git a/src/fw/romfile_loader.h b/src/fw/romfile_loader.h > index 15eab2a..ea161e8 100644 > --- a/src/fw/romfile_loader.h > +++ b/src/fw/romfile_loader.h > @@ -51,15 +51,32 @@ struct romfile_loader_entry_s { > u32 cksum_length; > }; > > + /* > + * COMMAND_ALLOCATE_RETURN_ADDR - allocate a table from @alloc_file > + * subject to @alloc_ret_align alignment (must be power of 2) > + * and @alloc_ret_zone (can be HIGH or FSEG) requirements. > + * Additionally, return the address of the allocation in > + * @addr_file. > + * > + * This may be used instead of COMMAND_ALLOCATE Minor nit - a tab snuck in here. > + */ > + struct { > + char alloc_ret_file[ROMFILE_LOADER_FILESZ]; > + u32 alloc_ret_align; > + u8 alloc_ret_zone; > + char alloc_ret_addr_file[ROMFILE_LOADER_FILESZ]; > + }; > + > /* padding */ > char pad[124]; > }; > }; > > enum { > - ROMFILE_LOADER_COMMAND_ALLOCATE = 0x1, > - ROMFILE_LOADER_COMMAND_ADD_POINTER = 0x2, > - ROMFILE_LOADER_COMMAND_ADD_CHECKSUM = 0x3, > + ROMFILE_LOADER_COMMAND_ALLOCATE = 0x1, > + ROMFILE_LOADER_COMMAND_ADD_POINTER = 0x2, > + ROMFILE_LOADER_COMMAND_ADD_CHECKSUM = 0x3, > + ROMFILE_LOADER_COMMAND_ALLOCATE_RET_ADDR = 0x4, > }; > > enum { > diff --git a/src/romfile.h b/src/romfile.h > index c6d62a1..8694cc1 100644 > --- a/src/romfile.h > +++ b/src/romfile.h > @@ -9,6 +9,7 @@ struct romfile_s { > char name[128]; > u32 size; > int (*copy)(struct romfile_s *file, void *dest, u32 maxlen); > + int (*write_back)(void *src, struct romfile_s *file, u32 maxlen); > }; > void romfile_add(struct romfile_s *file); > struct romfile_s *romfile_findprefix(const char *prefix, struct romfile_s *prev); -Kevin

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Re: [SeaBIOS] [PATCH] block: add NVMe boot support
by Stecklina, Julian 23 Jan '17

23 Jan '17

Kevin, On Jan 21, 2017 09:32, Kevin O'Connor <kevin(a)koconnor.net> wrote: The copyright would need to say the file is licensed under the LGPLv3. Preference would be to use what the other files have: // This file may be distributed under the terms of the GNU LGPLv3 license. I'll post an updated version. If you have any other comments, I'd be glad to address them as well. Julian

1 0

[PATCH] QEMU DMA: Add ability to write back to fw_cfg file
by ben＠skyportsystems.com 20 Jan '17

20 Jan '17

From: Ben Warren <ben(a)skyportsystems.com> This adds a new command to the DMA protocol. The command allows the memory allocation of a fw_cfg file by BIOS and subsequent return of the allocated address to QEMU. The initial use case is for Windows VM Generation ID, where QEMU needs to change the contents of fw_cfg data at runtime, while still having BIOS allocate and manage the memory. Signed-off-by: Ben Warren <ben(a)skyportsystems.com> --- src/fw/paravirt.c | 46 ++++++++++++++++++++++++++++++++++++++++++++++ src/fw/paravirt.h | 1 + src/fw/romfile_loader.c | 37 +++++++++++++++++++++++++++++++++++++ src/fw/romfile_loader.h | 23 ++++++++++++++++++++--- src/romfile.h | 1 + 5 files changed, 105 insertions(+), 3 deletions(-) diff --git a/src/fw/paravirt.c b/src/fw/paravirt.c index 6de70f6..f7bf422 100644 --- a/src/fw/paravirt.c +++ b/src/fw/paravirt.c @@ -253,6 +253,20 @@ qemu_cfg_read(void *buf, int len) } static void +qemu_cfg_write(void *buf, int len) +{ + if (len == 0) { + return; + } + + if (qemu_cfg_dma_enabled()) { + qemu_cfg_dma_transfer(buf, len, QEMU_CFG_DMA_CTL_WRITE); + } else { + outsb(PORT_QEMU_CFG_DATA, buf, len); + } +} + +static void qemu_cfg_skip(int len) { if (len == 0) { @@ -280,6 +294,19 @@ qemu_cfg_read_entry(void *buf, int e, int len) } } +static void +qemu_cfg_write_entry(void *buf, int e, int len) +{ + if (qemu_cfg_dma_enabled()) { + u32 control = (e << 16) | QEMU_CFG_DMA_CTL_SELECT + | QEMU_CFG_DMA_CTL_WRITE; + qemu_cfg_dma_transfer(buf, len, control); + } else { + qemu_cfg_select(e); + qemu_cfg_write(buf, len); + } +} + struct qemu_romfile_s { struct romfile_s file; int select, skip; @@ -303,6 +330,24 @@ qemu_cfg_read_file(struct romfile_s *file, void *dst, u32 maxlen) return file->size; } +static int +qemu_cfg_write_file(void *src, struct romfile_s *file, u32 maxlen) +{ + if (file->size < maxlen) + return -1; + struct qemu_romfile_s *qfile; + qfile = container_of(file, struct qemu_romfile_s, file); + if (qfile->skip == 0) { + /* Do it in one transfer */ + qemu_cfg_write_entry(src, qfile->select, file->size); + } else { + qemu_cfg_select(qfile->select); + qemu_cfg_skip(qfile->skip); + qemu_cfg_write(src, file->size); + } + return file->size; +} + static void qemu_romfile_add(char *name, int select, int skip, int size) { @@ -317,6 +362,7 @@ qemu_romfile_add(char *name, int select, int skip, int size) qfile->select = select; qfile->skip = skip; qfile->file.copy = qemu_cfg_read_file; + qfile->file.write_back = qemu_cfg_write_file; romfile_add(&qfile->file); } diff --git a/src/fw/paravirt.h b/src/fw/paravirt.h index d8eb7c4..479eaf9 100644 --- a/src/fw/paravirt.h +++ b/src/fw/paravirt.h @@ -43,6 +43,7 @@ static inline int runningOnKVM(void) { #define QEMU_CFG_DMA_CTL_READ 0x02 #define QEMU_CFG_DMA_CTL_SKIP 0x04 #define QEMU_CFG_DMA_CTL_SELECT 0x08 +#define QEMU_CFG_DMA_CTL_WRITE 0x10 // QEMU_CFG_DMA ID bit #define QEMU_CFG_VERSION_DMA 2 diff --git a/src/fw/romfile_loader.c b/src/fw/romfile_loader.c index f4b17ff..945572f 100644 --- a/src/fw/romfile_loader.c +++ b/src/fw/romfile_loader.c @@ -127,6 +127,38 @@ err: warn_internalerror(); } +static void romfile_loader_return_addr(struct romfile_loader_entry_s *entry, + struct romfile_loader_files *files) +{ + struct romfile_loader_file *alloc_file; + struct romfile_loader_file *addr_file; + u64 addr; + int ret; + + alloc_file = romfile_loader_find(entry->alloc_ret_file, files); + addr_file = romfile_loader_find(entry->alloc_ret_addr_file, files); + + if (!alloc_file || !addr_file || !alloc_file->data || !addr_file->data || + addr_file->file->size < sizeof(addr)) + goto err; + + /* Get the address of the just-allocated file + * and stuff it in the address file */ + memcpy(&addr, &alloc_file->data, sizeof(addr)); + addr = cpu_to_le64(addr); + memcpy(addr_file->data, &addr, sizeof(addr)); + + if (!addr_file->file->write_back) + goto err; + + ret = addr_file->file->write_back(&addr, addr_file->file, sizeof(addr)); + if (ret != sizeof(addr)) + goto err; + return; +err: + warn_internalerror(); +} + int romfile_loader_execute(const char *name) { struct romfile_loader_entry_s *entry; @@ -161,6 +193,11 @@ int romfile_loader_execute(const char *name) break; case ROMFILE_LOADER_COMMAND_ADD_CHECKSUM: romfile_loader_add_checksum(entry, files); + break; + case ROMFILE_LOADER_COMMAND_ALLOCATE_RET_ADDR: + romfile_loader_allocate(entry, files); + romfile_loader_return_addr(entry, files); + break; default: /* Skip commands that we don't recognize. */ break; diff --git a/src/fw/romfile_loader.h b/src/fw/romfile_loader.h index 15eab2a..ea161e8 100644 --- a/src/fw/romfile_loader.h +++ b/src/fw/romfile_loader.h @@ -51,15 +51,32 @@ struct romfile_loader_entry_s { u32 cksum_length; }; + /* + * COMMAND_ALLOCATE_RETURN_ADDR - allocate a table from @alloc_file + * subject to @alloc_ret_align alignment (must be power of 2) + * and @alloc_ret_zone (can be HIGH or FSEG) requirements. + * Additionally, return the address of the allocation in + * @addr_file. + * + * This may be used instead of COMMAND_ALLOCATE + */ + struct { + char alloc_ret_file[ROMFILE_LOADER_FILESZ]; + u32 alloc_ret_align; + u8 alloc_ret_zone; + char alloc_ret_addr_file[ROMFILE_LOADER_FILESZ]; + }; + /* padding */ char pad[124]; }; }; enum { - ROMFILE_LOADER_COMMAND_ALLOCATE = 0x1, - ROMFILE_LOADER_COMMAND_ADD_POINTER = 0x2, - ROMFILE_LOADER_COMMAND_ADD_CHECKSUM = 0x3, + ROMFILE_LOADER_COMMAND_ALLOCATE = 0x1, + ROMFILE_LOADER_COMMAND_ADD_POINTER = 0x2, + ROMFILE_LOADER_COMMAND_ADD_CHECKSUM = 0x3, + ROMFILE_LOADER_COMMAND_ALLOCATE_RET_ADDR = 0x4, }; enum { diff --git a/src/romfile.h b/src/romfile.h index c6d62a1..8694cc1 100644 --- a/src/romfile.h +++ b/src/romfile.h @@ -9,6 +9,7 @@ struct romfile_s { char name[128]; u32 size; int (*copy)(struct romfile_s *file, void *dest, u32 maxlen); + int (*write_back)(void *src, struct romfile_s *file, u32 maxlen); }; void romfile_add(struct romfile_s *file); struct romfile_s *romfile_findprefix(const char *prefix, struct romfile_s *prev); -- 2.10.1 (Apple Git-78)

1 0

[PATCH] ahci: Set upper 32-bit registers to zero
by Ladi Prosek 18 Jan '17

18 Jan '17

If the HBA supports 64-bit addressing, the registers may contain non-zero values, for example after reboot as a leftover from the OS driving the adapter. Signed-off-by: Ladi Prosek <lprosek(a)redhat.com> --- src/hw/ahci.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/hw/ahci.c b/src/hw/ahci.c index 261a7d2..2eee192 100644 --- a/src/hw/ahci.c +++ b/src/hw/ahci.c @@ -361,6 +361,11 @@ ahci_port_alloc(struct ahci_ctrl_s *ctrl, u32 pnr) ahci_port_writel(ctrl, pnr, PORT_LST_ADDR, (u32)port->list); ahci_port_writel(ctrl, pnr, PORT_FIS_ADDR, (u32)port->fis); + if (ctrl->caps & HOST_CAP_64) { + ahci_port_writel(ctrl, pnr, PORT_LST_ADDR_HI, 0); + ahci_port_writel(ctrl, pnr, PORT_FIS_ADDR_HI, 0); + } + return port; } -- 2.7.4

3 2

Re: [SeaBIOS] USB timeout on ALIX.2C2 (CS5536)
by Kevin O'Connor 13 Jan '17

13 Jan '17

On Thu, Jan 12, 2017 at 04:53:32PM +0200, Евгени Димитров wrote: > On Thu, Jan 12, 2017 at 4:45 PM, Kevin O'Connor <kevin(a)koconnor.net> wrote: > > The additional debugging reports the controller is running and not > > reporting an error (which is in addition to the transfer descriptor > > reporting that it is also running without error). I'm not sure what > > is going on. Can you try disabling CONFIG_MALLOC_UPPERMEMORY and > > retry? > > That did it. Do you think it's safe to just leave this option off? Yes, it's safe. Some chipsets wont do DMA to the memory region between 0xc0000-0x100000. It looks like you have one of those boards. This can also be specified in the coreboot build - see src/mainboard/intel/mohonpeak/config_seabios and src/mainboard/intel/mohonpeak/Kconfig for an example of how to do that. -Kevin

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