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[RFC PATCH 5/9] acpi_piix4: Implement memory device hotplug registers
by Vasilis Liaskovitis 19 Apr '12

19 Apr '12

A 32-byte register is used to present up to 256 hotplug-able memory devices to BIOS and OSPM. Hot-add and hot-remove functions trigger an ACPI hotplug event through these. Only reads are allowed from these registers (from BIOS/OSPM perspective). "memslot id add" will immediately populate the new memslot (a new MemoryRegion is created and attached to system memory), and then trigger the ACPI hot-add event. "memslot id delete" triggers the ACPI hot-remove event but needs to wait for OSPM to eject the device. We use a second set of eject registers to know when OSPM has called the _EJ function for a particular memslot. A write to these will depopulate the corresponding memslot i.e. detach and free the MemoryRegion. Only writes to the eject registers are allowed. A new property mem_acpi_hotplug should enable these memory hotplug registers for future machine types (not yet implemented in this version). Signed-off-by: Vasilis Liaskovitis <vasilis.liaskovitis(a)profitbricks.com> --- hw/acpi_piix4.c | 93 ++++++++++++++++++++++++++++++++++++++++++++++++++++-- 1 files changed, 89 insertions(+), 4 deletions(-) diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index 797ed24..a14dd3c 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -27,6 +27,8 @@ #include "sysemu.h" #include "range.h" #include "ioport.h" +#include "sysbus.h" +#include "memslot.h" //#define DEBUG @@ -43,9 +45,16 @@ #define PCI_BASE 0xae00 #define PCI_EJ_BASE 0xae08 #define PCI_RMV_BASE 0xae0c +#define MEM_BASE 0xaf20 +#define MEM_EJ_BASE 0xaf40 +#define PIIX4_MEM_HOTPLUG_STATUS 8 #define PIIX4_PCI_HOTPLUG_STATUS 2 +struct gpe_regs { + uint8_t mems_sts[32]; +}; + struct pci_status { uint32_t up; uint32_t down; @@ -66,6 +75,7 @@ typedef struct PIIX4PMState { int kvm_enabled; Notifier machine_ready; + struct gpe_regs gpe; /* for pci hotplug */ struct pci_status pci0_status; uint32_t pci0_hotplug_enable; @@ -86,8 +96,8 @@ static void pm_update_sci(PIIX4PMState *s) ACPI_BITMASK_POWER_BUTTON_ENABLE | ACPI_BITMASK_GLOBAL_LOCK_ENABLE | ACPI_BITMASK_TIMER_ENABLE)) != 0) || - (((s->ar.gpe.sts[0] & s->ar.gpe.en[0]) - & PIIX4_PCI_HOTPLUG_STATUS) != 0); + (((s->ar.gpe.sts[0] & s->ar.gpe.en[0]) & + (PIIX4_PCI_HOTPLUG_STATUS | PIIX4_MEM_HOTPLUG_STATUS)) != 0); qemu_set_irq(s->irq, sci_level); /* schedule a timer interruption if needed */ @@ -432,17 +442,34 @@ type_init(piix4_pm_register_types) static uint32_t gpe_readb(void *opaque, uint32_t addr) { PIIX4PMState *s = opaque; - uint32_t val = acpi_gpe_ioport_readb(&s->ar, addr); + uint32_t val = 0; + struct gpe_regs *g = &s->gpe; + + switch (addr) { + case MEM_BASE ... MEM_BASE+31: + val = g->mems_sts[addr - MEM_BASE]; + break; + default: + val = acpi_gpe_ioport_readb(&s->ar, addr); + } PIIX4_DPRINTF("gpe read %x == %x\n", addr, val); return val; } +static void piix4_memslot_eject(uint32_t addr, uint32_t val); + static void gpe_writeb(void *opaque, uint32_t addr, uint32_t val) { PIIX4PMState *s = opaque; - acpi_gpe_ioport_writeb(&s->ar, addr, val); + switch (addr) { + case MEM_EJ_BASE ... MEM_EJ_BASE+31: + piix4_memslot_eject(addr, val); + break; + default: + acpi_gpe_ioport_writeb(&s->ar, addr, val); + } pm_update_sci(s); PIIX4_DPRINTF("gpe write %x <== %d\n", addr, val); @@ -521,9 +548,12 @@ static void pcirmv_write(void *opaque, uint32_t addr, uint32_t val) static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev, PCIHotplugState state); +static int piix4_memslot_hotplug(DeviceState *qdev, SysBusDevice *dev, int add); + static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s) { struct pci_status *pci0_status = &s->pci0_status; + int i = 0; register_ioport_write(GPE_BASE, GPE_LEN, 1, gpe_writeb, s); register_ioport_read(GPE_BASE, GPE_LEN, 1, gpe_readb, s); @@ -538,6 +568,13 @@ static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s) register_ioport_write(PCI_RMV_BASE, 4, 4, pcirmv_write, s); register_ioport_read(PCI_RMV_BASE, 4, 4, pcirmv_read, s); + register_ioport_read(MEM_BASE, 32, 1, gpe_readb, s); + register_ioport_write(MEM_EJ_BASE, 32, 1, gpe_writeb, s); + for(i = 0; i < 32; i++) { + s->gpe.mems_sts[i] = 0; + } + memslot_register_hotplug(piix4_memslot_hotplug, &s->dev.qdev); + pci_bus_hotplug(bus, piix4_device_hotplug, &s->dev.qdev); } @@ -553,6 +590,54 @@ static void disable_device(PIIX4PMState *s, int slot) s->pci0_status.down |= (1 << slot); } +static void enable_mem_device(PIIX4PMState *s, int memdevice) +{ + struct gpe_regs *g = &s->gpe; + s->ar.gpe.sts[0] |= PIIX4_MEM_HOTPLUG_STATUS; + g->mems_sts[memdevice/8] |= (1 << (memdevice%8)); +} + +static void disable_mem_device(PIIX4PMState *s, int memdevice) +{ + struct gpe_regs *g = &s->gpe; + s->ar.gpe.sts[0] |= PIIX4_MEM_HOTPLUG_STATUS; + g->mems_sts[memdevice/8] &= ~(1 << (memdevice%8)); +} + +static void piix4_memslot_eject(uint32_t addr, uint32_t val) +{ + uint32_t start = 8 * (addr - MEM_EJ_BASE); + uint32_t idx = 0; + MemSlotState *s; + PIIX4_DPRINTF("memej write %x <= %d\n", addr, val); + while (val) { + if (val & 1) { + s = memslot_find_from_idx(start + idx); + assert(s != NULL); + memslot_depopulate(s); + } + val = val >> 1; + idx++; + } +} + +static int piix4_memslot_hotplug(DeviceState *qdev, SysBusDevice *dev, int + add) +{ + PIIX4PMState *s = DO_UPCAST(PIIX4PMState, dev, + PCI_DEVICE(qdev)); + MemSlotState *slot = MEMSLOT(dev); + + if (add) { + enable_mem_device(s, slot->idx); + } + else { + disable_mem_device(s, slot->idx); + } + pm_update_sci(s); + return 0; +} + static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev, PCIHotplugState state) { -- 1.7.9

1 0

[RFC PATCH 4/9] Implement memslot device abstraction
by Vasilis Liaskovitis 19 Apr '12

19 Apr '12

Each hotplug-able memory slot is a SysBusDevice. All memslots are initially unpopulated. A hot-add operation for a particular memory slot creates a new MemoryRegion of the given physical address offset, size and node proximity, and attaches it to main system memory as a sub_region. A hot-remove operation detaches and frees the MemoryRegion from system memory. This is an early prototype and lacks proper qdev integration: a separate hotplug mechanism/side-channel is used and main system bus hotplug capability is ignored. Signed-off-by: Vasilis Liaskovitis <vasilis.liaskovitis(a)profitbricks.com> --- hw/memslot.c | 195 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ hw/memslot.h | 44 +++++++++++++ 2 files changed, 239 insertions(+), 0 deletions(-) create mode 100644 hw/memslot.c create mode 100644 hw/memslot.h diff --git a/hw/memslot.c b/hw/memslot.c new file mode 100644 index 0000000..b100824 --- /dev/null +++ b/hw/memslot.c @@ -0,0 +1,195 @@ +/* + * MemorySlot device for Memory Hotplug + * + * Copyright ProfitBricks GmbH 2012 + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see <http://www.gnu.org/licenses/> + */ + +#include "trace.h" +#include "qdev.h" +#include "memslot.h" +#include "../exec-memory.h" + +static DeviceState *memslot_hotplug_qdev; +static memslot_hotplug_fn memslot_hotplug; + +static Property memslot_properties[] = { + DEFINE_PROP_END_OF_LIST() +}; + +void memslot_populate(MemSlotState *s) +{ + char buf[32]; + MemoryRegion *new = NULL; + + sprintf(buf, "memslot%u", s->idx); + new = g_malloc(sizeof(MemoryRegion)); + memory_region_init_ram(new, buf, s->size); + vmstate_register_ram_global(new); + memory_region_add_subregion(get_system_memory(), s->start, new); + s->mr = new; + s->populated = 1; +} + +void memslot_depopulate(MemSlotState *s) +{ + assert(s); + if (s->populated) { + vmstate_unregister_ram(s->mr, NULL); + memory_region_del_subregion(get_system_memory(), s->mr); + memory_region_destroy(s->mr); + s->populated = 0; + s->mr = NULL; + } +} + +MemSlotState *memslot_create(char *id, target_phys_addr_t start, uint64_t size, + uint64_t node, uint32_t memslot_idx) +{ + DeviceState *dev; + MemSlotState *mdev; + + dev = sysbus_create_simple("memslot", -1, NULL); + dev->id = id; + + mdev = MEMSLOT(dev); + mdev->idx = memslot_idx; + mdev->start = start; + mdev->size = size; + mdev->node = node; + + return mdev; +} + +void memslot_register_hotplug(memslot_hotplug_fn hotplug, DeviceState *qdev) +{ + memslot_hotplug_qdev = qdev; + memslot_hotplug = hotplug; +} + +static MemSlotState *memslot_find(char *id) +{ + DeviceState *qdev; + qdev = qdev_find_recursive(sysbus_get_default(), id); + if (qdev) + return MEMSLOT(qdev); + return NULL; +} + +int memslot_do(Monitor *mon, const QDict *qdict) +{ + MemSlotState *slot = NULL; + + char *id = (char*) qdict_get_try_str(qdict, "id"); + if (!id) { + fprintf(stderr, "ERROR %s invalid id\n",__FUNCTION__); + return 1; + } + + slot = memslot_find(id); + + if (!slot) { + fprintf(stderr, "%s no slot %s found\n", __FUNCTION__, id); + return 1; + } + + char *action = (char*) qdict_get_try_str(qdict, "action"); + if (!action || (strcmp(action, "add") && strcmp(action, "delete"))) { + fprintf(stderr, "ERROR %s invalid action\n", __FUNCTION__); + return 1; + } + + if (!strcmp(action, "add")) { + if (slot->populated) { + fprintf(stderr, "ERROR %s slot %s already populated\n", + __FUNCTION__, id); + return 1; + } + memslot_populate(slot); + if (memslot_hotplug) + memslot_hotplug(memslot_hotplug_qdev, (SysBusDevice*)slot, 1); + } + else { + if (!slot->populated) { + fprintf(stderr, "ERROR %s slot %s is not populated\n", + __FUNCTION__, id); + return 1; + } + if (memslot_hotplug) + memslot_hotplug(memslot_hotplug_qdev, (SysBusDevice*)slot, 0); + } + return 0; +} + +MemSlotState *memslot_find_from_idx(uint32_t idx) +{ + Error *err = NULL; + DeviceState *dev; + MemSlotState *slot; + char *type; + BusState *bus = sysbus_get_default(); + QTAILQ_FOREACH(dev, &bus->children, sibling) { + type = object_property_get_str(OBJECT(dev), "type", &err); + if (err) { + error_free(err); + fprintf(stderr, "error getting device type\n"); + return NULL; + } + if (!strcmp(type, "memslot")) { + slot = MEMSLOT(dev); + if (slot->idx == idx) { + fprintf(stderr, "%s found slot with idx %u : %p\n", + __FUNCTION__, idx, slot); + return slot; + } + else + fprintf(stderr, "%s slot with idx %u != %u\n", __FUNCTION__, + slot->idx, idx); + } + } + return NULL; +} + +static int memslot_init(SysBusDevice *s) +{ + MemSlotState *slot; + slot = MEMSLOT(s); + slot->mr = NULL; + slot->populated = 0; + return 0; +} + +static void memslot_class_init(ObjectClass *klass, void *data) +{ + SysBusDeviceClass *sc = SYS_BUS_DEVICE_CLASS(klass); + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->props = memslot_properties; + sc->init = memslot_init; + memslot_hotplug = NULL; +} + +static TypeInfo memslot_info = { + .name = "memslot", + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(MemSlotState), + .class_init = memslot_class_init, +}; + +static void memslot_register_types(void) +{ + type_register_static(&memslot_info); +} + +type_init(memslot_register_types) diff --git a/hw/memslot.h b/hw/memslot.h new file mode 100644 index 0000000..9412667 --- /dev/null +++ b/hw/memslot.h @@ -0,0 +1,44 @@ +#ifndef QEMU_MEM_H +#define QEMU_MEM_H + +#include "qemu-common.h" +#include "memory.h" +#include "sysbus.h" + +#define TYPE_MEMSLOT "memslot" +#define MEMSLOT(obj) \ + OBJECT_CHECK(MemSlotState, (obj), TYPE_MEMSLOT) +#define MEMSLOT_CLASS(klass) \ + OBJECT_CLASS_CHECK(MemSlotClass, (obj), TYPE_MEMSLOT) +#define MEMSLOT_GET_CLASS(obj) \ + OBJECT_GET_CLASS(MemSlotClass, (obj), TYPE_MEMSLOT) + +typedef struct MemSlotState { + SysBusDevice busdev; + uint32_t populated; /* 1 means device has been hotplugged. Default is 0. */ + uint32_t idx; /* index in memory hotplug register/bitmap */ + uint64_t start; /* starting physical address */ + uint64_t size; + uint32_t node; /* numa node proximity */ + MemoryRegion *mr; /* MemoryRegion for this slot. !NULL only if populated */ +} MemSlotState; + +typedef struct MemSlotClass +{ + SysBusDeviceClass parent_class; + void (*set)(MemSlotState *s, MemoryRegion *mem); +} MemSlotClass; + +/* mem.c */ + +typedef int (*memslot_hotplug_fn)(DeviceState *qdev, SysBusDevice *dev, int add); + +MemSlotState *memslot_create(char *id, target_phys_addr_t start, uint64_t size, + uint64_t node, uint32_t memslot_idx); +void memslot_populate(MemSlotState *s); +void memslot_depopulate(MemSlotState *s); +int memslot_do(Monitor *mon, const QDict *qdict); +MemSlotState *memslot_find_from_idx(uint32_t idx); +void memslot_register_hotplug(memslot_hotplug_fn hotplug, DeviceState *qdev); + +#endif -- 1.7.9

1 0

[RFC PATCH 3/9] acpi: generate hotplug memory devices.
by Vasilis Liaskovitis 19 Apr '12

19 Apr '12

The memory device generation is guided by qemu paravirt info. Seabios first uses the info to setup SRAT entries for the hotplug-able memory slots. Afterwards, build_memssdt uses the created SRAT entries to generate appropriate memory device objects. One memory device (and corresponding SRAT entry) is generated for each hotplug-able qemu memslot. Currently no SSDT memory device is created for initial system memory (the method can be generalized to all memory though). Signed-off-by: Vasilis Liaskovitis <vasilis.liaskovitis(a)profitbricks.com> --- src/acpi.c | 151 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-- 1 files changed, 147 insertions(+), 4 deletions(-) diff --git a/src/acpi.c b/src/acpi.c index 30888b9..5580099 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -484,6 +484,131 @@ build_ssdt(void) return ssdt; } +static unsigned char ssdt_mem[] = { + 0x5b,0x82,0x47,0x07,0x4d,0x50,0x41,0x41, + 0x08,0x49,0x44,0x5f,0x5f,0x0a,0xaa,0x08, + 0x5f,0x48,0x49,0x44,0x0c,0x41,0xd0,0x0c, + 0x80,0x08,0x5f,0x50,0x58,0x4d,0x0a,0xaa, + 0x08,0x5f,0x43,0x52,0x53,0x11,0x33,0x0a, + 0x30,0x8a,0x2b,0x00,0x00,0x0d,0x03,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xef, + 0xbe,0xad,0xde,0x00,0x00,0x00,0x00,0xee, + 0xbe,0xad,0xe6,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x08,0x00,0x00,0x00,0x00,0x79, + 0x00,0x14,0x0f,0x5f,0x53,0x54,0x41,0x00, + 0xa4,0x43,0x4d,0x53,0x54,0x49,0x44,0x5f, + 0x5f,0x14,0x0f,0x5f,0x45,0x4a,0x30,0x01, + 0x4d,0x50,0x45,0x4a,0x49,0x44,0x5f,0x5f, + 0x68 +}; + +#define SD_OFFSET_MEMHEX 6 +#define SD_OFFSET_MEMID 14 +#define SD_OFFSET_PXMID 31 +#define SD_OFFSET_MEMSTART 55 +#define SD_OFFSET_MEMEND 63 +#define SD_OFFSET_MEMSIZE 79 + +u64 nb_hp_memslots = 0; +struct srat_memory_affinity *mem; + +static void build_memdev(u8 *ssdt_ptr, int i, u64 mem_base, u64 mem_len, u8 node) +{ + memcpy(ssdt_ptr, ssdt_mem, sizeof(ssdt_mem)); + ssdt_ptr[SD_OFFSET_MEMHEX] = getHex(i >> 4); + ssdt_ptr[SD_OFFSET_MEMHEX+1] = getHex(i); + ssdt_ptr[SD_OFFSET_MEMID] = i; + ssdt_ptr[SD_OFFSET_PXMID] = node; + *(u64*)(ssdt_ptr + SD_OFFSET_MEMSTART) = mem_base; + *(u64*)(ssdt_ptr + SD_OFFSET_MEMEND) = mem_base + mem_len; + *(u64*)(ssdt_ptr + SD_OFFSET_MEMSIZE) = mem_len; +} + +static void* +build_memssdt(void) +{ + u64 mem_base; + u64 mem_len; + u8 node; + int i; + struct srat_memory_affinity *entry = mem; + u64 nb_memdevs = nb_hp_memslots; + + int length = ((1+3+4) + + (nb_memdevs * sizeof(ssdt_mem)) + + (1+2+5+(12*nb_memdevs)) + + (6+2+1+(1*nb_memdevs))); + u8 *ssdt = malloc_high(sizeof(struct acpi_table_header) + length); + if (! ssdt) { + warn_noalloc(); + return NULL; + } + u8 *ssdt_ptr = ssdt + sizeof(struct acpi_table_header); + + // build Scope(_SB_) header + *(ssdt_ptr++) = 0x10; // ScopeOp + ssdt_ptr = encodeLen(ssdt_ptr, length-1, 3); + *(ssdt_ptr++) = '_'; + *(ssdt_ptr++) = 'S'; + *(ssdt_ptr++) = 'B'; + *(ssdt_ptr++) = '_'; + + for (i = 0; i < nb_memdevs; i++) { + mem_base = (((u64)(entry->base_addr_high) << 32 )| entry->base_addr_low); + mem_len = (((u64)(entry->length_high) << 32 )| entry->length_low); + node = entry->proximity[0]; + build_memdev(ssdt_ptr, i, mem_base, mem_len, node); + ssdt_ptr += sizeof(ssdt_mem); + entry++; + } + + // build "Method(MTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CM00, Arg1)} ...}" + *(ssdt_ptr++) = 0x14; // MethodOp + ssdt_ptr = encodeLen(ssdt_ptr, 2+5+(12*nb_memdevs), 2); + *(ssdt_ptr++) = 'M'; + *(ssdt_ptr++) = 'T'; + *(ssdt_ptr++) = 'F'; + *(ssdt_ptr++) = 'Y'; + *(ssdt_ptr++) = 0x02; + for (i=0; i<nb_memdevs; i++) { + *(ssdt_ptr++) = 0xA0; // IfOp + ssdt_ptr = encodeLen(ssdt_ptr, 11, 1); + *(ssdt_ptr++) = 0x93; // LEqualOp + *(ssdt_ptr++) = 0x68; // Arg0Op + *(ssdt_ptr++) = 0x0A; // BytePrefix + *(ssdt_ptr++) = i; + *(ssdt_ptr++) = 0x86; // NotifyOp + *(ssdt_ptr++) = 'M'; + *(ssdt_ptr++) = 'P'; + *(ssdt_ptr++) = getHex(i >> 4); + *(ssdt_ptr++) = getHex(i); + *(ssdt_ptr++) = 0x69; // Arg1Op + } + + // build "Name(MEON, Package() { One, One, ..., Zero, Zero, ... })" + *(ssdt_ptr++) = 0x08; // NameOp + *(ssdt_ptr++) = 'M'; + *(ssdt_ptr++) = 'E'; + *(ssdt_ptr++) = 'O'; + *(ssdt_ptr++) = 'N'; + *(ssdt_ptr++) = 0x12; // PackageOp + ssdt_ptr = encodeLen(ssdt_ptr, 2+1+(1*nb_memdevs), 2); + *(ssdt_ptr++) = nb_memdevs; + + entry = mem; + + for (i = 0; i < nb_memdevs; i++) { + mem_base = (((u64)(entry->base_addr_high) << 32 )| entry->base_addr_low); + mem_len = (((u64)(entry->length_high) << 32 )| entry->length_low); + *(ssdt_ptr++) = 0x00; + entry++; + } + build_header((void*)ssdt, SSDT_SIGNATURE, ssdt_ptr - ssdt, 1); + + return ssdt; +} + #include "ssdt-pcihp.hex" #define PCI_RMV_BASE 0xae0c @@ -580,18 +705,21 @@ build_srat(void) if (nb_numa_nodes == 0) return NULL; - u64 *numadata = malloc_tmphigh(sizeof(u64) * (MaxCountCPUs + nb_numa_nodes)); + qemu_cfg_get_numa_data(&nb_hp_memslots, 1); + + u64 *numadata = malloc_tmphigh(sizeof(u64) * (MaxCountCPUs + nb_numa_nodes + + 3 * nb_hp_memslots)); if (!numadata) { warn_noalloc(); return NULL; } - qemu_cfg_get_numa_data(numadata, MaxCountCPUs + nb_numa_nodes); + qemu_cfg_get_numa_data(numadata, MaxCountCPUs + nb_numa_nodes + 3 * nb_hp_memslots); struct system_resource_affinity_table *srat; int srat_size = sizeof(*srat) + sizeof(struct srat_processor_affinity) * MaxCountCPUs + - sizeof(struct srat_memory_affinity) * (nb_numa_nodes + 2); + sizeof(struct srat_memory_affinity) * (nb_numa_nodes + nb_hp_memslots + 2); srat = malloc_high(srat_size); if (!srat) { @@ -627,6 +755,7 @@ build_srat(void) */ struct srat_memory_affinity *numamem = (void*)core; int slots = 0; + int node; u64 mem_len, mem_base, next_base = 0; acpi_build_srat_memory(numamem, 0, 640*1024, 0, 1); @@ -653,10 +782,23 @@ build_srat(void) next_base += (1ULL << 32) - RamSize; } acpi_build_srat_memory(numamem, mem_base, mem_len, i-1, 1); + + numamem++; + slots++; + + } + mem = (void*)numamem; + + for (i = 1; i < nb_hp_memslots + 1; ++i) { + mem_base = *numadata++; + mem_len = *numadata++; + node = *numadata++; + acpi_build_srat_memory(numamem, mem_base, mem_len, node, 1); + dprintf(1, "hotplug memory slot %d on node %d\n", i, node); numamem++; slots++; } - for (; slots < nb_numa_nodes + 2; slots++) { + for (; slots < nb_numa_nodes + nb_hp_memslots + 2; slots++) { acpi_build_srat_memory(numamem, 0, 0, 0, 0); numamem++; } @@ -707,6 +849,7 @@ acpi_bios_init(void) ACPI_INIT_TABLE(build_madt()); ACPI_INIT_TABLE(build_hpet()); ACPI_INIT_TABLE(build_srat()); + ACPI_INIT_TABLE(build_memssdt()); ACPI_INIT_TABLE(build_pcihp()); u16 i, external_tables = qemu_cfg_acpi_additional_tables(); -- 1.7.9

1 0

[RFC PATCH 2/9] Implement acpi-dsdt functions for memory hotplug.
by Vasilis Liaskovitis 19 Apr '12

19 Apr '12

Extend the DSDT to include methods for handling memory hot-add and hot-remove notifications and memory device status requests. These functions are called from the memory device SSDT methods. Eject has only been tested with level gpe event, but will be changed to edge gpe event soon, according to recent master patch for other ACPI hotplug events. Signed-off-by: Vasilis Liaskovitis <vasilis.liaskovitis(a)profitbricks.com> --- src/acpi-dsdt.dsl | 68 +++++++++++++++++++++++++++++++++++++++++++++++++++- 1 files changed, 66 insertions(+), 2 deletions(-) diff --git a/src/acpi-dsdt.dsl b/src/acpi-dsdt.dsl index 4bdc268..184daf0 100644 --- a/src/acpi-dsdt.dsl +++ b/src/acpi-dsdt.dsl @@ -709,9 +709,72 @@ DefinitionBlock ( } Return(One) } - } + /* Objects filled in by run-time generated SSDT */ + External(MTFY, MethodObj) + External(MEON, PkgObj) + + Method (CMST, 1, NotSerialized) { + // _STA method - return ON status of memdevice + // Local0 = MEON flag for this cpu + Store(DerefOf(Index(MEON, Arg0)), Local0) + If (Local0) { Return(0xF) } Else { Return(0x0) } + } + /* Memory eject notify method */ + OperationRegion(MEMJ, SystemIO, 0xaf40, 32) + Field (MEMJ, ByteAcc, NoLock, Preserve) + { + MPE, 256 + } + + Method (MPEJ, 2, NotSerialized) { + // _EJ0 method - eject callback + Store(ShiftLeft(1,Arg0), MPE) + Sleep(200) + } + + /* Memory hotplug notify method */ + OperationRegion(MEST, SystemIO, 0xaf20, 32) + Field (MEST, ByteAcc, NoLock, Preserve) + { + MES, 256 + } + + Method(MESC, 0) { + // Local5 = active memdevice bitmap + Store (MES, Local5) + // Local2 = last read byte from bitmap + Store (Zero, Local2) + // Local0 = memory device iterator + Store (Zero, Local0) + While (LLess(Local0, SizeOf(MEON))) { + // Local1 = MEON flag for this memory device + Store(DerefOf(Index(MEON, Local0)), Local1) + If (And(Local0, 0x07)) { + // Shift down previously read bitmap byte + ShiftRight(Local2, 1, Local2) + } Else { + // Read next byte from memdevice bitmap + Store(DerefOf(Index(Local5, ShiftRight(Local0, 3))), Local2) + } + // Local3 = active state for this memory device + Store(And(Local2, 1), Local3) + If (LNotEqual(Local1, Local3)) { + // State change - update MEON with new state + Store(Local3, Index(MEON, Local0)) + // Do MEM notify + If (LEqual(Local3, 1)) { + MTFY(Local0, 1) + } Else { + MTFY(Local0, 3) + } + } + Increment(Local0) + } + Return(One) + } + } /**************************************************************** * General purpose events ****************************************************************/ @@ -732,7 +795,8 @@ DefinitionBlock ( Return(\_SB.PRSC()) } Method(_L03) { - Return(0x01) + // Memory hotplug event + Return(\_SB.MESC()) } Method(_L04) { Return(0x01) -- 1.7.9

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[RFC PATCH 1/9] Add SSDT memory device support
by Vasilis Liaskovitis 19 Apr '12

19 Apr '12

Define SSDT hotplug-able memory devices in _SB namespace. The dynamically generated SSDT includes per memory device hotplug methods. These methods just call methods defined in the DSDT. Also dynamically generate a MTFY method and a MEON array of the online/available memory devices. Add file src/ssdt-mem.dsl with directions for generating the per-memory device processor object AML code. The design is taken from SSDT cpu generation. Signed-off-by: Vasilis Liaskovitis <vasilis.liaskovitis(a)profitbricks.com> --- src/ssdt-mem.dsl | 66 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 66 insertions(+), 0 deletions(-) create mode 100644 src/ssdt-mem.dsl diff --git a/src/ssdt-mem.dsl b/src/ssdt-mem.dsl new file mode 100644 index 0000000..9586643 --- /dev/null +++ b/src/ssdt-mem.dsl @@ -0,0 +1,66 @@ +/* This file is the basis for the ssdt_mem[] variable in src/acpi.c. + * It is similar in design to the ssdt_proc variable. + * It defines the contents of the per-cpu Processor() object. At + * runtime, a dynamically generated SSDT will contain one copy of this + * AML snippet for every possible memory device in the system. The + * objects will * be placed in the \_SB_ namespace. + * + * To generate a new ssdt_memc[], run the commands: + * cpp -P src/ssdt-mem.dsl > out/ssdt-mem.dsl.i + * iasl -ta -p out/ssdt-mem out/ssdt-mem.dsl.i + * tail -c +37 < out/ssdt-mem.aml | hexdump -e '" " 8/1 "0x%02x," "\n"' + * and then cut-and-paste the output into the src/acpi.c ssdt_mem[] + * array. + * + * In addition to the aml code generated from this file, the + * src/acpi.c file creates a MEMNTFY method with an entry for each memdevice: + * Method(MTFY, 2) { + * If (LEqual(Arg0, 0x00)) { Notify(MP00, Arg1) } + * If (LEqual(Arg0, 0x01)) { Notify(MP01, Arg1) } + * ... + * } + * and a MEON array with the list of active and inactive memory devices: + * Name(MEON, Package() { One, One, ..., Zero, Zero, ... }) + */ +DefinitionBlock ("ssdt-mem.aml", "SSDT", 0x02, "BXPC", "CSSDT", 0x1) +/* v------------------ DO NOT EDIT ------------------v */ +{ + Device(MPAA) { + Name(ID, 0xAA) +/* ^------------------ DO NOT EDIT ------------------^ + * + * The src/acpi.c code requires the above layout so that it can update + * MPAA and 0xAA with the appropriate MEMDEVICE id (see + * SD_OFFSET_MEMHEX/MEMID1/MEMID2). Don't change the above without + * also updating the C code. + */ + Name(_HID, EISAID("PNP0C80")) + Name(_PXM, 0xAA) + + External(CMST, MethodObj) + External(MPEJ, MethodObj) + + Name(_CRS, ResourceTemplate() { + QwordMemory( + ResourceConsumer, + , + MinFixed, + MaxFixed, + Cacheable, + ReadWrite, + 0x0, + 0xDEADBEEF, + 0xE6ADBEEE, + 0x00000000, + 0x08000000, + ) + }) + Method (_STA, 0) { + Return(CMST(ID)) + } + Method (_EJ0, 1, NotSerialized) { + MPEJ(ID, Arg0) + } + } +} + -- 1.7.9

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[RFC PATCH 0/9] ACPI memory hotplug
by Vasilis Liaskovitis 19 Apr '12

19 Apr '12

This is a prototype for ACPI memory hotplug on x86_64 target. Based on some earlier work and comments from Gleb. Memslot devices are modeled with a new qemu command line "-memslot id=name,start=start_addr,size=sz,node=pxm" user is responsible for defining memslots with meaningful start/size values, e.g. not defining a memory slot over a PCI-hole. Alternatively, the start size could also be handled/assigned automatically from the specific emulated hardware (for hw/pc.c PCI hole is currently [below_4g_mem_size, 4G), so hotplugged memory should start from max(4G, above_4g_mem_size). Node is defining numa proximity for this memslot. When not defined it defaults to zero. e.g. "-memslot id=hot1,start=4294967296,size=536870912,node=0" will define a 512M memory slot starting at physical address 4G, belonging to numa node 0. Memory slots are added or removed with a new hmp command "memslot": Hot-add syntax: "memslot id add" Hot-remove syntax: "memslot id delete" - All memslots are initially unpopulated. Memslots are currently modeling only hotplug-able memory slots i.e. initial system memory is not modeled with memslots. The concept could be generalized to include all memory though, or it could more closely follow kvm-memory slots. - Memslots are abstracted as qdevices attached to the main system bus. However, memory hotplugging has its own side channel ignoring main_system_bus's hotplug incapability. A cleaner integration would be needed. What's the preferred way of modeling memory devices in qom? Would it be better to attach memory devices as children-links of an acpi-capable device (in the pc case acpi_piix4) instead of the system bus? - Refcounting memory slots has been discussed (but is not included in this series yet). Depopulating a memory region happens on a guestOS _EJ callback, which means the guestOS will not be using the region anymore. However, guest addresses from the depopulated region need to also be unmapped from the qemu address space using cpu_physical_memory_unmap(). Does memory_region_del_subregion() or some other memory API call guarantee that a memoryregion has been unmapped from qemu's address space? - What is the expected behaviour of hotplugged memory after a reboot? Is it supposed to be persistent after reboots? The last 2 patches in the series try to make hotplugged memslots persistent after reboot by creating and consulting e820 map entries. A better solution is needed for hot-remove after a reboot, because e820 entries can be merged. series is based on uq/master for qemu-kvm, and master for seabios. Can be found also at: Vasilis Liaskovitis (9): Seabios: Add SSDT memory device support Seabios, acpi: Implement acpi-dsdt functions for memory hotplug. Seabios, acpi: generate hotplug memory devices. Implement memslot device abstraction acpi_piix4: Implement memory device hotplug registers and handlers. pc: pass paravirt info for hotplug memory slots to BIOS Implement memslot command-line option and memslot hmp monitor command pc: adjust e820 map on hot-add and hot-remove Seabios, acpi: enable memory devices if e820 entry is present Makefile.objs | 2 +- hmp-commands.hx | 15 ++++ hw/acpi_piix4.c | 103 +++++++++++++++++++++++++++- hw/memslot.c | 201 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ hw/memslot.h | 44 ++++++++++++ hw/pc.c | 87 ++++++++++++++++++++++-- hw/pc.h | 1 + monitor.c | 8 ++ monitor.h | 1 + qemu-config.c | 25 +++++++ qemu-options.hx | 8 ++ sysemu.h | 1 + vl.c | 44 ++++++++++++- 13 files changed, 528 insertions(+), 12 deletions(-) create mode 100644 hw/memslot.c create mode 100644 hw/memslot.h create mode 100644 src/ssdt-mem.dsl src/acpi-dsdt.dsl | 68 ++++++++++++++++++++++- src/acpi.c | 155 +++++++++++++++++++++++++++++++++++++++++++++++++++-- src/memmap.c | 15 +++++ src/ssdt-mem.dsl | 66 ++++++++++++++++++++++ 4 files changed, 298 insertions(+), 6 deletions(-) create mode 100644 src/ssdt-mem.dsl -- 1.7.9

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Call for Proposals: Linux Plumbers Conference (Aug 2012)
by Amit Shah 19 Apr '12

19 Apr '12

Hello, The Call for Proposals for the Linux Plumbers Conf 2012 is out. We're looking for speakers to talk at the Virtualization microconference as well as the main conference. The deadline for proposal submissions is 1st May. This year's edition of LPC is co-located with LinuxCon NA and will be held at San Diego from the 29th to the 31st of August. More details are at: http://www.linuxplumbersconf.org/2012/2012-lpc-call-for-proposals/ Please note: to submit a proposal for the virt microconf, use the 'lpc2012-virt-' prefix in the Name field. LPC is oriented towards solving problems, and good proposal topics are those which are unresolved problems or proposals that need interaction with multiple subsystems. Please see the CFP page linked above for more details. Thanks, Amit

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Re: [SeaBIOS] [Qemu-devel] [PATCH 0/3] switch to seavgabios
by Gerd Hoffmann 19 Apr '12

19 Apr '12

Hi, [ adding seabios list to Cc:, topic is the missing vesa 2.0 protected mode interface in seavgabios ] >> Pointer? >> I'd like to have a test case which breaks with the new vgabios. > > We talked with malc briefly on irc yesterday, and this is what > he gave me: > > http://cvs.savannah.gnu.org/viewvc/vgabios/vbe.c?root=vgabios&r1=1.47&r2=1.… > > this is not the test case but the missing support he's referring to. > > It appears the patch implements just 2 functions which both just does > int10, It isn't that simple. Just invoking int10 from protected mode isn't guaranteed to have the desired effect. It certainly wouldn't work for linux vesafb panning. It might work for dos extenders, they might have the idt entry for int10 and other bios interrupts setup accordingly to do a real-mode -> bios call -> protected mode transition to simplify porting dos code to the 32bit extender. But even for that use case it is IMHO pointless as the reason to have a 32bit interface is to avoid the expensive real mode switch in the first place ... The code has been changed later on, for good reasons, see http://git.qemu.org/?p=vgabios.git;a=commitdiff;h=72c270d8091fb0f09e8291cc0… > so should be easy to implement in seabios, seavgabios has no 32bit code at all at the moment. vesa pmi didn't seem to be important enougth to change it. seabios is a 16/32bit hybrid with some code being compiled twice for both modes; dunno how reusable the seabios infrastructure is. Unlike seabios seavgabios has no fixed load address, which makes things a bit more complicated when it comes to global variables I think. At least for the bochs interface this wouldn't be a showstopper though. Instead of using global variables to figure stuff like the active video mode we can just read the bits we need from the bochs device registers. Costs some extra vmexits of course, and we wouldn't have code sharing for 16+32bit paths. cheers, Gerd

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Re: [SeaBIOS] [Qemu-devel] [PATCH 0/3] switch to seavgabios
by Gerhard Wiesinger 19 Apr '12

19 Apr '12

Negative also here: Don't see anything on screen on startup... From log, latest qemu-kvm git version: Running option rom at c180:3d4e Running option rom at c180:3da2 Running option rom at c180:3df6 Running option rom at c580:0003 qemu-system-x86_64: /root/download/qemu/git/qemu-kvm/exec.c:2641: register_subpage: Assertion `existing.mr->subpage || existing.mr == &io_mem_unassigned' failed. Startup is done with the following command: /root/download/qemu/git/qemu-kvm/x86_64-softmmu/qemu-system-x86_64 -drive file=1.img,media=disk,if=scsi,bus=0,unit=0 -drive file=2.img,media=disk,if=scsi,bus=0,unit=1 -drive file=3.img,media=disk,if=scsi,bus=0,unit=2 -boot order=cad,menu=on -m 2048 -k de -vga vmware -vnc :0 -bios /root/download/seabios/git/seabios/out/bios.bin -chardev stdio,id=seabios -device isa-debugcon,iobase=0x402,chardev=seabios -option-rom BIOS/V4.19/8xx_64.rom -device rtl8139,mac=00:02:44:92:87:6a,vlan=0,romfile= -net tap,ifname=tap0,script=no,downscript=no,vlan=0 Backtrace isn't valid. Old integrated BIOS is valid and works well. Ciao, Gerhard On 17.04.2012 12:11, Gerd Hoffmann wrote: > Hi, > > This patch series switches the vgabios binaries shipped by qemu from the > lgpl'ed vgabios to the seabios version. > > There should be no guest-visible changes (especially no regressions) in > theory. The only known (and intentional) exception is the vesa 2.0 > protected mode interface which is not implemented by the seavgabios. > There are no known issues with linux and windows guests. Testing with > other, more exotic guests is very welcome. > > Note #1: Just pull from git to test, I've zapped the big binary patches > so you can't 'git am' them. > > Note #2: This goes on top of the seabios-1.7.0 pull request just sent, > so pulling this will pull the seabios update too. > > please give it a spin, > Gerd > > The following changes since commit 6b034aa138716a515c88f7894940d5d0aff2f3ed: > > seabios: update to 1.7.0 (2012-04-17 10:51:41 +0200) > > are available in the git repository at: > git://git.kraxel.org/qemu seavgabios-1.7.0 > > Gerd Hoffmann (3): > Add seavgabios build rules to roms/Makefile > Update vgabios binaries > Switch isa vga to seavgabios too. > > hw/vga-isa.c | 2 +- > hw/vga_int.h | 1 - > pc-bios/vgabios-cirrus.bin | Bin 35840 -> 37888 bytes > pc-bios/vgabios-isavga.bin | Bin 0 -> 37888 bytes > pc-bios/vgabios-qxl.bin | Bin 40448 -> 37888 bytes > pc-bios/vgabios-stdvga.bin | Bin 40448 -> 37888 bytes > pc-bios/vgabios-vmware.bin | Bin 40448 -> 37888 bytes > roms/Makefile | 13 +++++++++++++ > roms/config.vga.cirrus | 3 +++ > roms/config.vga.isavga | 3 +++ > roms/config.vga.qxl | 6 ++++++ > roms/config.vga.stdvga | 3 +++ > roms/config.vga.vmware | 6 ++++++ > 13 files changed, 35 insertions(+), 2 deletions(-) > create mode 100644 pc-bios/vgabios-isavga.bin > create mode 100644 roms/config.vga.cirrus > create mode 100644 roms/config.vga.isavga > create mode 100644 roms/config.vga.qxl > create mode 100644 roms/config.vga.stdvga > create mode 100644 roms/config.vga.vmware >

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[PATCH] vgabios: Improve Kconfig descriptions for the vga card types.
by Kevin O'Connor 17 Apr '12

17 Apr '12

Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- vgasrc/Kconfig | 17 +++++++++-------- 1 files changed, 9 insertions(+), 8 deletions(-) diff --git a/vgasrc/Kconfig b/vgasrc/Kconfig index c436aeb..6b22c39 100644 --- a/vgasrc/Kconfig +++ b/vgasrc/Kconfig @@ -12,13 +12,14 @@ menu "VGA ROM" config VGA_STANDARD_VGA depends on !COREBOOT - bool "Standard VGA" + bool "QEMU/Bochs Original IBM 256K VGA" help - Build basic VGA BIOS support for use on emulators. + Build basic VGA BIOS support (pre Super-VGA) for use + on emulators. config VGA_CIRRUS depends on !COREBOOT - bool "QEMU Cirrus CLGD 54xx VGA BIOS" + bool "QEMU/Bochs Cirrus SVGA" help Build support for Cirrus VGA emulation found on QEMU and Bochs emulators. This is for emulators; it is not @@ -26,18 +27,18 @@ menu "VGA ROM" config VGA_BOCHS depends on !COREBOOT - bool "Bochs DISPI interface VGA BIOS" + bool "QEMU/Bochs VBE SVGA" help - Build support for Bochs DISPI interface found on QEMU - and Bochs emulators. + Build support for Bochs DISPI interface (a custom VBE + protocol) found on QEMU and Bochs emulators. config VGA_GEODEGX2 - bool "GeodeGX2 interface VGA BIOS" + bool "GeodeGX2" help Build support for Geode GX2 vga. config VGA_GEODELX - bool "GeodeLX interface VGA BIOS" + bool "GeodeLX" help Build support for Geode LX vga. endchoice -- 1.7.6.5

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