Dear SeaBIOS folks,
using Debian Sid/unstable and Clang 3.2 from Debian experimental
$ clang --version
Debian clang version 3.2-1~exp6 (tags/RELEASE_32/final) (based on LLVM 3.2)
Target: i386-pc-linux-gnu
Thread model: posix
to build SeaBIOS, Clang throws the following errors.
$ git show
commit f465e1ec1b01826100c92b890487a2ab09bfe2c1
Author: Kevin O'Connor <kevin(a)koconnor.net>
Date: Sat Feb 23 21:33:36 2013 -0500
Minor - introduce numeric defines for the IVT offset of hw irqs.
$ make menuconfig # coreboot chosen, see attached
$ CC=clang make
[…]
In file included from src/ata.c:9:
src/ioport.h:126:18: error: invalid operand for instruction
asm volatile("rep outsw %%es:(%%esi), (%%dx)"
^
<inline asm>:1:12: note: instantiated into assembly here
rep outsw %es:(%esi), (%dx)
^~~~~~~~~~
In file included from src/ata.c:9:
src/ioport.h:113:18: error: invalid operand for instruction
asm volatile("rep insw (%%dx), %%es:(%%edi)"
^
<inline asm>:1:11: note: instantiated into assembly here
rep insw (%dx), %es:(%edi)
^~~~~
2 errors generated.
make: *** [out/ata.o] Fehler 1
I have no clue about assembler programming, so before reporting both
errors to the Clang project, as it works with GCC, I want to make sure
that Clang is mistaken here.
Thanks,
Paul
./qemu-upstream-latest -boot reboot-timeout=1000 ...
(after boot failed, VM waits for 1000 ms and try to reboot)
reboot-timeout parameter doesn't work now, I found this regression bug
was introduced by commit 59d6ca52a7eba5b1f4f2becf70fd446dccaf0a2e
> Author: Kevin O'Connor <kevin(a)koconnor.net>
> Date: Thu May 31 00:20:55 2012 -0400
>
> Cache romfile entries.
>
> Create a 'struct romfile_s' and populate a list of all romfiles at
> start of init. Caching the romfiles both simplifies the code and
> makes it more efficient.
>
> Also, convert the ramdisk code to use romfile helpers instead of
> directly accessing cbfs.
romfile_add() is used to add rom files in the list.
When seabios calls boot_fail(), the list becomes empty,
romfile_find("etc/boot-fail-wait", ..) returns NULL.
it seems the list items are released prematurely.
Thanks, Amos
On 03/05/13 17:59, David Woodhouse wrote:> On Tue, 2013-03-05 at 17:03 +0100, Paolo Bonzini wrote:
>> Resuming from suspend-to-RAM should not reset all devices. Only the
>> CPU should get a reset signal.
>
> Hm... on reflection, I don't actually know if this is true.
>
> Perhaps we *should* reset all devices. After all, in a real machine
> they'll all have been turned off and the RAM will have been in
> self-refresh. Surely they have to be reset?
>
> So maybe we should *let* the i440FX PAM registers get reset to point to
> ROM. And fix the firmware to *cope* with that, check to see if the
> shadow RAM already holds an image of a started-up firmware with the
> correct checksum, and jump back to it.
>
> That is: perhaps it's a *SeaBIOS* bug that suspend/resume doesn't work
> if the PAM configuration is reset?
I think it is indeed a problem with SeaBIOS. (git.seabios.org
(80.81.252.135) seems to be down ATM, so I can only check at f465e1ec.)
Open romlayout.S:
622 reset_vector:
623 ljmpw $SEG_BIOS, $entry_post
537 entry_post:
538 cmpl $0, %cs:HaveRunPost // Check for resume/reboot
539 jnz entry_resume
540 ENTRY_INTO32 _cfunc32flat_handle_post // Normal entry point
239 entry_resume:
...
248 // Call handler.
249 jmp handle_resume
handle_resume() [src/resume.c]
inb_cmos(CMOS_RESET_CODE)
It checks the CMOS only after looking at HaveRunPost. The value of
HaveRunPost depends on the PAM settings. It's always 0 in ROM, in which
case we continue at handle_post() [src/post.c].
Laszlo
On Sun, 3 Mar 2013 22:58:46 -0500
ron minnich <rminnich(a)gmail.com> wrote:
> setgtt is only for hardware with a gtt. Again, I'm not familiar with
> the hardware on this laptop. Does it have a gtt?
it seems so(from the xf86-video-intel mentioned before):
if (IS_G4X(pI830))
gtt = (unsigned char *)(pI830->mmio + MB(2));
else if (IS_I965G(pI830))
gtt = (unsigned char *)(pI830->mmio + KB(512));
else {
/* 915/945 chips has GTT range in bar 3*/
int err = 0;
err = pci_device_map_range (pI830->pci_dev,
pI830->pci_dev->regions[3].base_addr,
pI830->pci_dev->regions[3].size,
PCI_DEV_MAP_FLAG_WRITABLE,
(void **)>t);
if (err != 0) {
fprintf(stderr, "mapping GTT bar failed\n");
exit(1);
}
}
So the GTT would be on the bar 3:
# lspci -s 00:02.0 -vvvv
00:02.0 VGA compatible controller: Intel Corporation Mobile 945GM/GMS,
943/940GML Express Integrated Graphics Controller (rev 03) (prog-if 00
[VGA controller]) Subsystem: Lenovo ThinkPad T60/R60 series Control:
I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping-
SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr-
DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx+ Latency: 0
Interrupt: pin A routed to IRQ 11 Region 0: Memory at e4200000 (32-bit,
non-prefetchable) [size=512K] Region 1: I/O ports at 50a0 [size=8]
Region 2: Memory at d0000000 (32-bit, prefetchable) [size=256M]
Region 3: Memory at e4300000 (32-bit, non-prefetchable)
[size=256K] Expansion ROM at <unassigned> [disabled]
Capabilities: [90] MSI: Enable- Count=1/1 Maskable- 64bit-
Address: 00000000 Data: 0000
Capabilities: [d0] Power Management version 2
Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA
PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable-
DSel=0 DScale=0 PME-
And the datasheets for the 945G also talks about the GTT like the
GTTADR registers etc...
Denis.
Current seabios will try to boot from selected devices first,
if they are all failed, seabios will also try to boot from
un-selected devices.
We need to make it configurable. I already posted a seabios
patch to add a new device type to halt booting. Qemu can add
"HALT" at the end of bootindex string, then seabios will halt
booting after trying to boot from selected devices.
This option only effects when boot priority is changed by
bootindex options, the old style(-boot order=..) will still
try to boot from un-selected devices.
Signed-off-by: Amos Kong <akong(a)redhat.com>
---
[SeaBIOS PATCH v3] boot: add a new type to halt booting
https://github.com/kongove/seabios/commit/39aeded2da6254eab2c34de92371ce1...
bios.bin: http://kongove.fedorapeople.org/pub/added-halt-type-bios.bin
---
qemu-config.c | 3 +++
qemu-options.hx | 8 ++++++--
vl.c | 28 +++++++++++++++++++++++++++-
3 files changed, 36 insertions(+), 3 deletions(-)
diff --git a/qemu-config.c b/qemu-config.c
index 2188c3e..dd6d249 100644
--- a/qemu-config.c
+++ b/qemu-config.c
@@ -612,6 +612,9 @@ QemuOptsList qemu_boot_opts = {
}, {
.name = "reboot-timeout",
.type = QEMU_OPT_STRING,
+ }, {
+ .name = "strict",
+ .type = QEMU_OPT_STRING,
},
{ /*End of list */ }
},
diff --git a/qemu-options.hx b/qemu-options.hx
index 9df0cde..5408837 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -376,14 +376,14 @@ ETEXI
DEF("boot", HAS_ARG, QEMU_OPTION_boot,
"-boot [order=drives][,once=drives][,menu=on|off]\n"
- " [,splash=sp_name][,splash-time=sp_time][,reboot-timeout=rb_time]\n"
+ " [,splash=sp_name][,splash-time=sp_time][,reboot-timeout=rb_time][,strict=on|off]\n"
" 'drives': floppy (a), hard disk (c), CD-ROM (d), network (n)\n"
" 'sp_name': the file's name that would be passed to bios as logo picture, if menu=on\n"
" 'sp_time': the period that splash picture last if menu=on, unit is ms\n"
" 'rb_timeout': the timeout before guest reboot when boot failed, unit is ms\n",
QEMU_ARCH_ALL)
STEXI
-@item -boot [order=@var{drives}][,once=@var{drives}][,menu=on|off][,splash=@var{sp_name}][,splash-time=@var{sp_time}][,reboot-timeout=@var{rb_timeout}]
+@item -boot [order=@var{drives}][,once=@var{drives}][,menu=on|off][,splash=@var{sp_name}][,splash-time=@var{sp_time}][,reboot-timeout=@var{rb_timeout}][,strict=on|off]
@findex -boot
Specify boot order @var{drives} as a string of drive letters. Valid
drive letters depend on the target achitecture. The x86 PC uses: a, b
@@ -407,6 +407,10 @@ when boot failed, then reboot. If @var{rb_timeout} is '-1', guest will not
reboot, qemu passes '-1' to bios by default. Currently Seabios for X86
system support it.
+Do strict boot via @option{strict=on} as far as firmware/BIOS
+supports it. This only effects when boot priority is changed by
+bootindex options. The default is non-strict boot.
+
@example
# try to boot from network first, then from hard disk
qemu-system-i386 -boot order=nc
diff --git a/vl.c b/vl.c
index 79e5122..de79f6c 100644
--- a/vl.c
+++ b/vl.c
@@ -230,6 +230,7 @@ int ctrl_grab = 0;
unsigned int nb_prom_envs = 0;
const char *prom_envs[MAX_PROM_ENVS];
int boot_menu;
+int boot_strict;
uint8_t *boot_splash_filedata;
int boot_splash_filedata_size;
uint8_t qemu_extra_params_fw[2];
@@ -2804,7 +2805,7 @@ int main(int argc, char **argv, char **envp)
static const char * const params[] = {
"order", "once", "menu",
"splash", "splash-time",
- "reboot-timeout", NULL
+ "reboot-timeout", "strict", NULL
};
char buf[sizeof(boot_devices)];
char *standard_boot_devices;
@@ -2847,6 +2848,19 @@ int main(int argc, char **argv, char **envp)
exit(1);
}
}
+ if (get_param_value(buf, sizeof(buf),
+ "strict", optarg)) {
+ if (!strcmp(buf, "on")) {
+ boot_strict = 1;
+ } else if (!strcmp(buf, "off")) {
+ boot_strict = 0;
+ } else {
+ fprintf(stderr,
+ "qemu: invalid option value '%s'\n",
+ buf);
+ exit(1);
+ }
+ }
qemu_opts_parse(qemu_find_opts("boot-opts"),
optarg, 0);
}
@@ -3907,6 +3921,18 @@ int main(int argc, char **argv, char **envp)
net_check_clients();
+ if (boot_strict) {
+ /* do strict boot, only boot from selected devices */
+ FWBootEntry *node;
+
+ QTAILQ_FOREACH(node, &fw_boot_order, link) {
+ if (!node->link.tqe_next) {
+ add_boot_device_path(node->bootindex + 1, NULL, "HALT");
+ break;
+ }
+ }
+ }
+
/* just use the first displaystate for the moment */
ds = get_displaystate();
--
1.7.1
On Sun, 3 Mar 2013 09:21:11 -0800
ron minnich <rminnich(a)gmail.com> wrote:
> I did not have time to read all your code, will try later.
>
> To get to the frame buffer on sandybridge, you just read one of the
> BARs, I think i't BAR 4. That won't work on the x60?
I just found out that the bar2 where the framebuffer is on the x60
isn't mapped correctly:
common.c maps the framebuffer and then I do that with the virtual
address:
(gdb) set {int}0xa7d38000 = 0xff
(gdb) p/x {int}0xa7d38000
$1 = 0x0
0xa7d38000 points or at the beginning of the bar, or at address of the
framebuffer(I took it from the kernel with kgdb).
I am told by phcoder on IRC that I've to activate the access to VRAM...
Denis.
ron minnich wrote:
> you need to get the physical frame buffer address from the hardware
> and then mmap that in user mode.
Yes, that's what he has been doing. The BAR points to some address
which doesn't remember writes.
//Peter
Recent versions of QEMU are picky about the data rate specified when
performing floppy transfers (see QEMU commit 844f65d6). This broke
the SeaBIOS handling of legacy disk sizes (eg, 360K).
This series cleans up the low-level floppy transfer code and adds in
media sensing code to make old floppies work under QEMU again. (It's
unclear if this will improve handling on real hardware.)
-Kevin
Kevin O'Connor (8):
Minor - improve comments and grouping of handle_08().
floppy: Introduce 'struct floppy_pio_s' for floppy PIO ops.
floppy: Cleanup floppy irq wait handling.
floppy: Clean up Check Interrupt Status code.
floppy: Move recalibration and results parsing to floppy_cmd().
floppy: Improve floppy_pio() error checking.
floppy: Implement media format sensing.
floppy: Actually do controller reset in floppy_reset().
src/biosvar.h | 2 +-
src/clock.c | 6 +-
src/floppy.c | 552 +++++++++++++++++++++++++++++++++-------------------------
3 files changed, 321 insertions(+), 239 deletions(-)
--
1.7.11.7
This series creates a config option for using the "extra stack" for
all legacy 16bit irq entry points, and it defaults the option on. By
using this internal stack, SeaBIOS doesn't use much of the caller's
stack and it makes it less likely a stack overflow will occur.
However, using an internal stack could break programs that call the
BIOS in 16bit protected mode.
This series was discussed about a year ago. There haven't been any
examples located where this breaks OSes, and it is known to improve
some really old OSes (eg, DOS 1.0). It is a config option, so if it
can be disabled to aid in testing.
Kevin O'Connor (2):
Separate out 16bit PCI-BIOS entry point from regular int 0x1a entry
point.
Support using the "extra stack" for all 16bit irq entry points.
src/Kconfig | 9 +++++++
src/clock.c | 1 -
src/config.h | 2 +-
src/pcibios.c | 16 ++++++-------
src/post.c | 2 +-
src/romlayout.S | 73 +++++++++++++++++++++++++++++++++++++++++++++++++++++++--
6 files changed, 90 insertions(+), 13 deletions(-)
--
1.7.11.7
