SeaBIOS March 2013

seabios@seabios.org

41 participants
83 discussions

Re: [SeaBIOS] [Qemu-devel] [RFC PATCH v4 09/30] Implement dimm device abstraction
by li guang 26 Mar '13

26 Mar '13

在 2012-12-18二的 13:41 +0100，Vasilis Liaskovitis写道： > Each hotplug-able memory slot is a DimmDevice. All DimmDevices are attached > to a new bus called DimmBus. This bus is introduced so that we no longer > depend on hotplug-capability of main system bus (the main bus does not allow > hotplugging). The DimmBus should be attached to a chipset Device (i440fx in case > of the pc) > > A hot-add operation for a particular dimm: > - creates a new DimmDevice and attaches it to the DimmBus > - creates a new MemoryRegion of the given physical address offset, size and > node proximity, and attaches it to main system memory as a sub_region. > > Hotplug operations are done through normal device_add commands. > Also add properties to DimmDevice. > > v3->v4: Removed hot-remove functions. Will be offered in separate patches. > > Signed-off-by: Vasilis Liaskovitis <vasilis.liaskovitis(a)profitbricks.com> > --- > hw/Makefile.objs | 2 +- > hw/dimm.c | 245 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ > hw/dimm.h | 89 ++++++++++++++++++++ > 3 files changed, 335 insertions(+), 1 deletions(-) > create mode 100644 hw/dimm.c > create mode 100644 hw/dimm.h > > diff --git a/hw/Makefile.objs b/hw/Makefile.objs > index d581d8d..51494c9 100644 > --- a/hw/Makefile.objs > +++ b/hw/Makefile.objs > @@ -29,7 +29,7 @@ common-obj-$(CONFIG_I8254) += i8254_common.o i8254.o > common-obj-$(CONFIG_PCSPK) += pcspk.o > common-obj-$(CONFIG_PCKBD) += pckbd.o > common-obj-$(CONFIG_FDC) += fdc.o > -common-obj-$(CONFIG_ACPI) += acpi.o acpi_piix4.o acpi_ich9.o smbus_ich9.o > +common-obj-$(CONFIG_ACPI) += acpi.o acpi_piix4.o acpi_ich9.o smbus_ich9.o dimm.o > common-obj-$(CONFIG_APM) += pm_smbus.o apm.o > common-obj-$(CONFIG_DMA) += dma.o > common-obj-$(CONFIG_I82374) += i82374.o > diff --git a/hw/dimm.c b/hw/dimm.c > new file mode 100644 > index 0000000..e384952 > --- /dev/null > +++ b/hw/dimm.c > @@ -0,0 +1,245 @@ > +/* > + * Dimm device for Memory Hotplug > + * > + * Copyright ProfitBricks GmbH 2012 > + * This library is free software; you can redistribute it and/or > + * modify it under the terms of the GNU Lesser General Public > + * License as published by the Free Software Foundation; either > + * version 2 of the License, or (at your option) any later version. > + * > + * This library is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU > + * Lesser General Public License for more details. > + * > + * You should have received a copy of the GNU Lesser General Public > + * License along with this library; if not, see <http://www.gnu.org/licenses/> > + */ > + > +#include "trace.h" > +#include "qdev.h" > +#include "dimm.h" > +#include <time.h> > +#include "../exec-memory.h" > +#include "qmp-commands.h" > + > +/* the following list is used to hold dimm config info before machine > + * is initialized. After machine init, the list is not used anymore.*/ > +static DimmConfiglist dimmconfig_list = > + QTAILQ_HEAD_INITIALIZER(dimmconfig_list); > + > +/* the list of memory buses */ > +static QLIST_HEAD(, DimmBus) memory_buses; > + > +static void dimmbus_dev_print(Monitor *mon, DeviceState *dev, int indent); > +static char *dimmbus_get_fw_dev_path(DeviceState *dev); > + > +static Property dimm_properties[] = { > + DEFINE_PROP_UINT64("start", DimmDevice, start, 0), > + DEFINE_PROP_SIZE("size", DimmDevice, size, DEFAULT_DIMMSIZE), > + DEFINE_PROP_UINT32("node", DimmDevice, node, 0), > + DEFINE_PROP_BIT("populated", DimmDevice, populated, 0, false), > + DEFINE_PROP_END_OF_LIST(), > +}; > + > +static void dimmbus_dev_print(Monitor *mon, DeviceState *dev, int indent) > +{ > +} > + > +static char *dimmbus_get_fw_dev_path(DeviceState *dev) > +{ > + char path[40]; > + > + snprintf(path, sizeof(path), "%s", qdev_fw_name(dev)); > + return strdup(path); > +} > + > +static void dimm_bus_class_init(ObjectClass *klass, void *data) > +{ > + BusClass *k = BUS_CLASS(klass); > + > + k->print_dev = dimmbus_dev_print; > + k->get_fw_dev_path = dimmbus_get_fw_dev_path; > +} > + > +static void dimm_bus_initfn(Object *obj) > +{ > + DimmBus *bus = DIMM_BUS(obj); > + QTAILQ_INIT(&bus->dimmconfig_list); > + QTAILQ_INIT(&bus->dimmlist); > +} > + > +static const TypeInfo dimm_bus_info = { > + .name = TYPE_DIMM_BUS, > + .parent = TYPE_BUS, > + .instance_size = sizeof(DimmBus), > + .instance_init = dimm_bus_initfn, > + .class_init = dimm_bus_class_init, > +}; > + > +DimmBus *dimm_bus_create(Object *parent, const char *name, uint32_t max_dimms, > + dimm_calcoffset_fn pmc_set_offset) > +{ > + DimmBus *memory_bus; > + DimmConfig *dimm_cfg, *next_cfg; > + uint32_t num_dimms = 0; > + > + memory_bus = g_malloc0(dimm_bus_info.instance_size); > + memory_bus->qbus.name = name ? g_strdup(name) : "membus.0"; > + qbus_create_inplace(&memory_bus->qbus, TYPE_DIMM_BUS, DEVICE(parent), > + name); > + > + QTAILQ_FOREACH_SAFE(dimm_cfg, &dimmconfig_list, nextdimmcfg, next_cfg) { > + if (!strcmp(memory_bus->qbus.name, dimm_cfg->bus_name)) { > + if (max_dimms && (num_dimms == max_dimms)) { > + fprintf(stderr, "Bus %s can only accept %u number of DIMMs\n", > + name, max_dimms); > + } > + QTAILQ_REMOVE(&dimmconfig_list, dimm_cfg, nextdimmcfg); > + QTAILQ_INSERT_TAIL(&memory_bus->dimmconfig_list, dimm_cfg, > + nextdimmcfg); > + > + dimm_cfg->start = pmc_set_offset(DEVICE(parent), dimm_cfg->size); > + num_dimms++; > + } > + } > + QLIST_INSERT_HEAD(&memory_buses, memory_bus, next); > + return memory_bus; > +} > + > +static void dimm_populate(DimmDevice *s) > +{ > + DeviceState *dev = (DeviceState *)s; > + MemoryRegion *new = NULL; > + > + new = g_malloc(sizeof(MemoryRegion)); > + memory_region_init_ram(new, dev->id, s->size); > + vmstate_register_ram_global(new); > + memory_region_add_subregion(get_system_memory(), s->start, new); > + s->populated = true; > + s->mr = new; can't we simple just inc ref-count of mr when init memory_region, and dec ref-count of mr when destroy memory_region? Sorry, it may be a bold idea :-) > +} > + > +void dimm_config_create(char *id, uint64_t size, const char *bus, uint64_t node, > + uint32_t dimm_idx, uint32_t populated) > +{ > + DimmConfig *dimm_cfg; > + dimm_cfg = (DimmConfig *) g_malloc0(sizeof(DimmConfig)); > + dimm_cfg->name = strdup(id); > + dimm_cfg->bus_name = strdup(bus); > + dimm_cfg->idx = dimm_idx; > + dimm_cfg->start = 0; > + dimm_cfg->size = size; > + dimm_cfg->node = node; > + dimm_cfg->populated = populated; > + > + QTAILQ_INSERT_TAIL(&dimmconfig_list, dimm_cfg, nextdimmcfg); > +} > + > +void dimm_bus_hotplug(dimm_hotplug_fn hotplug, DeviceState *qdev) > +{ > + DimmBus *bus; > + QLIST_FOREACH(bus, &memory_buses, next) { > + assert(bus); > + bus->qbus.allow_hotplug = 1; > + bus->dimm_hotplug_qdev = qdev; > + bus->dimm_hotplug = hotplug; > + } > +} > + > +static void dimm_plug_device(DimmDevice *slot) > +{ > + DimmBus *bus = DIMM_BUS(qdev_get_parent_bus(&slot->qdev)); > + > + dimm_populate(slot); > + if (bus->dimm_hotplug) { > + bus->dimm_hotplug(bus->dimm_hotplug_qdev, slot, 1); > + } > +} > + > +static int dimm_unplug_device(DeviceState *qdev) > +{ > + return 1; > +} > + > +static DimmConfig *dimmcfg_find_from_name(DimmBus *bus, const char *name) > +{ > + DimmConfig *slot; > + > + QTAILQ_FOREACH(slot, &bus->dimmconfig_list, nextdimmcfg) { > + if (!strcmp(slot->name, name)) { > + return slot; > + } > + } > + return NULL; > +} > + > +void dimm_setup_fwcfg_layout(uint64_t *fw_cfg_slots) > +{ > + DimmConfig *slot; > + DimmBus *bus; > + > + QLIST_FOREACH(bus, &memory_buses, next) { > + QTAILQ_FOREACH(slot, &bus->dimmconfig_list, nextdimmcfg) { > + assert(slot->start); > + fw_cfg_slots[3 * slot->idx] = cpu_to_le64(slot->start); > + fw_cfg_slots[3 * slot->idx + 1] = cpu_to_le64(slot->size); > + fw_cfg_slots[3 * slot->idx + 2] = cpu_to_le64(slot->node); > + } > + } > +} > + > +static int dimm_init(DeviceState *s) > +{ > + DimmBus *bus = DIMM_BUS(qdev_get_parent_bus(s)); > + DimmDevice *slot; > + DimmConfig *slotcfg; > + > + slot = DIMM(s); > + slot->mr = NULL; > + > + slotcfg = dimmcfg_find_from_name(bus, s->id); > + > + if (!slotcfg) { > + fprintf(stderr, "%s no config for slot %s found\n", > + __func__, s->id); > + return 1; > + } > + > + slot->idx = slotcfg->idx; > + assert(slotcfg->start); > + slot->start = slotcfg->start; > + slot->size = slotcfg->size; > + slot->node = slotcfg->node; > + > + QTAILQ_INSERT_TAIL(&bus->dimmlist, slot, nextdimm); > + dimm_plug_device(slot); > + > + return 0; > +} > + > + > +static void dimm_class_init(ObjectClass *klass, void *data) > +{ > + DeviceClass *dc = DEVICE_CLASS(klass); > + > + dc->props = dimm_properties; > + dc->unplug = dimm_unplug_device; > + dc->init = dimm_init; > + dc->bus_type = TYPE_DIMM_BUS; > +} > + > +static TypeInfo dimm_info = { > + .name = TYPE_DIMM, > + .parent = TYPE_DEVICE, > + .instance_size = sizeof(DimmDevice), > + .class_init = dimm_class_init, > +}; > + > +static void dimm_register_types(void) > +{ > + type_register_static(&dimm_bus_info); > + type_register_static(&dimm_info); > +} > + > +type_init(dimm_register_types) > diff --git a/hw/dimm.h b/hw/dimm.h > new file mode 100644 > index 0000000..75a6911 > --- /dev/null > +++ b/hw/dimm.h > @@ -0,0 +1,89 @@ > +#ifndef QEMU_DIMM_H > +#define QEMU_DIMM_H > + > +#include "qemu-common.h" > +#include "memory.h" > +#include "sysbus.h" > +#include "qapi-types.h" > +#include "qemu-queue.h" > +#include "cpus.h" > +#define MAX_DIMMS 255 > +#define DIMM_BITMAP_BYTES ((MAX_DIMMS + 7) / 8) > +#define DEFAULT_DIMMSIZE (1024*1024*1024) > + > +typedef enum { > + DIMM_REMOVE_SUCCESS = 0, > + DIMM_REMOVE_FAIL = 1, > + DIMM_ADD_SUCCESS = 2, > + DIMM_ADD_FAIL = 3 > +} dimm_hp_result_code; > + > +#define TYPE_DIMM "dimm" > +#define DIMM(obj) \ > + OBJECT_CHECK(DimmDevice, (obj), TYPE_DIMM) > +#define DIMM_CLASS(klass) \ > + OBJECT_CLASS_CHECK(DimmDeviceClass, (klass), TYPE_DIMM) > +#define DIMM_GET_CLASS(obj) \ > + OBJECT_GET_CLASS(DimmDeviceClass, (obj), TYPE_DIMM) > + > +typedef struct DimmDevice DimmDevice; > +typedef QTAILQ_HEAD(DimmConfiglist, DimmConfig) DimmConfiglist; > + > +typedef struct DimmDeviceClass { > + DeviceClass parent_class; > + > + int (*init)(DimmDevice *dev); > +} DimmDeviceClass; > + > +struct DimmDevice { > + DeviceState qdev; > + uint32_t idx; /* index in memory hotplug register/bitmap */ > + ram_addr_t start; /* starting physical address */ > + ram_addr_t size; > + uint32_t node; /* numa node proximity */ > + uint32_t populated; /* 1 means device has been hotplugged. Default is 0. */ > + MemoryRegion *mr; /* MemoryRegion for this slot. !NULL only if populated */ > + QTAILQ_ENTRY(DimmDevice) nextdimm; > +}; > + > +typedef struct DimmConfig { > + const char *name; > + uint32_t idx; /* index in linear memory hotplug bitmap */ > + const char *bus_name; > + ram_addr_t start; /* starting physical address */ > + ram_addr_t size; > + uint32_t node; /* numa node proximity */ > + uint32_t populated; /* 1 means device has been hotplugged. Default is 0. */ > + QTAILQ_ENTRY(DimmConfig) nextdimmcfg; > +} DimmConfig; > + > +typedef int (*dimm_hotplug_fn)(DeviceState *qdev, DimmDevice *dev, int add); > +typedef hwaddr(*dimm_calcoffset_fn)(DeviceState *dev, uint64_t size); > + > +#define TYPE_DIMM_BUS "dimmbus" > +#define DIMM_BUS(obj) OBJECT_CHECK(DimmBus, (obj), TYPE_DIMM_BUS) > + > +typedef struct DimmBus { > + BusState qbus; > + DeviceState *dimm_hotplug_qdev; > + dimm_hotplug_fn dimm_hotplug; > + DimmConfiglist dimmconfig_list; > + QTAILQ_HEAD(Dimmlist, DimmDevice) dimmlist; > + QLIST_ENTRY(DimmBus) next; > +} DimmBus; > + > +struct dimm_hp_result { > + const char *dimmname; > + dimm_hp_result_code ret; > + QTAILQ_ENTRY(dimm_hp_result) next; > +}; > + > +void dimm_bus_hotplug(dimm_hotplug_fn hotplug, DeviceState *qdev); > +void dimm_setup_fwcfg_layout(uint64_t *fw_cfg_slots); > +int dimm_add(char *id); > +DimmBus *dimm_bus_create(Object *parent, const char *name, uint32_t max_dimms, > + dimm_calcoffset_fn pmc_set_offset); > +void dimm_config_create(char *id, uint64_t size, const char *bus, uint64_t node, > + uint32_t dimm_idx, uint32_t populated); > + > +#endif

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[PATCH] Cleanup QEMU_CFG_NUMA fw_cfg processing - split into two romfile entries.
by Kevin O'Connor 23 Mar '13

23 Mar '13

The QEMU_CFG_NUMA fw_cfg entry is actually two separate tables in one fw_cfg entry - a table for cpu affinity and a table for the memory map. Create two romfile entries to make that more clear. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/acpi.c | 25 ++++++++++++++----------- src/paravirt.c | 7 +++++-- 2 files changed, 19 insertions(+), 13 deletions(-) diff --git a/src/acpi.c b/src/acpi.c index bc4d8ea..55c7259 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -646,14 +646,13 @@ acpi_build_srat_memory(struct srat_memory_affinity *numamem, static void * build_srat(void) { - int filesize; - u64 *numadata = romfile_loadfile("etc/numa-nodes", &filesize); - if (!numadata) - return NULL; - int max_cpu = romfile_loadint("etc/max-cpus", 0); - int nb_numa_nodes = (filesize / sizeof(u64)) - max_cpu; - if (!nb_numa_nodes) - return NULL; + int numadatasize, numacpusize; + u64 *numadata = romfile_loadfile("etc/numa-nodes", &numadatasize); + u64 *numacpumap = romfile_loadfile("etc/numa-cpu-map", &numacpusize); + if (!numadata || !numacpumap) + goto fail; + int max_cpu = numacpusize / sizeof(u64); + int nb_numa_nodes = numadatasize / sizeof(u64); struct system_resource_affinity_table *srat; int srat_size = sizeof(*srat) + @@ -663,8 +662,7 @@ build_srat(void) srat = malloc_high(srat_size); if (!srat) { warn_noalloc(); - free(numadata); - return NULL; + goto fail; } memset(srat, 0, srat_size); @@ -677,7 +675,7 @@ build_srat(void) core->type = SRAT_PROCESSOR; core->length = sizeof(*core); core->local_apic_id = i; - curnode = *numadata++; + curnode = *numacpumap++; core->proximity_lo = curnode; memset(core->proximity_hi, 0, 3); core->local_sapic_eid = 0; @@ -731,7 +729,12 @@ build_srat(void) build_header((void*)srat, SRAT_SIGNATURE, srat_size, 1); free(numadata); + free(numacpumap); return srat; +fail: + free(numadata); + free(numacpumap); + return NULL; } static void * diff --git a/src/paravirt.c b/src/paravirt.c index 4a26c6e..ee6a86e 100644 --- a/src/paravirt.c +++ b/src/paravirt.c @@ -223,8 +223,11 @@ qemu_cfg_legacy(void) // NUMA data u64 numacount; qemu_cfg_read_entry(&numacount, QEMU_CFG_NUMA, sizeof(numacount)); - numacount += romfile_loadint("etc/max-cpus", 0); - qemu_romfile_add("etc/numa-nodes", QEMU_CFG_NUMA, sizeof(numacount) + int max_cpu = romfile_loadint("etc/max-cpus", 0); + qemu_romfile_add("etc/numa-cpu-map", QEMU_CFG_NUMA, sizeof(numacount) + , max_cpu*sizeof(u64)); + qemu_romfile_add("etc/numa-nodes", QEMU_CFG_NUMA + , sizeof(numacount) + max_cpu*sizeof(u64) , numacount*sizeof(u64)); // e820 data -- 1.7.11.7

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[PATCHv4] acpi: make default DSDT optional
by Michael S. Tsirkin 23 Mar '13

23 Mar '13

Since commit f7e4dd6c18ccfbaf6cd2f5eaaed2b77cabc8a406 QEMU loads its own copy of DSDT, so let's not build in PIIX. This makes building in the DSDT an option, default to on (built-in). If no one complains for a while, we'll be able to switch it off and then maybe remove altogether. With CONFIG_ACPI_DSDT = y Total size: 127348 Fixed: 58892 Free: 3724 (used 97.2% of 128KiB rom) With CONFIG_ACPI_DSDT = n Total size: 122844 Fixed: 58884 Free: 8228 (used 93.7% of 128KiB rom) Signed-off-by: Michael S. Tsirkin <mst(a)redhat.com> --- Changes from v3: - More changes suggested by Laszlo and Kevin, missed in v2. Better document the new option as suggested by Paul and Kevin. Changes from v2: - fixed and extended the commit log addressing comments by Gerd, Laszlo, Paul. No functional changes. Changes from v1: - default the new option to y to reduce disruption to existing users src/Kconfig | 10 ++++++++++ src/acpi.c | 3 ++- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/src/Kconfig b/src/Kconfig index 3141069..5796173 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -387,6 +387,16 @@ menu "BIOS Tables" default y help Support generation of ACPI tables. + config ACPI_DSDT + bool "Include default ACPI DSDT" + default y + depends on ACPI + help + Include default DSDT ACPI table in BIOS. + Required for QEMU 1.3 and older. + This option can be disabled for QEMU 1.4 and newer + to save some space in the ROM file. + If unsure, say Y. endmenu source vgasrc/Kconfig diff --git a/src/acpi.c b/src/acpi.c index 119d1c1..88abc09 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -826,7 +826,8 @@ acpi_setup(void) break; } } - if (fadt && !fadt->dsdt) { + + if (CONFIG_ACPI_DSDT && fadt && !fadt->dsdt) { /* default DSDT */ void *dsdt = malloc_high(sizeof(AmlCode)); if (!dsdt) { -- MST

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[PATCH v3] pciinit: Enable default VGA device
by Alex Williamson 23 Mar '13

23 Mar '13

As QEMU gains PCI bridge and PCIe root port support, we won't always find the VGA device on the root bus. We therefore need to add support to find and enable a VGA device and the path to it through the VGA Enable support in the PCI bridge control register. Signed-off-by: Alex Williamson <alex.williamson(a)redhat.com> --- v3: use pci_config_maskw() to trim out some code v2: move to qemu specific pciinit.c src/optionroms.c | 2 +- src/pciinit.c | 40 ++++++++++++++++++++++++++++++++++++++++ src/util.h | 1 + 3 files changed, 42 insertions(+), 1 deletion(-) diff --git a/src/optionroms.c b/src/optionroms.c index caa2151..ac92613 100644 --- a/src/optionroms.c +++ b/src/optionroms.c @@ -213,7 +213,7 @@ run_file_roms(const char *prefix, int isvga, u64 *sources) ****************************************************************/ // Verify device is a vga device with legacy address decoding enabled. -static int +int is_pci_vga(struct pci_device *pci) { if (pci->class != PCI_CLASS_DISPLAY_VGA) diff --git a/src/pciinit.c b/src/pciinit.c index ce0a4cc..bb9355f 100644 --- a/src/pciinit.c +++ b/src/pciinit.c @@ -316,6 +316,44 @@ static void pci_bios_init_devices(void) } } +static void pci_enable_default_vga(void) +{ + struct pci_device *pci; + + foreachpci(pci) { + if (is_pci_vga(pci)) { + dprintf(1, "PCI: Using %02x:%02x.%x for primary VGA\n", + pci_bdf_to_bus(pci->bdf), pci_bdf_to_dev(pci->bdf), + pci_bdf_to_fn(pci->bdf)); + return; + } + } + + pci = pci_find_class(PCI_CLASS_DISPLAY_VGA); + if (!pci) { + dprintf(1, "PCI: No VGA devices found\n"); + return; + } + + dprintf(1, "PCI: Enabling %02x:%02x.%x for primary VGA\n", + pci_bdf_to_bus(pci->bdf), pci_bdf_to_dev(pci->bdf), + pci_bdf_to_fn(pci->bdf)); + + pci_config_maskw(pci->bdf, PCI_COMMAND, 0, + PCI_COMMAND_IO | PCI_COMMAND_MEMORY); + + while (pci->parent) { + pci = pci->parent; + + dprintf(1, "PCI: Setting VGA enable on bridge %02x:%02x.%x\n", + pci_bdf_to_bus(pci->bdf), pci_bdf_to_dev(pci->bdf), + pci_bdf_to_fn(pci->bdf)); + + pci_config_maskw(pci->bdf, PCI_BRIDGE_CONTROL, 0, PCI_BRIDGE_CTL_VGA); + pci_config_maskw(pci->bdf, PCI_COMMAND, 0, + PCI_COMMAND_IO | PCI_COMMAND_MEMORY); + } +} /**************************************************************** * Platform device initialization @@ -804,4 +842,6 @@ pci_setup(void) pci_bios_init_devices(); free(busses); + + pci_enable_default_vga(); } diff --git a/src/util.h b/src/util.h index af029fc..99aff78 100644 --- a/src/util.h +++ b/src/util.h @@ -344,6 +344,7 @@ void vgahook_setup(struct pci_device *pci); // optionroms.c void call_bcv(u16 seg, u16 ip); +int is_pci_vga(struct pci_device *pci); void optionrom_setup(void); void vgarom_setup(void); void s3_resume_vga(void);

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qemu / seabios ACPI table interface
by Laszlo Ersek 23 Mar '13

23 Mar '13

I'm confused. What are the requirements? (1) should unpatched qemu work with patched seabios? (2) should patched qemu work with unpatched seabios? Considering patched qemu + patched seabios, (3) should qemu dynamically control table origin/contents per table? (4) should qemu be able to suppress/disable a seabios table via fw_cfg without providing a replacement? I had thought: (1) yes (firmware upgrade on same hardware), (2) no (hardware upgrade), (3) yes (eases development and ultimately covers everything), (4) no (*) but apparently I'm wrong. I'm ready to be enlightened and try to implement whatever the consensus is, but what is the consensus? (*) For each table we can investigate why SeaBIOS provides it now: - RSDP, RSDT, XSDT: These look like links-only tables. In general, links (pointers) have to be updated by the firmware (eg. in the FADT), thus qemu would provide zeros in those fields in general. Since these three tables consist of nothing more than pointers, qemu would never provide any of these tables. Choice between RSDT and XSDT is the jurisdiction of the boot firmware, and it should choose exactly one. (SeaBIOS currently uses RSDT, OVMF uses XSDT.) - FADT (FACP): required by the spec. Qemu would either put up with SeaBIOS's or provide a replacement. - FACS: always prepared by the boot firmware. - DSDT: Same as FADT. - SSDT: a continuation of the DSDT; there can be several instances. If the DSDT comes from qemu, SeaBIOS shouldn't install any SSDTs of its own. Qemu won't provide SSDTs without its own DSDT. - APIC (MADT): required in the "APIC interrupt model", which is probably "always" for us. Hence same as with FADT/DSDT. - HPET: Hardware dependent. If qemu doesn't provide the hardware, it also wouldn't provide the table, and SeaBIOS already doesn't install one itself because there's no hardware. If the hardware is there, qemu provides the table, or puts up with SeaBIOS's. - SRAT: Dependent on NUMA setup. Same case as with HPET. - MCFG: Seems to depend on hardware (q35). Same as with HPET. (I'll be out of the office next week -- if I don't follow up, that's the reason.) Thanks Laszlo

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[PATCH] README: document which config options to use
by Michael S. Tsirkin 21 Mar '13

21 Mar '13

In the interim of moving ACPI tables out of seabios, developers should get the config from QEMU tree to keep things in sync. Signed-off-by: Michael S. Tsirkin <mst(a)redhat.com> --- README | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/README b/README index a87a0ad..c6a2ee4 100644 --- a/README +++ b/README @@ -1,9 +1,21 @@ This code implements an X86 legacy bios. It is intended to be compiled using standard gnu tools (eg, gas and gcc). -To build, one should be able to run "make" in the main directory. The -resulting file "out/bios.bin" contains the processed bios image. +To build, one should be able to run "make" in the main directory. +QEMU might only need a part of the BIOS binary, and different QEMU versions +might need different seabios configurations to work well. To build +a bios for qemu, one needs to copy the config file from qemu source tree: + + cp $QEMU_DIR/roms/config.seabios $SEABIOS_DIR/.config + +(where $QEMU_DIR is the qemu source directory, $SEABIOS_DIR points to the +seabios build directory); and then run make in the seabios main directory with +this configuration: + + make olddefconfig + +The resulting file "out/bios.bin" contains the processed bios image. Testing of images: -- MST

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[PATCH] README: document which config options to use
by Michael S. Tsirkin 21 Mar '13

21 Mar '13

In the interim of moving ACPI tables out of seabios, developers should get the config from QEMU tree to keep things in sync. Signed-off-by: Michael S. Tsirkin <mst(a)redhat.com> --- README | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/README b/README index a87a0ad..380fc80 100644 --- a/README +++ b/README @@ -4,6 +4,12 @@ compiled using standard gnu tools (eg, gas and gcc). To build, one should be able to run "make" in the main directory. The resulting file "out/bios.bin" contains the processed bios image. +QEMU might only need a part of the BIOS binary, and different QEMU versions +might need different seabios configurations to work well. To build +a bios for qemu, one needs to copy the config file from qemu source tree: + cp roms/config.seabios seabios/.config +and then run make with this configuration: + make -C seabios olddefconfig Testing of images: -- MST

2 2

[PATCH v15 1/2] add pvpanic device driver
by Hu Tao 21 Mar '13

21 Mar '13

pvpanic device is used to notify host(qemu) when guest panic happens. Signed-off-by: Hu Tao <hutao(a)cn.fujitsu.com> --- ref: http://lists.nongnu.org/archive/html/qemu-devel/2013-03/msg03630.html The version number is 15 to consist with qemu patches. src/acpi-dsdt-isa.dsl | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/src/acpi-dsdt-isa.dsl b/src/acpi-dsdt-isa.dsl index 23761db..87a31b9 100644 --- a/src/acpi-dsdt-isa.dsl +++ b/src/acpi-dsdt-isa.dsl @@ -99,4 +99,34 @@ Scope(\_SB.PCI0.ISA) { IRQNoFlags() { 3 } }) } + + Device(PEVT) { + Name(_HID, "QEMU0001") + OperationRegion(PEOR, SystemIO, 0x0505, 0x01) + Field(PEOR, ByteAcc, NoLock, Preserve) { + PEPT, 8, + } + + Method(_STA, 0, NotSerialized) { + Store(PEPT, Local0) + If (LEqual(Local0, Zero)) { + Return (0x00) + } Else { + Return (0x0F) + } + } + + Method(RDPT, 0, NotSerialized) { + Store(PEPT, Local0) + Return (Local0) + } + + Method(WRPT, 1, NotSerialized) { + Store(Arg0, PEPT) + } + + Name(_CRS, ResourceTemplate() { + IO(Decode16, 0x0505, 0x0505, 0x01, 0x01) + }) + } } -- 1.8.1.4

1 0

Re: [SeaBIOS] [Qemu-devel] [RFC PATCH v4 07/30] Add SIZE type to qdev properties
by li guang 21 Mar '13

21 Mar '13

在 2012-12-18二的 13:41 +0100，Vasilis Liaskovitis写道： > This patch adds a 'SIZE' type property to qdev. > > It will make dimm description more convenient by allowing sizes to be specified > with K,M,G,T prefixes instead of number of bytes e.g.: > -device dimm,id=mem0,size=2G,bus=membus.0 > > Credits go to Ian Molton for original patch. See: > http://patchwork.ozlabs.org/patch/38835/ > > Signed-off-by: Vasilis Liaskovitis <vasilis.liaskovitis(a)profitbricks.com> > --- > hw/qdev-properties.c | 60 ++++++++++++++++++++++++++++++++++++++++++++++++++ > hw/qdev-properties.h | 3 ++ > qemu-option.c | 2 +- > qemu-option.h | 2 + > 4 files changed, 66 insertions(+), 1 deletions(-) > > diff --git a/hw/qdev-properties.c b/hw/qdev-properties.c > index 81d901c..a77f760 100644 > --- a/hw/qdev-properties.c > +++ b/hw/qdev-properties.c > @@ -1279,3 +1279,63 @@ void qemu_add_globals(void) > { > qemu_opts_foreach(qemu_find_opts("global"), qdev_add_one_global, NULL, 0); > } > + > +/* --- 64bit unsigned int 'size' type --- */ > + > +static void get_size(Object *obj, Visitor *v, void *opaque, > + const char *name, Error **errp) > +{ > + DeviceState *dev = DEVICE(obj); > + Property *prop = opaque; > + uint64_t *ptr = qdev_get_prop_ptr(dev, prop); > + > + visit_type_size(v, ptr, name, errp); > +} > + > +static void set_size(Object *obj, Visitor *v, void *opaque, > + const char *name, Error **errp) > +{ > + DeviceState *dev = DEVICE(obj); > + Property *prop = opaque; > + uint64_t *ptr = qdev_get_prop_ptr(dev, prop); > + > + if (dev->state != DEV_STATE_CREATED) { > + error_set(errp, QERR_PERMISSION_DENIED); > + return; > + } > + > + visit_type_size(v, ptr, name, errp); > +} > + > +static int parse_size(DeviceState *dev, Property *prop, const char *str) > +{ > + uint64_t *ptr = qdev_get_prop_ptr(dev, prop); > + Error *errp = NULL; > + > + if (str != NULL) { > + parse_option_size(prop->name, str, ptr, &errp); > + } > + assert_no_error(errp); > + return 0; > +} > + > +static int print_size(DeviceState *dev, Property *prop, char *dest, size_t len) > +{ > + uint64_t *ptr = qdev_get_prop_ptr(dev, prop); > + char suffixes[] = {'T', 'G', 'M', 'K', 'B'}; > + int i = 0; > + uint64_t div; > + > + for (div = (long int)1 << 40; !(*ptr / div) ; div >>= 10) { > + i++; > + } > + return snprintf(dest, len, "%0.03f%c", (double)*ptr/div, suffixes[i]); ^^^^^^ ^^^^^^^^^^^^^^^ > +} > + IMHO, you may need (double)(*ptr/div), for type cast is right associated. > +PropertyInfo qdev_prop_size = { > + .name = "size", > + .parse = parse_size, > + .print = print_size, > + .get = get_size, > + .set = set_size, > +}; > diff --git a/hw/qdev-properties.h b/hw/qdev-properties.h > index 5b046ab..0182bef 100644 > --- a/hw/qdev-properties.h > +++ b/hw/qdev-properties.h > @@ -14,6 +14,7 @@ extern PropertyInfo qdev_prop_uint64; > extern PropertyInfo qdev_prop_hex8; > extern PropertyInfo qdev_prop_hex32; > extern PropertyInfo qdev_prop_hex64; > +extern PropertyInfo qdev_prop_size; > extern PropertyInfo qdev_prop_string; > extern PropertyInfo qdev_prop_chr; > extern PropertyInfo qdev_prop_ptr; > @@ -67,6 +68,8 @@ extern PropertyInfo qdev_prop_pci_host_devaddr; > DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_hex32, uint32_t) > #define DEFINE_PROP_HEX64(_n, _s, _f, _d) \ > DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_hex64, uint64_t) > +#define DEFINE_PROP_SIZE(_n, _s, _f, _d) \ > + DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_size, uint64_t) > #define DEFINE_PROP_PCI_DEVFN(_n, _s, _f, _d) \ > DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_pci_devfn, int32_t) > > diff --git a/qemu-option.c b/qemu-option.c > index 27891e7..38e0a11 100644 > --- a/qemu-option.c > +++ b/qemu-option.c > @@ -203,7 +203,7 @@ static void parse_option_number(const char *name, const char *value, > } > } > > -static void parse_option_size(const char *name, const char *value, > +void parse_option_size(const char *name, const char *value, > uint64_t *ret, Error **errp) > { > char *postfix; > diff --git a/qemu-option.h b/qemu-option.h > index ca72986..b8ee5b3 100644 > --- a/qemu-option.h > +++ b/qemu-option.h > @@ -152,5 +152,7 @@ typedef int (*qemu_opts_loopfunc)(QemuOpts *opts, void *opaque); > int qemu_opts_print(QemuOpts *opts, void *dummy); > int qemu_opts_foreach(QemuOptsList *list, qemu_opts_loopfunc func, void *opaque, > int abort_on_failure); > +void parse_option_size(const char *name, const char *value, > + uint64_t *ret, Error **errp); > > #endif

2 2

[RESEND PATCH v2] pciinit: Enable default VGA device
by Alex Williamson 20 Mar '13

20 Mar '13

As QEMU gains PCI bridge and PCIe root port support, we won't always find the VGA device on the root bus. We therefore need to add support to find and enable a VGA device and the path to it through the VGA Enable support in the PCI bridge control register. Signed-off-by: Alex Williamson <alex.williamson(a)redhat.com> --- src/optionroms.c | 2 +- src/pciinit.c | 45 +++++++++++++++++++++++++++++++++++++++++++++ src/util.h | 1 + 3 files changed, 47 insertions(+), 1 deletion(-) diff --git a/src/optionroms.c b/src/optionroms.c index caa2151..ac92613 100644 --- a/src/optionroms.c +++ b/src/optionroms.c @@ -213,7 +213,7 @@ run_file_roms(const char *prefix, int isvga, u64 *sources) ****************************************************************/ // Verify device is a vga device with legacy address decoding enabled. -static int +int is_pci_vga(struct pci_device *pci) { if (pci->class != PCI_CLASS_DISPLAY_VGA) diff --git a/src/pciinit.c b/src/pciinit.c index ce0a4cc..eb49a76 100644 --- a/src/pciinit.c +++ b/src/pciinit.c @@ -316,6 +316,49 @@ static void pci_bios_init_devices(void) } } +static void pci_enable_default_vga(void) +{ + struct pci_device *pci; + + foreachpci(pci) { + if (is_pci_vga(pci)) { + dprintf(1, "PCI: Using %02x:%02x.%x for primary VGA\n", + pci_bdf_to_bus(pci->bdf), pci_bdf_to_dev(pci->bdf), + pci_bdf_to_fn(pci->bdf)); + return; + } + } + + pci = pci_find_class(PCI_CLASS_DISPLAY_VGA); + if (!pci) { + dprintf(1, "PCI: No VGA devices found\n"); + return; + } + + dprintf(1, "PCI: Enabling %02x:%02x.%x for primary VGA\n", + pci_bdf_to_bus(pci->bdf), pci_bdf_to_dev(pci->bdf), + pci_bdf_to_fn(pci->bdf)); + + u16 cmd = pci_config_readw(pci->bdf, PCI_COMMAND); + cmd |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY; + pci_config_writew(pci->bdf, PCI_COMMAND, cmd); + + while (pci->parent) { + pci = pci->parent; + + dprintf(1, "PCI: Setting VGA enable on bridge %02x:%02x.%x\n", + pci_bdf_to_bus(pci->bdf), pci_bdf_to_dev(pci->bdf), + pci_bdf_to_fn(pci->bdf)); + + u8 ctrl = pci_config_readb(pci->bdf, PCI_BRIDGE_CONTROL); + ctrl |= PCI_BRIDGE_CTL_VGA; + pci_config_writeb(pci->bdf, PCI_BRIDGE_CONTROL, ctrl); + + u16 cmd = pci_config_readw(pci->bdf, PCI_COMMAND); + cmd |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY; + pci_config_writew(pci->bdf, PCI_COMMAND, cmd); + } +} /**************************************************************** * Platform device initialization @@ -804,4 +847,6 @@ pci_setup(void) pci_bios_init_devices(); free(busses); + + pci_enable_default_vga(); } diff --git a/src/util.h b/src/util.h index af029fc..99aff78 100644 --- a/src/util.h +++ b/src/util.h @@ -344,6 +344,7 @@ void vgahook_setup(struct pci_device *pci); // optionroms.c void call_bcv(u16 seg, u16 ip); +int is_pci_vga(struct pci_device *pci); void optionrom_setup(void); void vgarom_setup(void); void s3_resume_vga(void);

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SeaBIOS March 2013