SeaBIOS December 2011

seabios@seabios.org

25 participants
64 discussions

[PATCH 0/6] Misc VGA BIOS updates
by Kevin O'Connor 24 Dec '11

24 Dec '11

Over the last few days I've been looking through the vga bios code, and I observed some areas for improvement. -Kevin Kevin O'Connor (6): vgabios: Define video_save_pointer_table layout. vgabios: Minor - use segoff_s for static_functionality ptr. vgabios: Extend information in internal vgamode_s struct. vgabios: Use vgamode_s instead of video_param_table in code. vgabios: Generate video_param_table at runtime. vgabios: Place a signature at offset 0x1e of the rom. vgasrc/vga.c | 28 ++-- vgasrc/vgaentry.S | 4 + vgasrc/vgafb.c | 9 +- vgasrc/vgaio.c | 16 +- vgasrc/vgatables.c | 461 ++++++++++++++++++++++++---------------------------- vgasrc/vgatables.h | 31 ++-- 6 files changed, 256 insertions(+), 293 deletions(-) -- 1.7.6.4

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[PATCH V2 0/9] Initial VBE ROM support
by Julian Pidancet 21 Dec '11

21 Dec '11

This patch set contain ground work for a working VBE implementation. It adds several things: * A configuration menu in seabios Kconfig * The ability to generate a PCI ROM * A skeleton driver to implement the VBE interface Bonus: * Preliminary BOCHS (DISPI) VBE support. Julian Pidancet (9): Rename CONFIG_VBE in CONFIG_VGA_BOCHS and CONFIG_CIRRUS in CONFIG_VGA_CIRRUS Move optionroms definitions into a separate header Add a PCI header to the VGA ROM if needed Add configuration menu for the VGA ROM buildrom.py: Handle image size in PCI header Add vbe_flag field in BDA Merge bootsplash and VGA ROM vbe structure definitions Partially implement VBE interface, create VBE driver skeleton Preliminary DISPI VBE driver implementation Makefile | 2 +- src/Kconfig | 39 ++++++ src/biosvar.h | 3 +- src/bootsplash.c | 86 ++----------- src/optionroms.c | 53 +-------- src/optionroms.h | 59 +++++++++ src/vbe.h | 157 ++++++++++++++++++++++++ tools/buildrom.py | 5 + vgasrc/dispi.h | 55 +++++++++ vgasrc/vbe.c | 340 ++++++++++++++++++++++++++++++++++++++++++++++++++++ vgasrc/vga.c | 299 ++++++++++++++++++++++++++++++++++++++------- vgasrc/vgaentry.S | 11 ++- vgasrc/vgatables.h | 31 ++++- 13 files changed, 962 insertions(+), 178 deletions(-) create mode 100644 src/optionroms.h create mode 100644 src/vbe.h create mode 100644 vgasrc/dispi.h create mode 100644 vgasrc/vbe.c -- Julian Pidancet

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Re: [SeaBIOS] [PATCH RFC 5/7] Add PMM memory allocation facilities for VGA option ROMs
by Kevin O'Connor 21 Dec '11

21 Dec '11

On Tue, Dec 20, 2011 at 11:59:16AM +0000, Mark Marshall wrote: > According to the bits of the PCI spec that I can find, > the option ROM is copied into RAM which is left read-write > while the initialisation vector is called, and the RAM is > then set to read-only after this time. Does your VGA option > ROM use this feature? Do you know of any other's that do? Yes - the SeaBIOS vga rom will self modify. I've seen several other option roms that self modify. > (This is in the V2.1 and V3.0 PCI spec's. Also in at least > the V3.0 PCI spec is says that the initialisation code is > run in "big real mode", with 4G segments, do you know of > any code that uses this feature?). Yes - I've seen other option roms that only work when called in big-real mode. SeaBIOS supports this. The SeaBIOS vga option rom doesn't require it though. > PS. > I'm interested in this because I wrote the OGP VGA BIOS > (in 16-bit x86 ASM), a while ago now. A choice made for > two reasons really: 1, I hadn't found SeaBIOS (And didn't > know quite how well you could get gcc to produce 16-bit > code), and 2, I really wanted to write a chunk of 16-bit > assembler (this was a hobby, not work, so I felt I could > make a crazy choice like that and get away with it). > > If I get a free afternoon, I will try to convert that code > to use the SeaBIOS VGA framework. It's interesting to note > that we have both implemented features that are not in the > other's BIOS. Sounds interesting. -Kevin

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Re: [SeaBIOS] [PATCH RFC 5/7] Add PMM memory allocation facilities for VGA option ROMs
by Julian Pidancet 20 Dec '11

20 Dec '11

On Tue, Dec 20, 2011 at 11:59 AM, Mark Marshall <Mark.Marshall(a)csr.com> wrote: > Hi. > > This patch series looks very interesting to me. > This patch has been dropped from the V2 series? > > According to the bits of the PCI spec that I can find, > the option ROM is copied into RAM which is left read-write > while the initialisation vector is called, and the RAM is > then set to read-only after this time. Does your VGA option > ROM use this feature? Do you know of any other's that do? > (This is in the V2.1 and V3.0 PCI spec's. Also in at least > the V3.0 PCI spec is says that the initialisation code is > run in "big real mode", with 4G segments, do you know of > any code that uses this feature?). > > (I understand that you might be using PMM memory because > you want read-write memory at run time, so my comments > might not be of help, but you could at least store the > pointer to your block in the ROM. I have found some BIOSs > that do modify the ROM image in this way (another common > thing to store is the PCI BDF of the device, and the BAR > locations).) > If you want to look at how I use the PMM stuff, you can see it here: https://github.com/jpidancet/seabios/blob/xengfx/vgasrc/xengfx.c Among all the global variables that I use in this driver, only one really needs to be writable at runtime (after the initialization vector is called), which is current_mode which holds the current vesa mode number. The BOCHS driver version I submitted in the V2 is inspired from BOCHS LGPL'd vgabios (http://nongnu.org/vgabios/), which stores the vesa mode number in the BIOS BDA segment. Every OS has his own way of executing the VGA ROM, and often first check that the checksum of the ROM image is correct before calling it. That's why variables located inside the image really need to be read only after the initialization, you can also see that we rechecksum the image at the end of the initialization vector. -- Julian

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Re: [SeaBIOS] [PATCH RFC 5/7] Add PMM memory allocation facilities for VGA option ROMs
by Mark Marshall 20 Dec '11

20 Dec '11

Hi. This patch series looks very interesting to me. This patch has been dropped from the V2 series? According to the bits of the PCI spec that I can find, the option ROM is copied into RAM which is left read-write while the initialisation vector is called, and the RAM is then set to read-only after this time. Does your VGA option ROM use this feature? Do you know of any other's that do? (This is in the V2.1 and V3.0 PCI spec's. Also in at least the V3.0 PCI spec is says that the initialisation code is run in "big real mode", with 4G segments, do you know of any code that uses this feature?). (I understand that you might be using PMM memory because you want read-write memory at run time, so my comments might not be of help, but you could at least store the pointer to your block in the ROM. I have found some BIOSs that do modify the ROM image in this way (another common thing to store is the PCI BDF of the device, and the BAR locations).) Thanks for the good work, MM PS. I'm interested in this because I wrote the OGP VGA BIOS (in 16-bit x86 ASM), a while ago now. A choice made for two reasons really: 1, I hadn't found SeaBIOS (And didn't know quite how well you could get gcc to produce 16-bit code), and 2, I really wanted to write a chunk of 16-bit assembler (this was a hobby, not work, so I felt I could make a crazy choice like that and get away with it). If I get a free afternoon, I will try to convert that code to use the SeaBIOS VGA framework. It's interesting to note that we have both implemented features that are not in the other's BIOS. > -----Original Message----- > From: seabios-bounces(a)seabios.org [mailto:seabios-bounces@seabios.org] > On Behalf Of Julian Pidancet > Sent: 16 December 2011 14:15 > To: seabios(a)seabios.org > Cc: Julian Pidancet > Subject: [SeaBIOS] [PATCH RFC 5/7] Add PMM memory allocation facilities > for VGA option ROMs > > This patch implements a way for option ROMs to allocate some space > using the bios PMM interface. > > Since the VGA option ROM is placed in read only memory, the only way to > get memory to store global variables is either use the EBDA, or use the > PMM if the BIOS supports it. > > This simple patchs adds only pmm_scan and pmm_allocate. The first one > is used to scan the memory and find the PMM entry point, the second one > is used to request the BIOS to allocate blocks of memory. > > The pmm_find and pmm_deallocate functions are yet to be implemented. > > Signed-off-by: Julian Pidancet <julian.pidancet(a)gmail.com> > --- > Makefile | 2 +- > vgasrc/pmm.c | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++ > vgasrc/pmm.h | 16 ++++++++++++++++ > 3 files changed, 67 insertions(+), 1 deletions(-) create mode 100644 > vgasrc/pmm.c create mode 100644 vgasrc/pmm.h > > diff --git a/Makefile b/Makefile > index cb00958..1b8ba60 100644 > --- a/Makefile > +++ b/Makefile > @@ -171,7 +171,7 @@ $(OUT)bios.bin.elf $(OUT)bios.bin: $(OUT)rom.o > tools/checkrom.py > > # VGA src files > SRCVGA=src/output.c src/util.c vgasrc/vga.c vgasrc/vgafb.c > vgasrc/vgaio.c \ > - vgasrc/vgatables.c vgasrc/vgafonts.c vgasrc/clext.c > + vgasrc/vgatables.c vgasrc/vgafonts.c vgasrc/clext.c > vgasrc/pmm.c > > $(OUT)vgaccode.16.s: $(OUT)autoconf.h ; $(call whole-compile, > $(CFLAGS16) -S -Isrc, $(SRCVGA),$@) > > diff --git a/vgasrc/pmm.c b/vgasrc/pmm.c new file mode 100644 index > 0000000..1732149 > --- /dev/null > +++ b/vgasrc/pmm.c > @@ -0,0 +1,50 @@ > +#include "biosvar.h" // GET_GLOBAL > +#include "util.h" // memset > + > +#define PMM_SIGNATURE 0x4d4d5024 // $PMM > + > +struct pmmheader { > + u32 signature; > + u8 version; > + u8 length; > + u8 checksum; > + u16 entry_offset; > + u16 entry_seg; > + u8 reserved[5]; > +} PACKED; > + > +u32 pmm_allocate(u16 seg, u32 length, u32 handle, u16 flags) { > + u16 ax, dx; > + > + asm volatile ("movw %2, %%es\n" > + "pushw %3\n" > + "pushl %4\n" > + "pushl %5\n" > + "pushw $0x0\n" /* PMM_ALLOCATE */ > + "lcallw *%%es:7\n" > + "addw $12, %%sp\n" > + : "=a"(ax), "=d"(dx) > + : "r"(seg), "r"(flags), "r"(handle), "r"(length) > + : "cc", "memory"); > + > + return (dx << 16) | ax; > +} > + > +u16 pmm_scan(void) > +{ > + u16 seg; > + struct pmmheader *hdr = (struct pmmheader *)0; > + > + for (seg = 0xe000; seg; seg++) { > + u32 val = GET_FARVAR(seg, hdr->signature); > + > + if (val == PMM_SIGNATURE && > + !checksum_far(seg, hdr, GET_FARVAR(seg, hdr->length))) { > + return seg; > + } > + } > + > + return 0; > +} > + > diff --git a/vgasrc/pmm.h b/vgasrc/pmm.h new file mode 100644 index > 0000000..f6479ad > --- /dev/null > +++ b/vgasrc/pmm.h > @@ -0,0 +1,16 @@ > +#include "biosvar.h" // GET_GLOBAL > +#include "util.h" // memset > + > +#define PMM_MEMORY_TYPE_INVALID (0 << 0) > +#define PMM_MEMORY_TYPE_CONVENTION (1 << 0) > +#define PMM_MEMORY_TYPE_EXTENDED (2 << 0) > + > +#define PMM_BLOCK_NOT_ALIGNED (0 << 2) > +#define PMM_BLOCK_ALIGNED (1 << 2) > + > +/* Only in PCI FW spec: */ > +#define PMM_MEMORY_ATTR_TEMPORARY (0 << 3) #define > +PMM_MEMORY_ATTR_PERMANENT (1 << 3) > + > +u32 pmm_allocate(u16 seg, u32 length, u32 handle, u16 flags); > +u16 pmm_scan(void); > -- > Julian Pidancet > > > _______________________________________________ > SeaBIOS mailing list > SeaBIOS(a)seabios.org > http://www.seabios.org/mailman/listinfo/seabios > > > To report this email as spam click > https://www.mailcontrol.com/sr/wQw0zmjPoHdJTZGyOCrrhg== > N4EPHlMQCanThnVWsae6Oy8ZbXXZMxLUPl5hUYCj!eKynw== . Member of the CSR plc group of companies. CSR plc registered in England and Wales, registered number 4187346, registered office Churchill House, Cambridge Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom More information can be found at www.csr.com. Follow CSR on Twitter at http://twitter.com/CSR_PLC and read our blog at www.csr.com/blog

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Re: [SeaBIOS] [Qemu-devel] insmod virtio-blk is broken in qemu 1.0
by Anthony Liguori 20 Dec '11

20 Dec '11

On 12/17/2011 09:25 AM, Richard W.M. Jones wrote: > On Sat, Dec 17, 2011 at 09:22:45AM -0600, Anthony Liguori wrote: >> I've even further narrowed it down to the presents or lack of '-vga >> cirrus'. If you add '-vga cirrus' to the above command line, the >> guest will boot successfully. > > Confirmed: Adding -vga cirrus to the command line cures it too. > > That's a strange one :-) vga sticks out a bit because it's one of the few places where we treat device memory as ram as a performance optimization. The only time vga has been touched in between v0.15 and v1.0 was during the introduction of the memory API. It's this commit: commit d67c3f2cd92aed2247bfa8a9da61a902b7b2ff09 Author: Gerd Hoffmann <kraxel(a)redhat.com> Date: Wed Aug 10 17:34:13 2011 +0200 seabios: update to master commit 8e301472e324b6d6496d8b4ffc66863e99d7a505 user visible changes in seabios: * ahci is enabled by default (and thus in this build). * bootorder support for ahci. * two-pass pci allocator (orders bars by size for better packing). Signed-off-by: Gerd Hoffmann <kraxel(a)redhat.com> :040000 040000 76eb0c81b76563b55cb2bb5c484ccd48b8cfcded 5ec0d65d3a763a5566fe1f4c86269cad6d671020 M pc-bios :040000 040000 a5a7ea6e297c1e7490b0a2c28a06ce56e5be9449 78adb664d3ea82f1a4dd5ec239887ac5b0168a7f M roms It can be reproduced by using virtio and -vga none with a number of PCI devices. The line below is what I used to bisect and reproduce 100% of the time. It's a 64-bit Fedora 15 guest. $ qemu-system-x86_64 -drive file=/home/anthony/images/fedora.img,if=none,snapshot=on,id=hd0 -device virtio-balloon-pci,addr=03.0 -device virtio-blk-pci,addr=04.0,drive=hd0 -kernel ~/vmlinuz-2.6.38.6-26.rc1.fc15.x86_64 -initrd ~/initramfs-2.6.38.6-26.rc1.fc15.x86_64.img -append "root=/dev/mapper/VolGroup-lv_root rd_LVM_LV=VolGroup/lv_root rd_LVM_LV=VolGroup/lv_swap ro console=ttyS0 selinux=0" -nographic -nodefconfig -m 1G -no-reboot -no-hpet -device virtio-serial -chardev socket,path=/tmp/foo.sock,id=channel0,server,nowait -device virtserialport,chardev=channel0,name=org.libguestfs.channel.0 -nodefaults -serial stdio -enable-kvm My guess it that it has something to do with the changes to the PCI allocator. I've confirmed reverting this commit fixes the problem. Regards, Anthony Liguori > > Rich. >

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Cirrus VGA driver work
by Kevin O'Connor 19 Dec '11

19 Dec '11

I was reviewing some of my past work on the Cirrus VGA BIOS port. I rechecked the work and figured I'd post what I had. The code is completely untested. What makes this interesting, though, is that the Cirrus driver is only really lacking VBE support after this. With Julian's recent work, maybe Cirrus support isn't far off. -Kevin diff --git a/vgasrc/clext.c b/vgasrc/clext.c index 36ccad3..225292e 100644 --- a/vgasrc/clext.c +++ b/vgasrc/clext.c @@ -9,6 +9,11 @@ #include "biosvar.h" // GET_GLOBAL #include "util.h" // dprintf + +/**************************************************************** + * tables + ****************************************************************/ + struct cirrus_mode_s { /* + 0 */ u16 mode; @@ -289,6 +294,11 @@ static struct cirrus_mode_s cirrus_modes[] VAR16 = { 0xff,0,0,0,0,0,0,0,0}, }; + +/**************************************************************** + * helper functions + ****************************************************************/ + static struct cirrus_mode_s * cirrus_get_modeentry(u8 mode) { @@ -348,19 +358,63 @@ cirrus_switch_mode(struct cirrus_mode_s *table) vgahw_set_single_palette_reg(0x10, v); } -void +static u8 +cirrus_get_memsize(void) +{ + // get DRAM band width + outb(0x0f, VGAREG_SEQU_ADDRESS); + u8 v = inb(VGAREG_SEQU_DATA); + u8 x = (v >> 3) & 0x03; + if (x == 0x03) { + if (v & 0x80) + // 4MB + return 0x40; + // 2MB + return 0x20; + } + return 0x04 << x; +} + +static void +cirrus_enable_16k_granularity(void) +{ + outb(0x0b, VGAREG_GRDC_ADDRESS); + u8 v = inb(VGAREG_GRDC_DATA); + outb(v | 0x20, VGAREG_GRDC_DATA); +} + +static void +cirrus_clear_vram(u16 param) +{ + cirrus_enable_16k_granularity(); + u8 count = cirrus_get_memsize() * 4; + u8 i; + for (i=0; i<count; i++) { + outw((i<<8) | 0x09, VGAREG_GRDC_ADDRESS); + memset16_far(0xa000, (void*)0, param, 16 * 1024); + } + outw(0x0009, VGAREG_GRDC_ADDRESS); +} + +int cirrus_set_video_mode(u8 mode) { dprintf(1, "cirrus mode %d\n", mode); SET_BDA(vbe_mode, 0); struct cirrus_mode_s *table_g = cirrus_get_modeentry(mode & 0x7f); if (table_g) { - //XXX - cirrus_set_video_mode_extended(table); - return; + cirrus_switch_mode(table_g); + // XXX - pass in mode without 0x7f mask + if (mode & 0x80) + cirrus_clear_vram(0xffff); + SET_BDA(video_mode, mode & 0x7f); + // XXX - return early from caller. + return 0; } table_g = cirrus_get_modeentry(0xfe); cirrus_switch_mode(table_g); dprintf(1, "cirrus mode switch regular\n"); + return -1; } static int @@ -370,6 +424,243 @@ cirrus_check(void) return inb(VGAREG_SEQU_DATA) == 0x12; } + +/**************************************************************** + * extbios + ****************************************************************/ + +static void +cirrus_extbios_80h(struct bregs *regs) +{ + u16 crtc_addr = cirrus_get_crtc(); + outb(0x27, crtc_addr); + u8 v = inb(crtc_addr + 1); + if (v == 0xa0) + // 5430 + regs->ax = 0x0032; + else if (v == 0xb8) + // 5446 + regs->ax = 0x0039; + else + regs->ax = 0x00ff; + regs->bx = 0x00; + return; +} + +static void +cirrus_extbios_81h(struct bregs *regs) +{ + // XXX + regs->ax = 0x0100; +} + +static void +cirrus_extbios_82h(struct bregs *regs) +{ + u16 crtc_addr = cirrus_get_crtc(); + outb(0x27, crtc_addr); + regs->al = inb(crtc_addr + 1) & 0x03; + regs->ah = 0xAF; +} + +static void +cirrus_extbios_85h(struct bregs *regs) +{ + regs->al = cirrus_get_memsize(); +} + +static void +cirrus_extbios_9Ah(struct bregs *regs) +{ + regs->ax = 0x4060; + regs->cx = 0x1132; +} + +extern void a0h_callback(void); +ASM16( + // fatal: not implemented yet + "a0h_callback:" + "cli\n" + "hlt\n" + "retf"); + +static void +cirrus_extbios_A0h(struct bregs *regs) +{ + struct cirrus_mode_s *table_g = cirrus_get_modeentry(regs->al & 0x7f); + regs->ah = (table_g ? 1 : 0); + regs->si = 0xffff; + regs->di = regs->ds = regs->es = regs->bx = (u32)a0h_callback; +} + +static void +cirrus_extbios_A1h(struct bregs *regs) +{ + regs->bx = 0x0e00; // IBM 8512/8513, color +} + +static void +cirrus_extbios_A2h(struct bregs *regs) +{ + regs->al = 0x07; // HSync 31.5 - 64.0 kHz +} + +static void +cirrus_extbios_AEh(struct bregs *regs) +{ + regs->al = 0x01; // High Refresh 75Hz +} + +void +cirrus_extbios(struct bregs *regs) +{ + // XXX - regs->bl < 0x80 or > 0xaf call regular handlers. + switch (regs->bl) { + case 0x80: cirrus_extbios_80h(regs); break; + case 0x81: cirrus_extbios_81h(regs); break; + case 0x82: cirrus_extbios_82h(regs); break; + case 0x85: cirrus_extbios_85h(regs); break; + case 0x9a: cirrus_extbios_9Ah(regs); break; + case 0xa0: cirrus_extbios_A0h(regs); break; + case 0xa1: cirrus_extbios_A1h(regs); break; + case 0xa2: cirrus_extbios_A2h(regs); break; + case 0xae: cirrus_extbios_AEh(regs); break; + default: break; + } +} + + +/**************************************************************** + * vesa calls + ****************************************************************/ + +#if 0 +static u16 +cirrus_vesamode_to_mode(u16 vesamode) +{ + // XXX - convert assembler + return 0; +} + +static u8 +cirrus_get_bpp_bytes(void) +{ + // XXX - convert assembler + return 0; +} + +static void +cirrus_set_line_offset(u16 new_line_offset) +{ + // XXX - convert assembler +} + +static u16 +cirrus_get_line_offset(void) +{ + // XXX - convert assembler + return 0; +} + +static u16 +cirrus_get_line_offset_entry(void *table) +{ + // XXX - convert assembler + return 0; +} + +static void +cirrus_set_start_addr(void *addr) +{ + // XXX - convert assembler +} + +static void * +cirrus_get_start_addr(void) +{ + // XXX - convert assembler + return NULL; +} +#endif + +static void +cirrus_vesa_00h(struct bregs *regs) +{ + // XXX - convert assembler +} + +static void +cirrus_vesa_01h(struct bregs *regs) +{ + // XXX - convert assembler +} + +static void +cirrus_vesa_02h(struct bregs *regs) +{ + // XXX - convert assembler +} + +static void +cirrus_vesa_03h(struct bregs *regs) +{ + // XXX - convert assembler +} + +// XXX - add cirrus_vesa_05h_farentry to vgaentry.S + +static void +cirrus_vesa_05h(struct bregs *regs) +{ + // XXX - convert assembler +} + +static void +cirrus_vesa_06h(struct bregs *regs) +{ + // XXX - convert assembler +} + +static void +cirrus_vesa_07h(struct bregs *regs) +{ + // XXX - convert assembler +} + +static void +cirrus_vesa_10h(struct bregs *regs) +{ + // XXX - convert assembler +} + +static void +cirrus_vesa_not_handled(struct bregs *regs) +{ + debug_stub(regs); + regs->ax = 0x014f; +} + +void +cirrus_vesa(struct bregs *regs) +{ + switch (regs->al) { + case 0x00: cirrus_vesa_00h(regs); break; + case 0x01: cirrus_vesa_01h(regs); break; + case 0x02: cirrus_vesa_02h(regs); break; + case 0x03: cirrus_vesa_03h(regs); break; + case 0x05: cirrus_vesa_05h(regs); break; + case 0x06: cirrus_vesa_06h(regs); break; + case 0x07: cirrus_vesa_07h(regs); break; + case 0x10: cirrus_vesa_10h(regs); break; + default: cirrus_vesa_not_handled(regs); break; + } +} + + +/**************************************************************** + * init + ****************************************************************/ + void cirrus_init(void) { diff --git a/vgasrc/vgatables.h b/vgasrc/vgatables.h index 1e76b3a..48bf828 100644 --- a/vgasrc/vgatables.h +++ b/vgasrc/vgatables.h @@ -205,7 +205,7 @@ void vgahw_enable_video_addressing(u8 disable); void vgahw_init(void); // clext.c -void cirrus_set_video_mode(u8 mode); +int cirrus_set_video_mode(u8 mode); void cirrus_init(void); // vbe.c -- not implemented yet.

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Re: [SeaBIOS] [PATCH RFC 6/7] Partially implement VBE interface, create VBE driver skeleton
by Kevin O'Connor 18 Dec '11

18 Dec '11

On Sat, Dec 17, 2011 at 08:06:13PM +0000, Julian Pidancet wrote: > On Sat, Dec 17, 2011 at 4:17 PM, Kevin O'Connor <kevin(a)koconnor.net> wrote: > > On Fri, Dec 16, 2011 at 02:15:12PM +0000, Julian Pidancet wrote: > > [...] > >> +struct VbeInfoBlock > >> +{ > >> + u8 signature[4]; > >> + u16 version; > >> + u16 oem_string_off; > >> + u16 oem_string_seg; > > > > Looks like this is the same as "struct vesa_info" defined in > > src/bootsplash.c. It doesn't really matter which struct is used, but > > both areas of code should share the same definition. > > > > Also, I think it would be better to use "struct segoff_s" and to use > > "u32 signature". > > > > They indeed seems to be the same structures. Should I move vbe.h in > src/ and make the definitions common for both the VGA ROM and the BIOS > ? Yes - I think having them use a shared definition would be best. -Kevin

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Re: [SeaBIOS] [patch] Skip the bootmenu if only one device is found
by Sebastian Herbszt 18 Dec '11

18 Dec '11

Marc Jones wrote: > The bootmenu is only useful if there are multiple devices. We can > speed up theboot by a few seconds if there is only a single device to > try to boot from. > Signed-off-by: Marc Jones <marcj303(a)gmail.com> Isn't the bootmenu also useful to check if the bios detected other boot devices? Please check the previous discussion [1]. [1] http://www.seabios.org/pipermail/seabios/2011-April/001656.html Sebastian

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Re: [SeaBIOS] Analysis of the current state and proposed future path for SeaBIOS.
by Peter Stuge 18 Dec '11

18 Dec '11

Fred . wrote: > I do not know low-level programming. > So I just come up with ideas that I posted here, and mention stuff > that needs to be documented. > And say that website needs to be improved. Well my point is you can contribute also without programming. The suggestions are good, but if you want to actually work on improving the documentation that's even better! //Peter

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SeaBIOS December 2011