On Fri, Dec 04, 2015 at 07:08:50PM +0000, edward wandasiewicz wrote:
On 4 Dec 2015 7:04 p.m., "Kevin O'Connor" kevin@koconnor.net wrote:
On Fri, Dec 04, 2015 at 06:36:18PM +0000, edward wandasiewicz wrote:
@ John
Is the work on SeaVGABIOS for CBFS work under construction for the Broadwell based Pixel 2015?
Looking at Kevin's chromeimage.sh - showing relevant parts only
CBFSTOOL=cbfstool PAYLOAD=out/bios.bin.elf PAYLOADVGA=out/vgabios.bin
[...]
# # Add SeaVGABIOS to CBFS # $ CBFSTOOL $CBFSFILE add -f $PAYLOADVGA -n vgaroms/seavgabios.rom -t
optionrom
Question - if it is work under construction, the above may or may not show any VGA output? i.e. black screen
Or give it a whirl, and I may surprise myself?
Or stick with
## Extract vgabios from SeaBIOS CBFS area of original image.
ORIGCBFSFILE=orig-seabios.cbfs
$ dd if=$ORIGIMAGE of=$ORIGCBFSFILE skip=2 bs=2M count=1 2> /dev/null
$ CBFSTOOL $ORIGCBFSFILE extract -n pci8086,0406.rom -f pci8086,0406.rom
$ CBFSTOOL $CBFSFILE add -f pci8086,0406.rom -n pci8086,0a06.rom -t
optionrom
The logs you sent me seemed to indicate that SeaVGABIOS was running,
This means use vgaroms/seavgabios.rom
and leave commented parts in a commented state - no need for pci8086,0a06.rom parts
Yes.
-Kevin
Here's what happens with x1 Philips USB attached and x1 Mushkin attached, and we cold boot with Kevin's patched SeaBIOS
FIXED - when Philips drive is detected, it appears only once and once only in the list of bootable devices - cbmem -c attached
BROKE - the Mushkin drive hardly ever gets detected - Google ChromeOS recovery SeaBIOS would always find it
BROKEN - when Mushkin drive is detected, only the Mushkin is showing in the list, no Philips in the list of bootable devices - cbmem -c attached (reboot following a cold boot with Philips only showing)
Sometimes Mushkin will appear on a cold boot - not very often, with no Philips showing in the list, with both devices plugged in on boot up.
****************************** Philips showing once only ******************************
SeaBIOS (version rel-1.9.0-41-ge973a79)
Press ESC for boot menu
Select boot device: 1. AHCI/O: KINGSTON RBU-SUS151S36AGD ATA-10 Hard-Disk (61057 M 2. USB MSC Drive Philips USB Flash Drive PMAP
$ cbmem -c
coreboot-1ccb7ee romstage Wed Feb 25 12:03:33 PST 2015 starting... PM1_STS: 8100 PM1_EN: 0000 PM1_CNT: 00001c00 TCO_STS: 0000 0000 GPE0_STS: 0a0105c0 0200633d 003c003a 00000000 GPE0_EN: 00000000 00000000 00000000 00000000 GEN_PMCON: 0000 2024 520b Previous Sleep State: S5 CPU: Intel(R) Core(TM) i7-5500U CPU @ 2.40GHz CPU: ID 306d4, Broadwell E0 or F0, ucode: 0000001d CPU: AES supported, TXT NOT supported, VT supported MCH: device id 1604 (rev 09) is Broadwell F0 PCH: device id 9cc3 (rev 03) is Broadwell U Premium IGD: device id 1616 (rev 09) is Broadwell U GT2 CPU: frequency set to 2400 MHz Google Chrome set keyboard backlight: 0 status (0) MLB: board version PVT SPD: index 15 (GPIO65=1 GPIO67=1 GPIO68=1 GPIO69=1) SPD: module type is LPDDR3 SPD: module part is EDFB232A1MA-GD-F SPD: banks 8, ranks 2, rows 15, columns 11, density 8192 Mb SPD: device width 16 bits, bus width 64 bits SPD: module size is 8192 MB (per channel) Boot Count incremented to 2433 ME: FW Partition Table : OK ME: Bringup Loader Failure : NO ME: Firmware Init Complete : NO ME: Manufacturing Mode : NO ME: Boot Options Present : NO ME: Update In Progress : NO ME: Current Working State : Normal ME: Current Operation State : Bring up ME: Current Operation Mode : Normal ME: Error Code : No Error ME: Progress Phase : BUP Phase ME: Power Management Event : Pseudo-global reset ME: Progress Phase State : Waiting for DID BIOS message ME: HSIO Version : 8705 (CRC 0xfbc2) FMAP: Found "FMAP" version 1.0 at ffe10000. FMAP: base = 0 size = 800000 #areas = 33 FMAP: area RW_MRC_CACHE found FMAP: offset: 3e0000 FMAP: size: 65536 bytes FMAP: No valid base address, using 0xff800000 FMAP: RW_MRC_CACHE at ffbe0000 (offset 3e0000) MRC cache slot 0 @ ffbe0000 Starting Memory Reference Code Initializing Policy Installing common PPI MRC: Starting... Initializing Memory MRC: Done. MRC Version 2.6.0 Build 0 memcfg DDR3 clock 1600 MHz memcfg channel assignment: A: 0, B 1, C 2 memcfg channel[0] config (007a0020): enhanced interleave mode on rank interleave on DIMMA 8192 MB width x16 dual rank, selected DIMMB 0 MB width x16 single rank memcfg channel[1] config (007a0020): enhanced interleave mode on rank interleave on DIMMA 8192 MB width x16 dual rank, selected DIMMB 0 MB width x16 single rank CBMEM: root @ 7cfff000 254 entries. MRC data at ff7d0d9c 6246 bytes Relocate MRC DATA from ff7d0d9c to 7cfea000 (6246 bytes) create cbmem for dimm information FMAP: Found "FMAP" version 1.0 at ffe10000. FMAP: base = 0 size = 800000 #areas = 33 FMAP: area GBB found FMAP: offset: 611000 FMAP: size: 978944 bytes FMAP: No valid base address, using 0xff800000 FMAP: GBB at ffe11000 (offset 611000) FMAP: Found "FMAP" version 1.0 at ffe10000. FMAP: base = 0 size = 800000 #areas = 33 FMAP: area VBLOCK_A found FMAP: offset: 200000 FMAP: size: 65536 bytes FMAP: No valid base address, using 0xff800000 FMAP: VBLOCK_A at ffa00000 (offset 200000) FMAP: Found "FMAP" version 1.0 at ffe10000. FMAP: base = 0 size = 800000 #areas = 33 FMAP: area VBLOCK_B found FMAP: offset: 2f0000 FMAP: size: 65536 bytes FMAP: No valid base address, using 0xff800000 FMAP: VBLOCK_B at ffaf0000 (offset 2f0000) FMAP: Found "FMAP" version 1.0 at ffe10000. FMAP: base = 0 size = 800000 #areas = 33 FMAP: area FW_MAIN_A found FMAP: offset: 210000 FMAP: size: 720896 bytes FMAP: No valid base address, using 0xff800000 FMAP: FW_MAIN_A at ffa10000 (offset 210000) FMAP: Found "FMAP" version 1.0 at ffe10000. FMAP: base = 0 size = 800000 #areas = 33 FMAP: area FW_MAIN_B found FMAP: offset: 300000 FMAP: size: 720896 bytes FMAP: No valid base address, using 0xff800000 FMAP: FW_MAIN_B at ffb00000 (offset 300000) Decompressing stage fallback/vboot @ 0x7cfc8fc0 (101344 bytes) Loading module at 7cfc9000 with entry 7cfc903c. filesize: 0x8b90 memsize: 0x18ba0 Processing 409 relocs. Offset value of 0x7cfc9000 Calling VbInit() VbInit() input flags 0x3fc4 gbb flags 0x0 VbSharedDataInit, 3072 bytes, header 1096 bytes VbInit sees recovery request = 0 VbInit now sets shared->recovery_reason = 0 TPM: Call RollbackFirmwareSetup(r0, d0) Found TPM SLB9635 TT 1.2 by Infineon TPM: Startup TPM: command 0x99 returned 0x0 TPM: Asserting physical presence TPM: command 0x4000000a returned 0x0 TPM: command 0x65 returned 0x0 TPM: Got flags disable=0, deactivated=0, nvlocked=1 TPM: TlclRead(0x1007, 10) TPM: command 0xcf returned 0x0 TPM: Firmware space sv2 f3 v10001 TPM: SetupTPM() succeeded TPM: RollbackFirmwareSetup 10001 VbInit() output flags 0xce VbInit() returning 0x0 VbInit() returned 0x00000000 Calling VbSelectFirmware() vboot heap: 7cfd1ba0 0x00010000 bytes LoadFirmware started... Checking key block signature... - sig_size=1024, expecting 1024 for algorithm 11 Verifying preamble. - sig_size=512, expecting 512 for algorithm 8 Preamble flags 0x0 Firmware 0 is valid. Saving kernel subkey to shared data: size 512, algo 8 VbSharedDataReserve 1032 bytes at 1096 Will boot firmware index 0 TPM: Set global lock TPM: TlclWrite(0x0, 0) TPM: command 0xcd returned 0x0 TPM: command 0x14 returned 0x0 TPM: SetTPMBootModeState boot mode PCR0 result 0 TPM: command 0x14 returned 0x0 TPM: SetTPMBootModeState HWID PCR1 result 0 VbSelectFirmware() returned 0x00000000 RW ramstage image at 0xffa1f61c, 0x000179cd bytes. Decompressing stage fallback/ramstage @ 0x7cf96fc0 (303240 bytes) Loading module at 7cf97000 with entry 7cf97000. filesize: 0x383d8 memsize: 0x4a048 Processing 2970 relocs. Offset value of 0x7cf97000 Saving ramstage to 7d300000. coreboot-a2a2655 Thu Apr 2 15:11:14 PDT 2015 booting... clocks_per_usec: 2400 CBMEM: recovering 11/254 entries from root @ 7cfff000 Moving GDT to 7cf95000...ok BS: BS_PRE_DEVICE times (us): entry 97 run 22 exit 4 refcode loading from vboot rw area. Decompressing stage fallback/refcode @ 0x7cf60fc0 (201528 bytes) Loading module at 7cf61000 with entry 7cf61000. filesize: 0x29b38 memsize: 0x312f8 Processing 1695 relocs. Offset value of 0x7cf61000 Caching refcode at 0x7d34c020(33000) Initializing Policy Installing common PPI PEI: Starting... Initializing System Agent Initializing PCH PEI: Done. BS: BS_DEV_INIT_CHIPS times (us): entry 4 run 68768 exit 5 Enumerating buses... Show all devs...Before device enumeration. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:03.0: enabled 1 PCI: 00:13.0: enabled 1 PCI: 00:14.0: enabled 1 PCI: 00:15.0: enabled 1 PCI: 00:15.1: enabled 1 PCI: 00:15.2: enabled 1 PCI: 00:15.3: enabled 1 PCI: 00:15.4: enabled 0 PCI: 00:15.5: enabled 0 PCI: 00:15.6: enabled 0 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:17.0: enabled 0 PCI: 00:19.0: enabled 0 PCI: 00:1b.0: enabled 0 PCI: 00:1c.0: enabled 0 PCI: 00:1c.1: enabled 0 PCI: 00:1c.2: enabled 1 PCI: 00:1c.3: enabled 0 PCI: 00:1c.4: enabled 0 PCI: 00:1c.5: enabled 0 PCI: 00:1d.0: enabled 0 PCI: 00:1e.0: enabled 0 PCI: 00:1f.0: enabled 1 PNP: 0c31.0: enabled 1 PNP: 0c09.0: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 0 PCI: 00:1f.6: enabled 1 Compare with tree... Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:03.0: enabled 1 PCI: 00:13.0: enabled 1 PCI: 00:14.0: enabled 1 PCI: 00:15.0: enabled 1 PCI: 00:15.1: enabled 1 PCI: 00:15.2: enabled 1 PCI: 00:15.3: enabled 1 PCI: 00:15.4: enabled 0 PCI: 00:15.5: enabled 0 PCI: 00:15.6: enabled 0 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:17.0: enabled 0 PCI: 00:19.0: enabled 0 PCI: 00:1b.0: enabled 0 PCI: 00:1c.0: enabled 0 PCI: 00:1c.1: enabled 0 PCI: 00:1c.2: enabled 1 PCI: 00:1c.3: enabled 0 PCI: 00:1c.4: enabled 0 PCI: 00:1c.5: enabled 0 PCI: 00:1d.0: enabled 0 PCI: 00:1e.0: enabled 0 PCI: 00:1f.0: enabled 1 PNP: 0c31.0: enabled 1 PNP: 0c09.0: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 0 PCI: 00:1f.6: enabled 1 scan_static_bus for Root Device CPU_CLUSTER: 0 enabled DOMAIN: 0000 enabled DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [8086/0000] ops Normal boot. PCI: 00:00.0 [8086/1604] enabled PCI: 00:02.0 [8086/0000] ops PCI: 00:02.0 [8086/1616] enabled PCI: 00:03.0 [8086/0000] ops PCI: 00:03.0 [8086/160c] enabled PCI: 00:13.0 [8086/0000] ops PCI: 00:13.0 [8086/9cb6] enabled PCI: 00:14.0 [8086/0000] ops PCI: 00:14.0 [8086/9cb1] enabled PCI: 00:15.0 [8086/0000] ops PCI: 00:15.0 [8086/9ce0] enabled PCI: 00:15.1 [8086/0000] ops PCI: 00:15.1 [8086/9ce1] enabled PCI: 00:15.2 [8086/0000] ops PCI: 00:15.2 [8086/9ce2] enabled PCI: 00:15.3 [8086/0000] ops PCI: 00:15.3 [8086/9ce5] enabled PCI: 00:15.4: Disabling device PCI: 00:15.5: Disabling device PCI: 00:15.6: Disabling device PCI: 00:16.0 [8086/0000] ops PCI: 00:16.0 [8086/9cba] enabled PCI: 00:16.1: Disabling device PCI: 00:16.2: Disabling device PCI: 00:16.3: Disabling device PCI: 00:17.0: Disabling device PCI: 00:19.0: Disabling device PCI: 00:1b.0 [8086/0000] ops HDA disabled, I/O buffers routed to ADSP PCI: 00:1b.0 [8086/9ca0] disabled PCI: 00:1c.0 [8086/0000] bus ops PCI: 00:1c.0 [8086/9c90] disabled PCI: 00:1c.1 [8086/0000] bus ops PCI: 00:1c.1 [8086/9c92] disabled PCI: 00:1c.2 [8086/0000] bus ops PCIe Root Port 3 ASPM is enabled PCI: 00:1c.2 [8086/9c94] enabled PCI: 00:1c.3 [8086/0000] bus ops PCI: 00:1c.3 [8086/9c96] disabled PCI: 00:1c.4 [8086/0000] bus ops PCI: 00:1c.4 [8086/9c98] disabled PCI: 00:1c.5 [8086/0000] bus ops PCI: 00:1c.0: Disabling device PCI: 00:1c.0: Timeout waiting for 328h PCI: 00:1c.1: Disabling device PCI: 00:1c.1: Timeout waiting for 328h PCI: 00:1c.3: Disabling device PCI: 00:1c.4: Disabling device PCI: 00:1c.5: Disabling device PCI: 00:1c.5: Timeout waiting for 328h PCH: PCIe map 1c.2 -> 1c.0 PCH: PCIe map 1c.0 -> 1c.1 PCH: PCIe map 1c.1 -> 1c.2 PCH: RPFN 0x00543210 -> 0x00dcb0a9 PCI: 00:1c.5 [8086/9c9a] disabled PCI: 00:1e.0: Disabling device PCI: 00:1f.0 [8086/0000] bus ops PCI: 00:1f.0 [8086/9cc3] enabled PCI: 00:1f.2 [8086/0000] ops PCI: 00:1f.2 [8086/9c83] enabled PCI: 00:1f.3: Disabling device PCI: 00:1f.6 [8086/9ca4] enabled do_pci_scan_bridge for PCI: 00:1c.0 PCI: pci_scan_bus for bus 01 PCI: 01:00.0 [8086/08b1] enabled PCI: pci_scan_bus returning with max=001 Capability: type 0x01 @ 0xc8 Capability: type 0x05 @ 0xd0 Capability: type 0x10 @ 0x40 Capability: type 0x10 @ 0x40 Enabling Common Clock Configuration L1 Sub-State supported from root port 28 L1 Sub-State Support = 0xf CommonModeRestoreTime = 0x28 Power On Value = 0x1e, Power On Scale = 0x0 Capability: type 0x10 @ 0x40 Capability: type 0x01 @ 0xc8 Capability: type 0x05 @ 0xd0 Capability: type 0x10 @ 0x40 ASPM: Enabled L1 do_pci_scan_bridge returns max 1 scan_static_bus for PCI: 00:1f.0 PNP: 0c31.0 enabled PNP: 0c09.0 enabled scan_static_bus for PCI: 00:1f.0 done PCI: pci_scan_bus returning with max=001 scan_static_bus for Root Device done done BS: BS_DEV_ENUMERATE times (us): entry 5 run 17587 exit 5 found VGA at PCI: 00:02.0 Setting up VGA for PCI: 00:02.0 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Allocating resources... Reading resources... Root Device read_resources bus 0 link: 0 CPU_CLUSTER: 0 read_resources bus 0 link: 0 APIC: 00 missing read_resources CPU_CLUSTER: 0 read_resources bus 0 link: 0 done DOMAIN: 0000 read_resources bus 0 link: 0 mc_add_fixed_mmio_resources: Adding PCIEXBAR @ 60 0xf0000000-0xf3ffffff. mc_add_fixed_mmio_resources: Adding MCHBAR @ 48 0xfed10000-0xfed17fff. mc_add_fixed_mmio_resources: Adding DMIBAR @ 68 0xfed18000-0xfed18fff. mc_add_fixed_mmio_resources: Adding EPBAR @ 40 0xfed19000-0xfed19fff. mc_add_fixed_mmio_resources: Adding GDXCBAR @ 5420 0xfed84000-0xfed84fff. mc_add_fixed_mmio_resources: Adding EDRAMBAR @ 5408 0xfed80000-0xfed83fff. MC MAP: TOM: 0x400000000 MC MAP: TOUUD: 0x47f000000 MC MAP: MESEG_BASE: 0x3ff000000 MC MAP: MESEG_LIMIT: 0x7fff0fffff MC MAP: REMAP_BASE: 0x3ff000000 MC MAP: REMAP_LIMIT: 0x47effffff MC MAP: TOLUD: 0x80000000 MC MAP: BGSM: 0x7d800000 MC MAP: BDSM: 0x7e000000 MC MAP: TESGMB: 0x7d000000 MC MAP: GGC: 0x1c1 PCI: 00:1c.0 read_resources bus 1 link: 0 PCI: 00:1c.0 read_resources bus 1 link: 0 done PCI: 00:1f.0 read_resources bus 0 link: 0 PCI: 00:1f.0 read_resources bus 0 link: 0 done DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done Done reading resources. Show resources in subtree (Root Device)...After reading. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 DOMAIN: 0000 child on link 0 PCI: 00:00.0 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 PCI: 00:00.0 PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 48 PCI: 00:00.0 resource base fed18000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 68 PCI: 00:00.0 resource base fed19000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 40 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 5420 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5408 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0 PCI: 00:00.0 resource base c0000 size 7cf40000 align 0 gran 0 limit 0 flags e0004200 index 1 PCI: 00:00.0 resource base 7d000000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 2 PCI: 00:00.0 resource base 7d800000 size 2800000 align 0 gran 0 limit 0 flags f0000200 index 3 PCI: 00:00.0 resource base 100000000 size 37f000000 align 0 gran 0 limit 0 flags e0004200 index 4 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 5 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 6 PCI: 00:02.0 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 101201 index 18 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 PCI: 00:03.0 PCI: 00:03.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 PCI: 00:13.0 PCI: 00:13.0 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 10 PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 PCI: 00:14.0 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 PCI: 00:15.0 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 PCI: 00:15.1 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 PCI: 00:15.2 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 PCI: 00:15.3 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 PCI: 00:15.4 PCI: 00:15.5 PCI: 00:15.6 PCI: 00:16.0 PCI: 00:16.0 resource base 0 size 20 align 5 gran 5 limit ffffffffffffffff flags 201 index 10 PCI: 00:16.1 PCI: 00:16.2 PCI: 00:16.3 PCI: 00:17.0 PCI: 00:19.0 PCI: 00:1b.0 PCI: 00:1c.1 PCI: 00:1c.2 PCI: 00:1c.0 child on link 0 PCI: 01:00.0 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 01:00.0 PCI: 01:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10 PCI: 00:1c.3 PCI: 00:1c.4 PCI: 00:1c.5 PCI: 00:1d.0 PCI: 00:1e.0 PCI: 00:1f.0 child on link 0 PNP: 0c31.0 PCI: 00:1f.0 resource base fec00000 size 1400000 align 0 gran 0 limit 0 flags c0000200 index 31fe PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0 PCI: 00:1f.0 resource base 1400 size 400 align 0 gran 0 limit 0 flags c0000100 index 48 PCI: 00:1f.0 resource base 1000 size 100 align 0 gran 0 limit 0 flags c0000100 index 40 PNP: 0c31.0 PNP: 0c31.0 resource base a size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 PNP: 0c09.0 PCI: 00:1f.2 PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 PCI: 00:1f.2 resource base 0 size 8000 align 15 gran 15 limit ffffffff flags 200 index 24 PCI: 00:1f.3 PCI: 00:1f.6 PCI: 00:1f.6 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done PCI: 00:02.0 20 * [0x0 - 0x3f] io PCI: 00:1f.2 20 * [0x40 - 0x5f] io PCI: 00:1f.2 10 * [0x60 - 0x67] io PCI: 00:1f.2 18 * [0x68 - 0x6f] io PCI: 00:1f.2 14 * [0x70 - 0x73] io PCI: 00:1f.2 1c * [0x74 - 0x77] io DOMAIN: 0000 compute_resources_io: base: 78 size: 78 align: 6 gran: 0 limit: ffff done DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 01:00.0 10 * [0x0 - 0x1fff] mem PCI: 00:1c.0 compute_resources_mem: base: 2000 size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem PCI: 00:13.0 10 * [0x11000000 - 0x110fffff] mem PCI: 00:1c.0 20 * [0x11100000 - 0x111fffff] mem PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem PCI: 00:1f.2 24 * [0x11210000 - 0x11217fff] mem PCI: 00:03.0 10 * [0x11218000 - 0x1121bfff] mem PCI: 00:13.0 14 * [0x1121c000 - 0x1121cfff] mem PCI: 00:15.0 10 * [0x1121d000 - 0x1121dfff] mem PCI: 00:15.0 14 * [0x1121e000 - 0x1121efff] mem PCI: 00:15.1 10 * [0x1121f000 - 0x1121ffff] mem PCI: 00:15.1 14 * [0x11220000 - 0x11220fff] mem PCI: 00:15.2 10 * [0x11221000 - 0x11221fff] mem PCI: 00:15.2 14 * [0x11222000 - 0x11222fff] mem PCI: 00:15.3 10 * [0x11223000 - 0x11223fff] mem PCI: 00:15.3 14 * [0x11224000 - 0x11224fff] mem PCI: 00:1f.6 10 * [0x11225000 - 0x11225fff] mem PCI: 00:16.0 10 * [0x11226000 - 0x1122601f] mem DOMAIN: 0000 compute_resources_mem: base: 11226020 size: 11226020 align: 28 gran: 0 limit: ffffffff done avoid_fixed_resources: DOMAIN: 0000 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff constrain_resources: DOMAIN: 0000 constrain_resources: PCI: 00:00.0 constrain_resources: PCI: 00:02.0 constrain_resources: PCI: 00:03.0 constrain_resources: PCI: 00:13.0 constrain_resources: PCI: 00:14.0 constrain_resources: PCI: 00:15.0 constrain_resources: PCI: 00:15.1 constrain_resources: PCI: 00:15.2 constrain_resources: PCI: 00:15.3 constrain_resources: PCI: 00:16.0 constrain_resources: PCI: 00:1c.0 constrain_resources: PCI: 01:00.0 constrain_resources: PCI: 00:1f.0 constrain_resources: PNP: 0c31.0 constrain_resources: PNP: 0c09.0 constrain_resources: PCI: 00:1f.2 constrain_resources: PCI: 00:1f.6 avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff lim->base 00001800 lim->limit 0000ffff avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff lim->base 80000000 lim->limit efffffff Setting resources... DOMAIN: 0000 allocate_resources_io: base:1800 size:78 align:6 gran:0 limit:ffff Assigned: PCI: 00:02.0 20 * [0x1800 - 0x183f] io Assigned: PCI: 00:1f.2 20 * [0x1840 - 0x185f] io Assigned: PCI: 00:1f.2 10 * [0x1860 - 0x1867] io Assigned: PCI: 00:1f.2 18 * [0x1868 - 0x186f] io Assigned: PCI: 00:1f.2 14 * [0x1870 - 0x1873] io Assigned: PCI: 00:1f.2 1c * [0x1874 - 0x1877] io DOMAIN: 0000 allocate_resources_io: next_base: 1878 size: 78 align: 6 gran: 0 done PCI: 00:1c.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:1c.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done DOMAIN: 0000 allocate_resources_mem: base:d0000000 size:11226020 align:28 gran:0 limit:efffffff Assigned: PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] prefmem Assigned: PCI: 00:02.0 10 * [0xe0000000 - 0xe0ffffff] mem Assigned: PCI: 00:13.0 10 * [0xe1000000 - 0xe10fffff] mem Assigned: PCI: 00:1c.0 20 * [0xe1100000 - 0xe11fffff] mem Assigned: PCI: 00:14.0 10 * [0xe1200000 - 0xe120ffff] mem Assigned: PCI: 00:1f.2 24 * [0xe1210000 - 0xe1217fff] mem Assigned: PCI: 00:03.0 10 * [0xe1218000 - 0xe121bfff] mem Assigned: PCI: 00:13.0 14 * [0xe121c000 - 0xe121cfff] mem Assigned: PCI: 00:15.0 10 * [0xe121d000 - 0xe121dfff] mem Assigned: PCI: 00:15.0 14 * [0xe121e000 - 0xe121efff] mem Assigned: PCI: 00:15.1 10 * [0xe121f000 - 0xe121ffff] mem Assigned: PCI: 00:15.1 14 * [0xe1220000 - 0xe1220fff] mem Assigned: PCI: 00:15.2 10 * [0xe1221000 - 0xe1221fff] mem Assigned: PCI: 00:15.2 14 * [0xe1222000 - 0xe1222fff] mem Assigned: PCI: 00:15.3 10 * [0xe1223000 - 0xe1223fff] mem Assigned: PCI: 00:15.3 14 * [0xe1224000 - 0xe1224fff] mem Assigned: PCI: 00:1f.6 10 * [0xe1225000 - 0xe1225fff] mem Assigned: PCI: 00:16.0 10 * [0xe1226000 - 0xe122601f] mem DOMAIN: 0000 allocate_resources_mem: next_base: e1226020 size: 11226020 align: 28 gran: 0 done PCI: 00:1c.0 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff PCI: 00:1c.0 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.0 allocate_resources_mem: base:e1100000 size:100000 align:20 gran:20 limit:efffffff Assigned: PCI: 01:00.0 10 * [0xe1100000 - 0xe1101fff] mem PCI: 00:1c.0 allocate_resources_mem: next_base: e1102000 size: 100000 align: 20 gran: 20 done Root Device assign_resources, bus 0 link: 0 DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:02.0 10 <- [0x00e0000000 - 0x00e0ffffff] size 0x01000000 gran 0x18 mem64 PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64 PCI: 00:02.0 20 <- [0x0000001800 - 0x000000183f] size 0x00000040 gran 0x06 io PCI: 00:03.0 10 <- [0x00e1218000 - 0x00e121bfff] size 0x00004000 gran 0x0e mem64 PCI: 00:13.0 10 <- [0x00e1000000 - 0x00e10fffff] size 0x00100000 gran 0x14 mem PCI: 00:13.0 14 <- [0x00e121c000 - 0x00e121cfff] size 0x00001000 gran 0x0c mem PCI: 00:14.0 10 <- [0x00e1200000 - 0x00e120ffff] size 0x00010000 gran 0x10 mem64 PCI: 00:15.0 10 <- [0x00e121d000 - 0x00e121dfff] size 0x00001000 gran 0x0c mem PCI: 00:15.0 14 <- [0x00e121e000 - 0x00e121efff] size 0x00001000 gran 0x0c mem PCI: 00:15.1 10 <- [0x00e121f000 - 0x00e121ffff] size 0x00001000 gran 0x0c mem PCI: 00:15.1 14 <- [0x00e1220000 - 0x00e1220fff] size 0x00001000 gran 0x0c mem PCI: 00:15.2 10 <- [0x00e1221000 - 0x00e1221fff] size 0x00001000 gran 0x0c mem PCI: 00:15.2 14 <- [0x00e1222000 - 0x00e1222fff] size 0x00001000 gran 0x0c mem PCI: 00:15.3 10 <- [0x00e1223000 - 0x00e1223fff] size 0x00001000 gran 0x0c mem PCI: 00:15.3 14 <- [0x00e1224000 - 0x00e1224fff] size 0x00001000 gran 0x0c mem PCI: 00:16.0 10 <- [0x00e1226000 - 0x00e122601f] size 0x00000020 gran 0x05 mem64 PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem PCI: 00:1c.0 20 <- [0x00e1100000 - 0x00e11fffff] size 0x00100000 gran 0x14 bus 01 mem PCI: 00:1c.0 assign_resources, bus 1 link: 0 PCI: 01:00.0 10 <- [0x00e1100000 - 0x00e1101fff] size 0x00002000 gran 0x0d mem64 PCI: 00:1c.0 assign_resources, bus 1 link: 0 PCI: 00:1f.0 assign_resources, bus 0 link: 0 PNP: 0c31.0 70 <- [0x000000000a - 0x000000000a] size 0x00000001 gran 0x00 irq <tpm> PCI: 00:1f.0 assign_resources, bus 0 link: 0 PCI: 00:1f.2 10 <- [0x0000001860 - 0x0000001867] size 0x00000008 gran 0x03 io PCI: 00:1f.2 14 <- [0x0000001870 - 0x0000001873] size 0x00000004 gran 0x02 io PCI: 00:1f.2 18 <- [0x0000001868 - 0x000000186f] size 0x00000008 gran 0x03 io PCI: 00:1f.2 1c <- [0x0000001874 - 0x0000001877] size 0x00000004 gran 0x02 io PCI: 00:1f.2 20 <- [0x0000001840 - 0x000000185f] size 0x00000020 gran 0x05 io PCI: 00:1f.2 24 <- [0x00e1210000 - 0x00e1217fff] size 0x00008000 gran 0x0f mem PCI: 00:1f.6 10 <- [0x00e1225000 - 0x00e1225fff] size 0x00001000 gran 0x0c mem64 DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Show resources in subtree (Root Device)...After assigning values. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 DOMAIN: 0000 child on link 0 PCI: 00:00.0 DOMAIN: 0000 resource base 1800 size 78 align 6 gran 0 limit ffff flags 40040100 index 10000000 DOMAIN: 0000 resource base d0000000 size 11226020 align 28 gran 0 limit efffffff flags 40040200 index 10000100 PCI: 00:00.0 PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 48 PCI: 00:00.0 resource base fed18000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 68 PCI: 00:00.0 resource base fed19000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 40 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 5420 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5408 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0 PCI: 00:00.0 resource base c0000 size 7cf40000 align 0 gran 0 limit 0 flags e0004200 index 1 PCI: 00:00.0 resource base 7d000000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 2 PCI: 00:00.0 resource base 7d800000 size 2800000 align 0 gran 0 limit 0 flags f0000200 index 3 PCI: 00:00.0 resource base 100000000 size 37f000000 align 0 gran 0 limit 0 flags e0004200 index 4 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 5 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 6 PCI: 00:02.0 PCI: 00:02.0 resource base e0000000 size 1000000 align 24 gran 24 limit efffffff flags 60000201 index 10 PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit efffffff flags 60101201 index 18 PCI: 00:02.0 resource base 1800 size 40 align 6 gran 6 limit ffff flags 60000100 index 20 PCI: 00:03.0 PCI: 00:03.0 resource base e1218000 size 4000 align 14 gran 14 limit efffffff flags 60000201 index 10 PCI: 00:13.0 PCI: 00:13.0 resource base e1000000 size 100000 align 20 gran 20 limit efffffff flags 60000200 index 10 PCI: 00:13.0 resource base e121c000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 14 PCI: 00:14.0 PCI: 00:14.0 resource base e1200000 size 10000 align 16 gran 16 limit efffffff flags 60000201 index 10 PCI: 00:15.0 PCI: 00:15.0 resource base e121d000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 10 PCI: 00:15.0 resource base e121e000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 14 PCI: 00:15.1 PCI: 00:15.1 resource base e121f000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 10 PCI: 00:15.1 resource base e1220000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 14 PCI: 00:15.2 PCI: 00:15.2 resource base e1221000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 10 PCI: 00:15.2 resource base e1222000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 14 PCI: 00:15.3 PCI: 00:15.3 resource base e1223000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 10 PCI: 00:15.3 resource base e1224000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 14 PCI: 00:15.4 PCI: 00:15.5 PCI: 00:15.6 PCI: 00:16.0 PCI: 00:16.0 resource base e1226000 size 20 align 5 gran 5 limit efffffff flags 60000201 index 10 PCI: 00:16.1 PCI: 00:16.2 PCI: 00:16.3 PCI: 00:17.0 PCI: 00:19.0 PCI: 00:1b.0 PCI: 00:1c.1 PCI: 00:1c.2 PCI: 00:1c.0 child on link 0 PCI: 01:00.0 PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 PCI: 00:1c.0 resource base e1100000 size 100000 align 20 gran 20 limit efffffff flags 60080202 index 20 PCI: 01:00.0 PCI: 01:00.0 resource base e1100000 size 2000 align 13 gran 13 limit efffffff flags 60000201 index 10 PCI: 00:1c.3 PCI: 00:1c.4 PCI: 00:1c.5 PCI: 00:1d.0 PCI: 00:1e.0 PCI: 00:1f.0 child on link 0 PNP: 0c31.0 PCI: 00:1f.0 resource base fec00000 size 1400000 align 0 gran 0 limit 0 flags c0000200 index 31fe PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0 PCI: 00:1f.0 resource base 1400 size 400 align 0 gran 0 limit 0 flags c0000100 index 48 PCI: 00:1f.0 resource base 1000 size 100 align 0 gran 0 limit 0 flags c0000100 index 40 PNP: 0c31.0 PNP: 0c31.0 resource base a size 1 align 0 gran 0 limit 0 flags e0000400 index 70 PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 PNP: 0c09.0 PCI: 00:1f.2 PCI: 00:1f.2 resource base 1860 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 PCI: 00:1f.2 resource base 1870 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 PCI: 00:1f.2 resource base 1868 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 PCI: 00:1f.2 resource base 1874 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c PCI: 00:1f.2 resource base 1840 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 PCI: 00:1f.2 resource base e1210000 size 8000 align 15 gran 15 limit efffffff flags 60000200 index 24 PCI: 00:1f.3 PCI: 00:1f.6 PCI: 00:1f.6 resource base e1225000 size 1000 align 12 gran 12 limit efffffff flags 60000201 index 10 Done allocating resources. BS: BS_DEV_RESOURCES times (us): entry 4 run 7241 exit 5 Enabling resources... PCI: 00:00.0 subsystem <- 0000/0000 PCI: 00:00.0 cmd <- 06 PCI: 00:02.0 subsystem <- 0000/0000 PCI: 00:02.0 cmd <- 03 PCI: 00:03.0 subsystem <- 0000/0000 PCI: 00:03.0 cmd <- 02 PCI: 00:13.0 subsystem <- 0000/0000 PCI: 00:13.0 cmd <- 102 PCI: 00:14.0 subsystem <- 0000/0000 PCI: 00:14.0 cmd <- 102 PCI: 00:15.0 subsystem <- 0000/0000 PCI: 00:15.0 cmd <- 106 PCI: 00:15.1 subsystem <- 0000/0000 PCI: 00:15.1 cmd <- 102 PCI: 00:15.2 subsystem <- 0000/0000 PCI: 00:15.2 cmd <- 102 PCI: 00:15.3 subsystem <- 0000/0000 PCI: 00:15.3 cmd <- 102 PCI: 00:16.0 subsystem <- 0000/0000 PCI: 00:16.0 cmd <- 02 PCI: 00:1c.0 bridge ctrl <- 0003 PCI: 00:1c.0 subsystem <- 0000/0000 PCI: 00:1c.0 cmd <- 06 PCI: 00:1f.0 subsystem <- 0000/0000 PCI: 00:1f.0 cmd <- 107 PCI: 00:1f.2 subsystem <- 0000/0000 PCI: 00:1f.2 cmd <- 103 PCI: 00:1f.6 subsystem <- 0000/0000 PCI: 00:1f.6 cmd <- 102 PCI: 01:00.0 cmd <- 02 done. BS: BS_DEV_ENABLE times (us): entry 4 run 1523 exit 4 SF: Detected W25Q64 with page size 1000, total 800000 FMAP: Found "FMAP" version 1.0 at ffe10000. FMAP: base = 0 size = 800000 #areas = 33 FMAP: area RW_ELOG found FMAP: offset: 3f0000 FMAP: size: 16384 bytes FMAP: No valid base address, using 0xff800000 FMAP: RW_ELOG at ffbf0000 (offset 3f0000) ELOG: FLASH @0x7cfddb30 [SPI 0x003f0000] ELOG: area is 4096 bytes, full threshold 3072, shrink size 1024 ELOG: Event(17) added with size 13 ELOG: Event(93) added with size 9 ELOG: Event(9A) added with size 9 ELOG: Event(9E) added with size 10 ELOG: Event(9F) added with size 14 Initializing devices... Root Device init mainboard_ec_init Chrome EC: Set WAKE mask to 0x00818006 ELOG: Event(91) added with size 10 Chrome EC: Set WAKE mask to 0x00000000 Chrome EC: Set WAKE mask to 0x00000000 Root Device init 3960 usecs CPU_CLUSTER: 0 init CPU has 2 cores, 4 threads enabled. MTRR: Physical address space: 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 0x00000000000c0000 - 0x000000007d800000 size 0x7d740000 type 6 0x000000007d800000 - 0x00000000d0000000 size 0x52800000 type 0 0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1 0x00000000e0000000 - 0x00000000ff800000 size 0x1f800000 type 0 0x00000000ff800000 - 0x0000000100000000 size 0x00800000 type 5 0x0000000100000000 - 0x000000047f000000 size 0x37f000000 type 6 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() MTRR: default type WB/UC MTRR counts: 12/9. MTRR: UC selected as default type. MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6 MTRR: 1 base 0x000000007d800000 mask 0x0000007fff800000 type 0 MTRR: 2 base 0x000000007e000000 mask 0x0000007ffe000000 type 0 MTRR: 3 base 0x00000000d0000000 mask 0x0000007ff0000000 type 1 MTRR: 4 base 0x00000000ff800000 mask 0x0000007fff800000 type 0 MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6 MTRR: 6 base 0x0000000200000000 mask 0x0000007e00000000 type 6 MTRR: 7 base 0x0000000400000000 mask 0x0000007f80000000 type 6 Taking a reserved OS MTRR. MTRR: 8 base 0x000000047f000000 mask 0x0000007fff000000 type 0
MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled
Initializing VR config. PCODE: 24MHz BLCK calibration response: 0 PCODE: 24MHz BLCK calibration value: 0x85000000 PCH Power: PCODE Levels 0x3f1c50c2 0x004cd2c9 microcode: sig=0x306d4 pf=0x40 revision=0x1d Setting up SMI for CPU Loading module at 00038000 with entry 00038000. filesize: 0x180 memsize: 0x180 Processing 10 relocs. Offset value of 0x00038000 SMM Module: stub loaded at 00038000. Will call 7cf9f25c(7cfd00c0) Installing SMM handler to 0x7d000000 Loading module at 7d010000 with entry 7d010a0f. filesize: 0x7760 memsize: 0xb800 Processing 567 relocs. Offset value of 0x7d010000 Loading module at 7d008000 with entry 7d008000. filesize: 0x180 memsize: 0x180 Processing 10 relocs. Offset value of 0x7d008000 SMM Module: placing jmp sequence at 7d007c00 rel16 0x03fd SMM Module: placing jmp sequence at 7d007800 rel16 0x07fd SMM Module: placing jmp sequence at 7d007400 rel16 0x0bfd SMM Module: stub loaded at 7d008000. Will call 7d010a0f(00000000) Initializing Southbridge SMI... ... pmbase = 0x1000
SMI_STS: MCSMI PM1 PM1_STS: WAK PWRBTN In relocation handler: cpu 0 New SMBASE=0x7d000000 IEDBASE=0x7d400000 Writing SMRR. base = 0x7d000006, mask=0xff800800 Relocation complete. CPU: Intel(R) Core(TM) i7-5500U CPU @ 2.40GHz. Loading module at 00030000 with entry 00030000. filesize: 0x140 memsize: 0x140 Processing 16 relocs. Offset value of 0x00030000 Attempting to start 3 APs Waiting for 10ms after sending INIT. Waiting for 1st SIPI to complete...done. Waiting for 2nd SIPI to complete...AP: slot 1 apic_id 1. done. In relocation handler: cpu 1 New SMBASE=0x7cfffc00 IEDBASE=0x7d400000 Writing SMRR. base = 0x7d000006, mask=0xff800800 Relocation complete. AP: slot 2 apic_id 3. AP: slot 3 apic_id 2. In relocation handler: cpu 3 New SMBASE=0x7cfff400 IEDBASE=0x7d400000 Writing SMRR. base = 0x7d000006, mask=0xff800800 Relocation complete. In relocation handler: cpu 2 New SMBASE=0x7cfff800 IEDBASE=0x7d400000 Writing SMRR. base = 0x7d000006, mask=0xff800800 Relocation complete. Initializing CPU #0 CPU: vendor Intel device 306d4 CPU: family 06, model 3d, stepping 04 Setting up local apic... apic_id: 0x00 done. cpu: energy policy set to 6 Turbo is available but hidden Turbo has been enabled CPU #0 initialized Initializing CPU #1 Initializing CPU #3 Initializing CPU #2 CPU: vendor Intel device 306d4 CPU: family 06, model 3d, stepping 04 Setting up local apic... apic_id: 0x01 done. CPU: vendor Intel device 306d4 CPU: family 06, model 3d, stepping 04 Setting up local apic... apic_id: 0x03 done. CPU: vendor Intel device 306d4 CPU: family 06, model 3d, stepping 04 Setting up local apic... apic_id: 0x02 done. cpu: energy policy set to 6 cpu: energy policy set to 6 cpu: energy policy set to 6 CPU #2 initialized CPU #1 initialized CPU #3 initialized Enabling SMIs. Locking SMM. cpu: frequency set to 3000 CPU_CLUSTER: 0 init 39502 usecs PCI: 00:00.0 init Set BIOS_RESET_CPL CPU TDP: 15 Watts PCI: 00:00.0 init 1016 usecs PCI: 00:02.0 init CBFS: WARNING: No file header found at 0x7ff480 - try next aligned address: 0x7ff4c0. CBFS: WARNING: 'pci8086,1616.rom' not found. CBFS: Could not find file 'pci8086,1616.rom'. In CBFS, ROM address for PCI: 00:02.0 = fff004f8 PCI expansion ROM, signature 0xaa55, INIT size 0x10000, data ptr 0x0040 PCI ROM image, vendor ID 8086, device ID 0406, PCI ROM image, Class Code 030000, Code Type 00 Copying VGA ROM Image from fff004f8 to 0xc0000, 0x10000 bytes Real mode stub @00000600: 867 bytes Calling Option ROM... int15_handler: AX=5f35 BX=c000 CX=0002 DX=03da ... Option ROM returned. VBE: Getting information about VESA mode 4161 VBE: resolution: 1280x850@16 VBE: framebuffer: d0000000 VBE: Setting VESA mode 4161 VGA Option ROM has been loaded PCI: 00:02.0 init 719486 usecs PCI: 00:03.0 init Mini-HD: base = e1218000 HDA: Initializing codec #0 HDA: codec viddid: 80862808 HDA: No verb table entry found PCI: 00:03.0 init 3019 usecs PCI: 00:13.0 init ADSP: Enable ACPI Mode IRQ3 PCI: 00:13.0 init 105 usecs PCI: 00:15.0 init Initializing Serial IO device PCI: 00:15.0 init 86 usecs PCI: 00:15.1 init Initializing Serial IO device PCI: 00:15.1 init 35 usecs PCI: 00:15.2 init Initializing Serial IO device PCI: 00:15.2 init 36 usecs PCI: 00:15.3 init Initializing Serial IO device PCI: 00:15.3 init 34 usecs PCI: 00:16.0 init ME: FW Partition Table : OK ME: Bringup Loader Failure : NO ME: Firmware Init Complete : NO ME: Manufacturing Mode : NO ME: Boot Options Present : NO ME: Update In Progress : NO ME: Current Working State : Normal ME: Current Operation State : M0 with UMA ME: Current Operation Mode : Normal ME: Error Code : No Error ME: Progress Phase : Host Communication ME: Power Management Event : Pseudo-global reset ME: Progress Phase State : Host communication established ME: BIOS path: Normal ME: Extend SHA-256: 8e7202fb0a73a025095e0f1341e69e07bb4ef9e6bef976cc70e2cca7863d8f6d ME: found version 10.0.38.1000 ME: Wake Event to ME Reset: 0 ms ME: ME Reset to Platform Reset: 7 ms ME: Platform Reset to CPU Reset: 72 ms ME: ICC SET CLOCK ENABLES 0x013b0000 ME: HMRPFO LOCK NOACK message successful ME: END OF POST NOACK message successful PCI: 00:16.0 init 58 usecs PCI: 00:1c.0 init Initializing PCH PCIe bridge. PCI: 00:1c.0 init 8 usecs PCI: 00:1f.0 init RTC Init IOAPIC: Initializing IOAPIC at 0xfec00000 IOAPIC: Bootstrap Processor Local APIC = 0x00 IOAPIC: ID = 0x02 i8259_configure_irq_trigger: current interrupts are 0x0 i8259_configure_irq_trigger: try to set interrupts 0x200 Set power off after power failure. PCH PM init Disabling ACPI via APMC: done. PCI: 00:1f.0 init 3001 usecs PCI: 00:1f.2 init SATA: Initializing controller in AHCI mode. ABAR: E1210000 PCI: 00:1f.2 init 163 usecs PCI: 00:1f.6 init PCI: 00:1f.6 init 2 usecs PCI: 01:00.0 init PCI: 01:00.0 init 2 usecs PNP: 0c09.0 init Keyboard init... Keyboard Controller self-test failed: 0xde Google Chrome EC: Initializing keyboard. Google Chrome EC: Hello got back 11223344 status (0) Google Chrome EC: version: ro: samus_v1.7.633-4b16a5c rw: samus_v1.7.688-22cf733 running image: 2 PNP: 0c09.0 init 4036 usecs Devices initialized Show all devs...After init. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:03.0: enabled 1 PCI: 00:13.0: enabled 1 PCI: 00:14.0: enabled 1 PCI: 00:15.0: enabled 1 PCI: 00:15.1: enabled 1 PCI: 00:15.2: enabled 1 PCI: 00:15.3: enabled 1 PCI: 00:15.4: enabled 0 PCI: 00:15.5: enabled 0 PCI: 00:15.6: enabled 0 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:17.0: enabled 0 PCI: 00:19.0: enabled 0 PCI: 00:1b.0: enabled 0 PCI: 00:1c.1: enabled 0 PCI: 00:1c.2: enabled 0 PCI: 00:1c.0: enabled 1 PCI: 00:1c.3: enabled 0 PCI: 00:1c.4: enabled 0 PCI: 00:1c.5: enabled 0 PCI: 00:1d.0: enabled 0 PCI: 00:1e.0: enabled 0 PCI: 00:1f.0: enabled 1 PNP: 0c31.0: enabled 1 PNP: 0c09.0: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 0 PCI: 00:1f.6: enabled 1 PCI: 01:00.0: enabled 1 APIC: 01: enabled 1 APIC: 03: enabled 1 APIC: 02: enabled 1 BS: BS_DEV_INIT times (us): entry 4666 run 777033 exit 2 Finalize devices... PCI: 00:16.0 final Devices finalized BS: BS_POST_DEVICE times (us): entry 2 run 23 exit 2 BS: BS_OS_RESUME_CHECK times (us): entry 2 run 17 exit 2 Updating MRC cache data. FMAP: area RW_MRC_CACHE found FMAP: offset: 3e0000 FMAP: size: 65536 bytes FMAP: No valid base address, using 0xff800000 FMAP: RW_MRC_CACHE at ffbe0000 (offset 3e0000) MRC cache slot 0 @ ffbe0000 MRC cache up to date. SF: Detected W25Q64 with page size 1000, total 800000 SPI flash protection: WPSW=1 SRP0=1 spi_flash_protect: PRR 0 is enabled for range 0x003e0000-0x003effff Enabled Protected Range on RW_MRC_CACHE region ACPI: Writing ACPI tables at 7cf44000. ACPI: * FACS ACPI: * DSDT ACPI: * FADT SCI is IRQ9 ACPI: added table 1/32, length now 40 ACPI: * HPET ACPI: added table 2/32, length now 44 ACPI: * MADT SCI is IRQ9 ACPI: added table 3/32, length now 48 ACPI: * MCFG ACPI: added table 4/32, length now 52 ACPI: Patching up global NVS in DSDT at offset 0x00c3 -> 7cf93000 ELOG: Event(A0) added with size 9 Ramoops buffer: 0x100000@0x7ce43000. ACPI: * DSDT @ 7cf44250 Length 4720 ACPI: * SSDT Found 1 CPU(s) with 4 core(s) each. PSS: 2401MHz power 15000 control 0x1e00 status 0x1e00 PSS: 2400MHz power 15000 control 0x1800 status 0x1800 PSS: 1700MHz power 9781 control 0x1100 status 0x1100 PSS: 1300MHz power 7124 control 0xd00 status 0xd00 PSS: 900MHz power 4702 control 0x900 status 0x900 PSS: 500MHz power 2480 control 0x500 status 0x500 PSS: 2401MHz power 15000 control 0x1e00 status 0x1e00 PSS: 2400MHz power 15000 control 0x1800 status 0x1800 PSS: 1700MHz power 9781 control 0x1100 status 0x1100 PSS: 1300MHz power 7124 control 0xd00 status 0xd00 PSS: 900MHz power 4702 control 0x900 status 0x900 PSS: 500MHz power 2480 control 0x500 status 0x500 PSS: 2401MHz power 15000 control 0x1e00 status 0x1e00 PSS: 2400MHz power 15000 control 0x1800 status 0x1800 PSS: 1700MHz power 9781 control 0x1100 status 0x1100 PSS: 1300MHz power 7124 control 0xd00 status 0xd00 PSS: 900MHz power 4702 control 0x900 status 0x900 PSS: 500MHz power 2480 control 0x500 status 0x500 PSS: 2401MHz power 15000 control 0x1e00 status 0x1e00 PSS: 2400MHz power 15000 control 0x1800 status 0x1800 PSS: 1700MHz power 9781 control 0x1100 status 0x1100 PSS: 1300MHz power 7124 control 0xd00 status 0xd00 PSS: 900MHz power 4702 control 0x900 status 0x900 PSS: 500MHz power 2480 control 0x500 status 0x500 ACPI: added table 5/32, length now 56 current = 7cf4abc0 ACPI: done. ACPI tables: 27584 bytes. smbios_write_tables: 7ce42000 Create smbios type 17 Root Device (GOOGLE Samus) CPU_CLUSTER: 0 (Intel Broadwell) APIC: 00 (Intel Broadwell) DOMAIN: 0000 (Intel Broadwell) PCI: 00:00.0 (Intel Broadwell) PCI: 00:02.0 (Intel Broadwell) PCI: 00:03.0 (Intel Broadwell) PCI: 00:13.0 (Intel Broadwell) PCI: 00:14.0 (Intel Broadwell) PCI: 00:15.0 (Intel Broadwell) PCI: 00:15.1 (Intel Broadwell) PCI: 00:15.2 (Intel Broadwell) PCI: 00:15.3 (Intel Broadwell) PCI: 00:15.4 (Intel Broadwell) PCI: 00:15.5 (Intel Broadwell) PCI: 00:15.6 (Intel Broadwell) PCI: 00:16.0 (Intel Broadwell) PCI: 00:16.1 (Intel Broadwell) PCI: 00:16.2 (Intel Broadwell) PCI: 00:16.3 (Intel Broadwell) PCI: 00:17.0 (Intel Broadwell) PCI: 00:19.0 (Intel Broadwell) PCI: 00:1b.0 (Intel Broadwell) PCI: 00:1c.1 (Intel Broadwell) PCI: 00:1c.2 (Intel Broadwell) PCI: 00:1c.0 (Intel Broadwell) PCI: 00:1c.3 (Intel Broadwell) PCI: 00:1c.4 (Intel Broadwell) PCI: 00:1c.5 (Intel Broadwell) PCI: 00:1d.0 (Intel Broadwell) PCI: 00:1e.0 (Intel Broadwell) PCI: 00:1f.0 (Intel Broadwell) PNP: 0c31.0 (LPC TPM) PNP: 0c09.0 (Google Chrome EC) PCI: 00:1f.2 (Intel Broadwell) PCI: 00:1f.3 (Intel Broadwell) PCI: 00:1f.6 (Intel Broadwell) PCI: 01:00.0 (unknown) APIC: 01 (unknown) APIC: 03 (unknown) APIC: 02 (unknown) SMBIOS tables: 541 bytes. Writing table forward entry at 0x00000500 Wrote coreboot table at: 00000500, 0x10 bytes, checksum e2fa Table forward entry ends at 0x00000528. ... aligned to 0x00001000 Writing coreboot table at 0x7ce3a000 rom_table_end = 0x7ce3a000 ... aligned to 0x7ce40000 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000a0000-00000000000fffff: RESERVED 3. 0000000000100000-000000007ce39fff: RAM 4. 000000007ce3a000-000000007cffffff: CONFIGURATION TABLES 5. 000000007d000000-000000007fffffff: RESERVED 6. 00000000f0000000-00000000f3ffffff: RESERVED 7. 00000000fed10000-00000000fed19fff: RESERVED 8. 00000000fed40000-00000000fed44fff: RESERVED 9. 00000000fed80000-00000000fed84fff: RESERVED 10. 0000000100000000-000000047effffff: RAM Wrote coreboot table at: 7ce3a000, 0x2f0 bytes, checksum 4cc8 coreboot table: 776 bytes. CBMEM ROOT 0. 7cfff000 00001000 CAR GLOBALS 1. 7cffe000 00001000 CONSOLE 2. 7cfee000 00010000 POWER STATE 3. 7cfed000 00001000 TIME STAMP 4. 7cfec000 00001000 MRC DATA 5. 7cfea000 00002000 MEM INFO 6. 7cfe9000 00001000 ROMSTAGE 7. 7cfe8000 00001000 ROMSTG STCK 8. 7cfe3000 00005000 VBOOT 9. 7cfe2000 00001000 RAMSTAGE 10. 7cf96000 0004c000 GDT 11. 7cf95000 00001000 ACPI GNVS 12. 7cf93000 00002000 REFCODE 13. 7cf60000 00033000 SMM BACKUP 14. 7cf50000 00010000 ACPI 15. 7cf44000 0000c000 GNVS PTR 16. 7cf43000 00001000 RAMOOPS 17. 7ce43000 00100000 SMBIOS 18. 7ce42000 00001000 COREBOOT 19. 7ce3a000 00008000 BS: BS_WRITE_TABLES times (us): entry 3612 run 2711 exit 2 Booting 0xf5ad byte verified payload at 0xffa1002c. Payload aligned size: 0xf600 Loading segment from rom address 0x0003002c code (compression=1) New segment dstaddr 0x2104020 memsize 0x2311c0 srcaddr 0x30064 filesize 0xf575 Loading segment from rom address 0x00030048 Entry Point 0x02104020 Loading Segment: addr: 0x0000000002104020 memsz: 0x00000000002311c0 filesz: 0x000000000000f575 lb: [0x000000007cf97000, 0x000000007cfe1048) Post relocation: addr: 0x0000000002104020 memsz: 0x00000000002311c0 filesz: 0x000000000000f575 using LZMA [ 0x02104020, 02122fcc, 0x023351e0) <- 00030064 Clearing Segment: addr: 0x0000000002122fcc memsz: 0x0000000000212214 dest 02104020, end 023351e0, bouncebuffer ffffffff Loaded segments Finalizing chipset. Finalizing SMM. BS: BS_PAYLOAD_LOAD times (us): entry 2 run 16126 exit 595 Jumping to boot code at 02104020 CPU0: stack: 7cfdc000 - 7cfdd000, lowest used address 7cfdc2b4, stack used: 3404 bytes
Starting depthcharge on samus... new_rt5677_codec: chip = 0x2C, bits_per_sample = 16, sample_rate = 48000 lr_frame_size = 256, master_clock = 0 The GBB signature is at 0x2004020 and is: 24 47 42 42 Wipe memory regions: [0x00000000001000, 0x000000000a0000) [0x00000000100200, 0x00000002000000) [0x000000023351e0, 0x0000007ce3a000) [0x00000100000000, 0x0000047f000000) Calling VbSelectAndLoadKernel(). VbEcSoftwareSync(devidx=0) cros_ec_init: CrosEC protocol v3 supported (256, 256) cros_ec_probe_passthru: devidx=1 supported (128, 128) Google ChromeOS EC driver ready, id 'samus_v1.7.688-22cf733' Clearing the recovery request. EC hash:8885505d2ff4964a51fac8ef4953548316ff63c55018eaccfe8316e18ecc620c EC-RW hash address, size are 0xffa1f5dc, 32. Hash = 8885505d2ff4964a51fac8ef4953548316ff63c55018eaccfe8316e18ecc620c Expected hash:8885505d2ff4964a51fac8ef4953548316ff63c55018eaccfe8316e18ecc620c VbEcSoftwareSync() in EC-RW and it matches VbEcSoftwareSync(devidx=1) EC hash:77db273c0d3376f404204a9078091f87a012faf8a08266c00be2dcd6a97ca74d EC-RW hash address, size are 0xffa1f5fc, 32. Hash = 77db273c0d3376f404204a9078091f87a012faf8a08266c00be2dcd6a97ca74d Expected hash:77db273c0d3376f404204a9078091f87a012faf8a08266c00be2dcd6a97ca74d VbEcSoftwareSync() in EC-RW and it matches TPM: TlclRead(0x1008, 13) Found TPM SLB9635 TT 1.2 by Infineon TPM: command 0xcf returned 0x0 TPM: command 0x65 returned 0x0 TPM: RollbackKernelRead 10001 Entering VbBootDeveloper() backlight_update called but not implemented. leaving VbDisplayScreenFromGBB() with 0 VbAudioOpen() - ticks_per_msec is 1000 VbAudioOpen() - VbExBeep() is limited VbGetDevMusicNotes: use_short is 0, hdr is 0x0, maxsize is 0 VbGetDevMusicNotes: using 5 default notes VbAudioOpen() - note count 5 Added USB disk 1. Added USB disk 4. VbBootDeveloper() - user pressed Ctrl+L; Try legacy boot CODE/DATA: dst=0xe1e98 dst_len=123240 src=0xffc00060 src_len=63752 compression=1 Shutting down all USB controllers. Removed USB disk 1. Removed USB disk 4. Finalizing Coreboot Exiting depthcharge with code 8 at timestamp: 3491773 SeaBIOS (version rel-1.9.0-41-ge973a79) BUILD: gcc: (GCC) 5.2.0 binutils: (GNU Binutils) 2.25.1 Found coreboot cbmem console @ 7cfee000 Found mainboard GOOGLE Samus malloc preinit Relocating init from 0x000e3420 to 0x7cdee440 (size 47904) malloc init Found CBFS header at 0xffdfffa0 Add romfile: payload (size=63808) Add romfile: vgaroms/seavgabios.rom (size=29184) Add romfile: (size=2003864) multiboot: eax=ff06e, ebx=ffc00044 init ivt init bda init bios32 init PMM init PNPBIOS table init keyboard init mouse init pic math cp init PCI probe PCI device 00:00.0 (vd=8086:1604 c=0600) PCI device 00:02.0 (vd=8086:1616 c=0300) PCI device 00:03.0 (vd=8086:160c c=0403) PCI device 00:14.0 (vd=8086:9cb1 c=0c03) PCI device 00:1c.0 (vd=8086:9c94 c=0604) PCI device 00:1f.0 (vd=8086:9cc3 c=0601) PCI device 00:1f.2 (vd=8086:9c83 c=0106) PCI device 00:1f.6 (vd=8086:9ca4 c=1180) PCI device 01:00.0 (vd=8086:08b1 c=0280) Found 9 PCI devices (max PCI bus is 01) Relocating coreboot bios tables Copying SMBIOS entry point from 0x7ce42000 to 0x000f6980 Copying ACPI RSDP from 0x7cf44000 to 0x000f6950 rsdp=0x000f6950 rsdt=0x7cf44030 fadt=0x7cf48970 pm_tmr_blk=1008 Using pmtimer, ioport 0x1008 init timer WARNING - Timeout at tis_wait_sts:107! Scan for VGA option rom Attempting to init PCI bdf 00:02.0 (vd 8086:1616) Copying data 29184@0xffc0f9b8 to 29184@0x000c0000 Running option rom at c000:0003 pmm call arg1=0 pmm00: length=20 handle=ffffffff flags=9 Turning on vga text mode console SeaBIOS (version rel-1.9.0-41-ge973a79) /7cdec000\ Start thread |7cdec000| init usb |7cdec000| XHCI init on dev 00:14.0: regs @ 0xe1200000, 15 ports, 32 slots, 32 byte contexts |7cdec000| XHCI protocol USB 2.00, 11 ports (offset 1), def 3018 |7cdec000| XHCI protocol USB 3.00, 4 ports (offset 12), def 1000 |7cdec000| XHCI extcap 0xc1 @ e1208040 |7cdec000| XHCI extcap 0xc0 @ e1208070 |7cdec000| XHCI extcap 0x1 @ e1208460 |7cdec000| XHCI extcap 0xa @ e1208480 /7cdeb000\ Start thread |7cdeb000| configure_xhci: resetting init ps2port /7cdea000\ Start thread \7cdec000/ End thread |7cdeb000| configure_xhci: setup 16 scratch pad buffers init lpt Found 0 lpt ports init serial Found 0 serial ports init floppy drives init hard drives init ahci AHCI controller at 1f.2, iobase e1210000, irq 10 AHCI: cap 0xdf34ff03, ports_impl 0x1 /7cdec000\ Start thread |7cdec000| AHCI/0: probing init megasas |7cdec000| AHCI/0: link up |7cdec000| AHCI/0: ... finished, status 0x51, ERROR 0x4 |7cdec000| Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0 |7cdec000| AHCI/0: registering: "AHCI/0: KINGSTON RBU-SUS151S364GD ATA-10 Hard-Disk (61057 MiBytes)" |7cdec000| Registering bootable: AHCI/0: KINGSTON RBU-SUS151S364GD ATA-10 Hard-Disk (61057 MiBytes) (type:2 prio:103 data:f68e0) \7cdec000/ End thread |7cdea000| PS2 keyboard initialized \7cdea000/ End thread /7cdec000\ Start thread /7cdea000\ Start thread /7cde9000\ Start thread /7cde8000\ Start thread /7cde7000\ Start thread /7cde6000\ Start thread /7cde5000\ Start thread /7cde4000\ Start thread /7cde3000\ Start thread /7cde2000\ Start thread /7cde1000\ Start thread /7cde0000\ Start thread /7cddf000\ Start thread /7cdde000\ Start thread /7cddd000\ Start thread |7cddd000| XHCI port #15: 0x00001211, powered, pls 0, speed 4 [Super] |7cddd000| set_address 0x7ce39fb0 |7cddd000| xhci_alloc_pipe: usbdev 0x7cded400, ring 0x7ce39200, slotid 0, epid 1 |7cddd000| xhci_cmd_enable_slot: |7cddd000| xhci_trb_queue: ring 0x7ce39d00 [nidx 1, len 0] |7cddd000| xhci_process_events: status change port #1 |7cddd000| xhci_process_events: status change port #7 |7cddd000| xhci_process_events: status change port #8 |7cddd000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39d00, evt 0x7ce39e00, type 33, eidx 1, cc 1] |7cddd000| xhci_address: enable slot: got slotid 1 |7cddd000| xhci_cmd_address_device: slotid 1 |7cddd000| xhci_trb_queue: ring 0x7ce39d00 [nidx 2, len 0] |7cddd000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39d10, evt 0x7ce39e00, type 33, eidx 2, cc 4] |7cddd000| xhci_cmd_disable_slot: slotid 1 |7cddd000| xhci_trb_queue: ring 0x7ce39d00 [nidx 3, len 0] |7cddd000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39d20, evt 0x7ce39e00, type 33, eidx 3, cc 1] |7cddd000| xhci_address: disable failed (cc 1/4) \7cddd000/ End thread |7cde4000| xhci_hub_reset port #8: 0x000206e1, powered, pls 7, speed 1 [Full] |7cde4000| XHCI port #8: 0x00200603, powered, enabled, pls 0, speed 1 [Full] |7cde4000| set_address 0x7ce39fb0 |7cde4000| xhci_alloc_pipe: usbdev 0x7cded720, ring 0x7ce39200, slotid 0, epid 1 |7cde4000| xhci_cmd_enable_slot: |7cde4000| xhci_trb_queue: ring 0x7ce39d00 [nidx 4, len 0] |7cde4000| xhci_process_events: status change port #8 |7cde4000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39d30, evt 0x7ce39e00, type 33, eidx 4, cc 1] |7cde4000| xhci_address: enable slot: got slotid 2 |7cde4000| xhci_cmd_address_device: slotid 2 |7cde4000| xhci_trb_queue: ring 0x7ce39d00 [nidx 5, len 0] |7cde4000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39d40, evt 0x7ce39e00, type 33, eidx 5, cc 1] |7cde4000| xhci_realloc_pipe: usbdev 0x7cded720, ring 0x7ce39200, slotid 2, epid 1 |7cde4000| config_usb: 0x7ce39320 |7cde4000| xhci_trb_queue: ring 0x7ce39200 [nidx 1, len 8] |7cde4000| xhci_trb_queue: ring 0x7ce39200 [nidx 2, len 8] |7cde4000| xhci_trb_queue: ring 0x7ce39200 [nidx 3, len 0] |7cde4000| xhci_xfer_kick: ring 0x7ce39200, slotid 2, epid 1 |7cde5000| xhci_hub_reset port #7: 0x000206e1, powered, pls 7, speed 1 [Full] |7cde4000| xhci_process_events: ring 0x7ce39200 [trb 0x7ce39220, evt 0x7ce39300, type 32, eidx 3, cc 1] |7cde4000| device rev=0200 cls=e0 sub=01 proto=01 size=64 |7cde4000| xhci_realloc_pipe: usbdev 0x7cded720, ring 0x7ce39200, slotid 2, epid 1 |7cde4000| xhci_realloc_pipe: reconf ctl endpoint pkt size: 8 -> 64 |7cde4000| xhci_cmd_evaluate_context: slotid 2, add 0x2, del 0x0 |7cde4000| xhci_trb_queue: ring 0x7ce39d00 [nidx 6, len 0] |7cde4000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39d50, evt 0x7ce39e00, type 33, eidx 6, cc 1] |7cde4000| xhci_trb_queue: ring 0x7ce39200 [nidx 4, len 8] |7cde4000| xhci_trb_queue: ring 0x7ce39200 [nidx 5, len 9] |7cde4000| xhci_trb_queue: ring 0x7ce39200 [nidx 6, len 0] |7cde4000| xhci_xfer_kick: ring 0x7ce39200, slotid 2, epid 1 |7cde4000| xhci_process_events: ring 0x7ce39200 [trb 0x7ce39250, evt 0x7ce39300, type 32, eidx 6, cc 1] |7cde4000| xhci_trb_queue: ring 0x7ce39200 [nidx 7, len 8] |7cde4000| xhci_trb_queue: ring 0x7ce39200 [nidx 8, len 177] |7cde4000| xhci_trb_queue: ring 0x7ce39200 [nidx 9, len 0] |7cde4000| xhci_xfer_kick: ring 0x7ce39200, slotid 2, epid 1 |7cde4000| xhci_process_events: ring 0x7ce39200 [trb 0x7ce39280, evt 0x7ce39300, type 32, eidx 9, cc 1] \7cde4000/ End thread \7cdea000/ End thread \7cde9000/ End thread \7cde8000/ End thread \7cde6000/ End thread \7cde7000/ End thread \7cde3000/ End thread \7cde2000/ End thread \7cde1000/ End thread \7cde0000/ End thread \7cddf000/ End thread \7cdde000/ End thread |7cde5000| XHCI port #7: 0x00200e03, powered, enabled, pls 0, speed 3 [High] |7cde5000| set_address 0x7ce39fb0 |7cde5000| xhci_alloc_pipe: usbdev 0x7cded7a0, ring 0x7ce39000, slotid 0, epid 1 |7cde5000| xhci_cmd_enable_slot: |7cde5000| xhci_trb_queue: ring 0x7ce39d00 [nidx 7, len 0] |7cde5000| xhci_process_events: status change port #15 |7cde5000| xhci_process_events: status change port #7 |7cde5000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39d60, evt 0x7ce39e00, type 33, eidx 7, cc 1] |7cde5000| xhci_address: enable slot: got slotid 3 |7cde5000| xhci_cmd_address_device: slotid 3 |7cde5000| xhci_trb_queue: ring 0x7ce39d00 [nidx 8, len 0] |7cde5000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39d70, evt 0x7ce39e00, type 33, eidx 8, cc 1] |7cde5000| xhci_realloc_pipe: usbdev 0x7cded7a0, ring 0x7ce39000, slotid 3, epid 1 |7cde5000| config_usb: 0x7ce39120 |7cde5000| xhci_trb_queue: ring 0x7ce39000 [nidx 1, len 8] |7cde5000| xhci_trb_queue: ring 0x7ce39000 [nidx 2, len 8] |7cde5000| xhci_trb_queue: ring 0x7ce39000 [nidx 3, len 0] |7cde5000| xhci_xfer_kick: ring 0x7ce39000, slotid 3, epid 1 |7cdec000| xhci_hub_reset port #1: 0x000206e1, powered, pls 7, speed 1 [Full] |7cde5000| xhci_process_events: ring 0x7ce39000 [trb 0x7ce39020, evt 0x7ce39100, type 32, eidx 3, cc 1] |7cde5000| device rev=0200 cls=ef sub=02 proto=01 size=64 |7cde5000| xhci_realloc_pipe: usbdev 0x7cded7a0, ring 0x7ce39000, slotid 3, epid 1 |7cde5000| xhci_trb_queue: ring 0x7ce39000 [nidx 4, len 8] |7cde5000| xhci_trb_queue: ring 0x7ce39000 [nidx 5, len 9] |7cde5000| xhci_trb_queue: ring 0x7ce39000 [nidx 6, len 0] |7cde5000| xhci_xfer_kick: ring 0x7ce39000, slotid 3, epid 1 |7cde5000| xhci_process_events: ring 0x7ce39000 [trb 0x7ce39050, evt 0x7ce39100, type 32, eidx 6, cc 1] |7cde5000| xhci_trb_queue: ring 0x7ce39000 [nidx 7, len 8] |7cde5000| xhci_trb_queue: ring 0x7ce39000 [nidx 8, len 1001] |7cde5000| xhci_trb_queue: ring 0x7ce39000 [nidx 9, len 0] |7cde5000| xhci_xfer_kick: ring 0x7ce39000, slotid 3, epid 1 |7cde5000| xhci_process_events: ring 0x7ce39000 [trb 0x7ce39080, evt 0x7ce39100, type 32, eidx 9, cc 1] |7cde5000| xhci_trb_queue: ring 0x7ce39000 [nidx 10, len 8] |7cde5000| xhci_trb_queue: ring 0x7ce39000 [nidx 11, len 0] |7cde5000| xhci_xfer_kick: ring 0x7ce39000, slotid 3, epid 1 |7cde5000| xhci_process_events: ring 0x7ce39000 [trb 0x7ce390a0, evt 0x7ce39100, type 32, eidx 11, cc 1] |7cde5000| usb_hid_setup 0x7ce39120 \7cde5000/ End thread |7cdec000| XHCI port #1: 0x00200e03, powered, enabled, pls 0, speed 3 [High] |7cdec000| set_address 0x7ce39fb0 |7cdec000| xhci_alloc_pipe: usbdev 0x7cdedc70, ring 0x7ce28200, slotid 0, epid 1 |7cdec000| xhci_cmd_enable_slot: |7cdec000| xhci_trb_queue: ring 0x7ce39d00 [nidx 9, len 0] |7cdec000| xhci_process_events: status change port #1 |7cdec000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39d80, evt 0x7ce39e00, type 33, eidx 9, cc 1] |7cdec000| xhci_address: enable slot: got slotid 4 |7cdec000| xhci_cmd_address_device: slotid 4 |7cdec000| xhci_trb_queue: ring 0x7ce39d00 [nidx 10, len 0] |7cdec000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39d90, evt 0x7ce39e00, type 33, eidx 10, cc 1] |7cdec000| xhci_realloc_pipe: usbdev 0x7cdedc70, ring 0x7ce28200, slotid 4, epid 1 |7cdec000| config_usb: 0x7ce28320 |7cdec000| xhci_trb_queue: ring 0x7ce28200 [nidx 1, len 8] |7cdec000| xhci_trb_queue: ring 0x7ce28200 [nidx 2, len 8] |7cdec000| xhci_trb_queue: ring 0x7ce28200 [nidx 3, len 0] |7cdec000| xhci_xfer_kick: ring 0x7ce28200, slotid 4, epid 1 |7cdec000| xhci_process_events: ring 0x7ce28200 [trb 0x7ce28220, evt 0x7ce28300, type 32, eidx 3, cc 1] |7cdec000| device rev=0210 cls=00 sub=00 proto=00 size=64 |7cdec000| xhci_realloc_pipe: usbdev 0x7cdedc70, ring 0x7ce28200, slotid 4, epid 1 |7cdec000| xhci_trb_queue: ring 0x7ce28200 [nidx 4, len 8] |7cdec000| xhci_trb_queue: ring 0x7ce28200 [nidx 5, len 9] |7cdec000| xhci_trb_queue: ring 0x7ce28200 [nidx 6, len 0] |7cdec000| xhci_xfer_kick: ring 0x7ce28200, slotid 4, epid 1 |7cdec000| xhci_process_events: ring 0x7ce28200 [trb 0x7ce28250, evt 0x7ce28300, type 32, eidx 6, cc 1] |7cdec000| xhci_trb_queue: ring 0x7ce28200 [nidx 7, len 8] |7cdec000| xhci_trb_queue: ring 0x7ce28200 [nidx 8, len 32] |7cdec000| xhci_trb_queue: ring 0x7ce28200 [nidx 9, len 0] |7cdec000| xhci_xfer_kick: ring 0x7ce28200, slotid 4, epid 1 |7cdec000| xhci_process_events: ring 0x7ce28200 [trb 0x7ce28280, evt 0x7ce28300, type 32, eidx 9, cc 1] |7cdec000| xhci_trb_queue: ring 0x7ce28200 [nidx 10, len 8] |7cdec000| xhci_trb_queue: ring 0x7ce28200 [nidx 11, len 0] |7cdec000| xhci_xfer_kick: ring 0x7ce28200, slotid 4, epid 1 |7cdec000| xhci_process_events: ring 0x7ce28200 [trb 0x7ce282a0, evt 0x7ce28300, type 32, eidx 11, cc 1] |7cdec000| xhci_alloc_pipe: usbdev 0x7cdedc70, ring 0x000edb00, slotid 0, epid 3 |7cdec000| xhci_cmd_configure_endpoint: slotid 4, add 0x9, del 0x0 |7cdec000| xhci_trb_queue: ring 0x7ce39d00 [nidx 11, len 0] |7cdec000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39da0, evt 0x7ce39e00, type 33, eidx 11, cc 1] |7cdec000| xhci_alloc_pipe: usbdev 0x7cdedc70, ring 0x000ed900, slotid 0, epid 4 |7cdec000| xhci_cmd_configure_endpoint: slotid 4, add 0x11, del 0x0 |7cdec000| xhci_trb_queue: ring 0x7ce39d00 [nidx 12, len 0] |7cdec000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39db0, evt 0x7ce39e00, type 33, eidx 12, cc 1] |7cdec000| xhci_trb_queue: ring 0x7ce28200 [nidx 12, len 8] |7cdec000| xhci_trb_queue: ring 0x7ce28200 [nidx 13, len 1] |7cdec000| xhci_trb_queue: ring 0x7ce28200 [nidx 14, len 0] |7cdec000| xhci_xfer_kick: ring 0x7ce28200, slotid 4, epid 1 |7cdec000| xhci_process_events: ring 0x7ce28200 [trb 0x7ce282d0, evt 0x7ce28300, type 32, eidx 14, cc 1] |7cdec000| Searching bootorder for: /pci@i0cf8/usb@14/storage@1/*@0/*@0,0 |7cdec000| Searching bootorder for: /pci@i0cf8/usb@14/usb-*@1 |7cdec000| xhci_trb_queue: ring 0x000ed900 [nidx 1, len 31] |7cdec000| xhci_xfer_kick: ring 0x000ed900, slotid 4, epid 4 |7cdec000| xhci_process_events: ring 0x000ed900 [trb 0x000ed900, evt 0x000eda00, type 32, eidx 1, cc 1] |7cdec000| xhci_trb_queue: ring 0x000edb00 [nidx 1, len 36] |7cdec000| xhci_xfer_kick: ring 0x000edb00, slotid 4, epid 3 |7cdec000| xhci_process_events: ring 0x000edb00 [trb 0x000edb00, evt 0x000edc00, type 32, eidx 1, cc 1] |7cdec000| xhci_trb_queue: ring 0x000edb00 [nidx 2, len 13] |7cdec000| xhci_xfer_kick: ring 0x000edb00, slotid 4, epid 3 |7cdec000| xhci_process_events: ring 0x000edb00 [trb 0x000edb10, evt 0x000edc0 3063 bytes lost
************************* Mushkin showing only *************************
SeaBIOS (version rel-1.9.0-41-ge973a79)
Press ESC for boot menu
Select boot device: 1. AHCI/O: KINGSTON RBU-SUS151S36AGD ATA-10 Hard-Disk (61057 M 2. USB MSC Drive Mushkin Ventura Ultra 0
$ cbmem -c
coreboot-1ccb7ee romstage Wed Feb 25 12:03:33 PST 2015 starting... PM1_STS: 0000 PM1_EN: 0000 PM1_CNT: 00000000 TCO_STS: 0000 0000 GPE0_STS: 0a0105c0 0a00e33d 003c003a 00000000 GPE0_EN: 00000000 00000000 00000000 00000000 GEN_PMCON: 0200 20a0 1a09 Previous Sleep State: S0 CPU: Intel(R) Core(TM) i7-5500U CPU @ 2.40GHz CPU: ID 306d4, Broadwell E0 or F0, ucode: 0000001d CPU: AES supported, TXT NOT supported, VT supported MCH: device id 1604 (rev 09) is Broadwell F0 PCH: device id 9cc3 (rev 03) is Broadwell U Premium IGD: device id 1616 (rev 09) is Broadwell U GT2 CPU: frequency set to 2400 MHz Google Chrome set keyboard backlight: 0 status (0) MLB: board version PVT SPD: index 15 (GPIO65=1 GPIO67=1 GPIO68=1 GPIO69=1) SPD: module type is LPDDR3 SPD: module part is EDFB232A1MA-GD-F SPD: banks 8, ranks 2, rows 15, columns 11, density 8192 Mb SPD: device width 16 bits, bus width 64 bits SPD: module size is 8192 MB (per channel) Boot Count incremented to 2426 ME: FW Partition Table : OK ME: Bringup Loader Failure : NO ME: Firmware Init Complete : NO ME: Manufacturing Mode : NO ME: Boot Options Present : NO ME: Update In Progress : NO ME: Current Working State : Normal ME: Current Operation State : Bring up ME: Current Operation Mode : Normal ME: Error Code : No Error ME: Progress Phase : BUP Phase ME: Power Management Event : Pseudo-global reset ME: Progress Phase State : Waiting for DID BIOS message ME: HSIO Version : 8705 (CRC 0xfbc2) FMAP: Found "FMAP" version 1.0 at ffe10000. FMAP: base = 0 size = 800000 #areas = 33 FMAP: area RW_MRC_CACHE found FMAP: offset: 3e0000 FMAP: size: 65536 bytes FMAP: No valid base address, using 0xff800000 FMAP: RW_MRC_CACHE at ffbe0000 (offset 3e0000) MRC cache slot 0 @ ffbe0000 Starting Memory Reference Code Initializing Policy Installing common PPI MRC: Starting... Initializing Memory MRC: Done. MRC Version 2.6.0 Build 0 memcfg DDR3 clock 1600 MHz memcfg channel assignment: A: 0, B 1, C 2 memcfg channel[0] config (007a0020): enhanced interleave mode on rank interleave on DIMMA 8192 MB width x16 dual rank, selected DIMMB 0 MB width x16 single rank memcfg channel[1] config (007a0020): enhanced interleave mode on rank interleave on DIMMA 8192 MB width x16 dual rank, selected DIMMB 0 MB width x16 single rank CBMEM: root @ 7cfff000 254 entries. MRC data at ff7d0d9c 6246 bytes Relocate MRC DATA from ff7d0d9c to 7cfea000 (6246 bytes) create cbmem for dimm information FMAP: Found "FMAP" version 1.0 at ffe10000. FMAP: base = 0 size = 800000 #areas = 33 FMAP: area GBB found FMAP: offset: 611000 FMAP: size: 978944 bytes FMAP: No valid base address, using 0xff800000 FMAP: GBB at ffe11000 (offset 611000) FMAP: Found "FMAP" version 1.0 at ffe10000. FMAP: base = 0 size = 800000 #areas = 33 FMAP: area VBLOCK_A found FMAP: offset: 200000 FMAP: size: 65536 bytes FMAP: No valid base address, using 0xff800000 FMAP: VBLOCK_A at ffa00000 (offset 200000) FMAP: Found "FMAP" version 1.0 at ffe10000. FMAP: base = 0 size = 800000 #areas = 33 FMAP: area VBLOCK_B found FMAP: offset: 2f0000 FMAP: size: 65536 bytes FMAP: No valid base address, using 0xff800000 FMAP: VBLOCK_B at ffaf0000 (offset 2f0000) FMAP: Found "FMAP" version 1.0 at ffe10000. FMAP: base = 0 size = 800000 #areas = 33 FMAP: area FW_MAIN_A found FMAP: offset: 210000 FMAP: size: 720896 bytes FMAP: No valid base address, using 0xff800000 FMAP: FW_MAIN_A at ffa10000 (offset 210000) FMAP: Found "FMAP" version 1.0 at ffe10000. FMAP: base = 0 size = 800000 #areas = 33 FMAP: area FW_MAIN_B found FMAP: offset: 300000 FMAP: size: 720896 bytes FMAP: No valid base address, using 0xff800000 FMAP: FW_MAIN_B at ffb00000 (offset 300000) Decompressing stage fallback/vboot @ 0x7cfc8fc0 (101344 bytes) Loading module at 7cfc9000 with entry 7cfc903c. filesize: 0x8b90 memsize: 0x18ba0 Processing 409 relocs. Offset value of 0x7cfc9000 Calling VbInit() VbInit() input flags 0x3fc4 gbb flags 0x0 VbSharedDataInit, 3072 bytes, header 1096 bytes VbInit sees recovery request = 0 VbInit now sets shared->recovery_reason = 0 TPM: Call RollbackFirmwareSetup(r0, d0) Found TPM SLB9635 TT 1.2 by Infineon TPM: Startup TPM: command 0x99 returned 0x0 TPM: Asserting physical presence TPM: command 0x4000000a returned 0x0 TPM: command 0x65 returned 0x0 TPM: Got flags disable=0, deactivated=0, nvlocked=1 TPM: TlclRead(0x1007, 10) TPM: command 0xcf returned 0x0 TPM: Firmware space sv2 f3 v10001 TPM: SetupTPM() succeeded TPM: RollbackFirmwareSetup 10001 VbInit() output flags 0xce VbInit() returning 0x0 VbInit() returned 0x00000000 Calling VbSelectFirmware() vboot heap: 7cfd1ba0 0x00010000 bytes LoadFirmware started... Checking key block signature... - sig_size=1024, expecting 1024 for algorithm 11 Verifying preamble. - sig_size=512, expecting 512 for algorithm 8 Preamble flags 0x0 Firmware 0 is valid. Saving kernel subkey to shared data: size 512, algo 8 VbSharedDataReserve 1032 bytes at 1096 Will boot firmware index 0 TPM: Set global lock TPM: TlclWrite(0x0, 0) TPM: command 0xcd returned 0x0 TPM: command 0x14 returned 0x0 TPM: SetTPMBootModeState boot mode PCR0 result 0 TPM: command 0x14 returned 0x0 TPM: SetTPMBootModeState HWID PCR1 result 0 VbSelectFirmware() returned 0x00000000 RW ramstage image at 0xffa1f61c, 0x000179cd bytes. Decompressing stage fallback/ramstage @ 0x7cf96fc0 (303240 bytes) Loading module at 7cf97000 with entry 7cf97000. filesize: 0x383d8 memsize: 0x4a048 Processing 2970 relocs. Offset value of 0x7cf97000 Saving ramstage to 7d300000. coreboot-a2a2655 Thu Apr 2 15:11:14 PDT 2015 booting... clocks_per_usec: 2400 CBMEM: recovering 11/254 entries from root @ 7cfff000 Moving GDT to 7cf95000...ok BS: BS_PRE_DEVICE times (us): entry 107 run 22 exit 4 refcode loading from vboot rw area. Decompressing stage fallback/refcode @ 0x7cf60fc0 (201528 bytes) Loading module at 7cf61000 with entry 7cf61000. filesize: 0x29b38 memsize: 0x312f8 Processing 1695 relocs. Offset value of 0x7cf61000 Caching refcode at 0x7d34c020(33000) Initializing Policy Installing common PPI PEI: Starting... Initializing System Agent Initializing PCH PEI: Done. BS: BS_DEV_INIT_CHIPS times (us): entry 5 run 68887 exit 6 Enumerating buses... Show all devs...Before device enumeration. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:03.0: enabled 1 PCI: 00:13.0: enabled 1 PCI: 00:14.0: enabled 1 PCI: 00:15.0: enabled 1 PCI: 00:15.1: enabled 1 PCI: 00:15.2: enabled 1 PCI: 00:15.3: enabled 1 PCI: 00:15.4: enabled 0 PCI: 00:15.5: enabled 0 PCI: 00:15.6: enabled 0 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:17.0: enabled 0 PCI: 00:19.0: enabled 0 PCI: 00:1b.0: enabled 0 PCI: 00:1c.0: enabled 0 PCI: 00:1c.1: enabled 0 PCI: 00:1c.2: enabled 1 PCI: 00:1c.3: enabled 0 PCI: 00:1c.4: enabled 0 PCI: 00:1c.5: enabled 0 PCI: 00:1d.0: enabled 0 PCI: 00:1e.0: enabled 0 PCI: 00:1f.0: enabled 1 PNP: 0c31.0: enabled 1 PNP: 0c09.0: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 0 PCI: 00:1f.6: enabled 1 Compare with tree... Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:03.0: enabled 1 PCI: 00:13.0: enabled 1 PCI: 00:14.0: enabled 1 PCI: 00:15.0: enabled 1 PCI: 00:15.1: enabled 1 PCI: 00:15.2: enabled 1 PCI: 00:15.3: enabled 1 PCI: 00:15.4: enabled 0 PCI: 00:15.5: enabled 0 PCI: 00:15.6: enabled 0 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:17.0: enabled 0 PCI: 00:19.0: enabled 0 PCI: 00:1b.0: enabled 0 PCI: 00:1c.0: enabled 0 PCI: 00:1c.1: enabled 0 PCI: 00:1c.2: enabled 1 PCI: 00:1c.3: enabled 0 PCI: 00:1c.4: enabled 0 PCI: 00:1c.5: enabled 0 PCI: 00:1d.0: enabled 0 PCI: 00:1e.0: enabled 0 PCI: 00:1f.0: enabled 1 PNP: 0c31.0: enabled 1 PNP: 0c09.0: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 0 PCI: 00:1f.6: enabled 1 scan_static_bus for Root Device CPU_CLUSTER: 0 enabled DOMAIN: 0000 enabled DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [8086/0000] ops Normal boot. PCI: 00:00.0 [8086/1604] enabled PCI: 00:02.0 [8086/0000] ops PCI: 00:02.0 [8086/1616] enabled PCI: 00:03.0 [8086/0000] ops PCI: 00:03.0 [8086/160c] enabled PCI: 00:13.0 [8086/0000] ops PCI: 00:13.0 [8086/9cb6] enabled PCI: 00:14.0 [8086/0000] ops PCI: 00:14.0 [8086/9cb1] enabled PCI: 00:15.0 [8086/0000] ops PCI: 00:15.0 [8086/9ce0] enabled PCI: 00:15.1 [8086/0000] ops PCI: 00:15.1 [8086/9ce1] enabled PCI: 00:15.2 [8086/0000] ops PCI: 00:15.2 [8086/9ce2] enabled PCI: 00:15.3 [8086/0000] ops PCI: 00:15.3 [8086/9ce5] enabled PCI: 00:15.4: Disabling device PCI: 00:15.5: Disabling device PCI: 00:15.6: Disabling device PCI: 00:16.0 [8086/0000] ops PCI: 00:16.0 [8086/9cba] enabled PCI: 00:16.1: Disabling device PCI: 00:16.2: Disabling device PCI: 00:16.3: Disabling device PCI: 00:17.0: Disabling device PCI: 00:19.0: Disabling device PCI: 00:1b.0 [8086/0000] ops HDA disabled, I/O buffers routed to ADSP PCI: 00:1b.0 [8086/9ca0] disabled PCI: 00:1c.0 [8086/0000] bus ops PCI: 00:1c.0 [8086/9c90] disabled PCI: 00:1c.1 [8086/0000] bus ops PCI: 00:1c.1 [8086/9c92] disabled PCI: 00:1c.2 [8086/0000] bus ops PCIe Root Port 3 ASPM is enabled PCI: 00:1c.2 [8086/9c94] enabled PCI: 00:1c.3 [8086/0000] bus ops PCI: 00:1c.3 [8086/9c96] disabled PCI: 00:1c.4 [8086/0000] bus ops PCI: 00:1c.4 [8086/9c98] disabled PCI: 00:1c.5 [8086/0000] bus ops PCI: 00:1c.0: Disabling device PCI: 00:1c.0: Timeout waiting for 328h PCI: 00:1c.1: Disabling device PCI: 00:1c.1: Timeout waiting for 328h PCI: 00:1c.3: Disabling device PCI: 00:1c.4: Disabling device PCI: 00:1c.5: Disabling device PCI: 00:1c.5: Timeout waiting for 328h PCH: PCIe map 1c.2 -> 1c.0 PCH: PCIe map 1c.0 -> 1c.1 PCH: PCIe map 1c.1 -> 1c.2 PCH: RPFN 0x00543210 -> 0x00dcb0a9 PCI: 00:1c.5 [8086/9c9a] disabled PCI: 00:1e.0: Disabling device PCI: 00:1f.0 [8086/0000] bus ops PCI: 00:1f.0 [8086/9cc3] enabled PCI: 00:1f.2 [8086/0000] ops PCI: 00:1f.2 [8086/9c83] enabled PCI: 00:1f.3: Disabling device PCI: 00:1f.6 [8086/9ca4] enabled do_pci_scan_bridge for PCI: 00:1c.0 PCI: pci_scan_bus for bus 01 PCI: 01:00.0 [8086/08b1] enabled PCI: pci_scan_bus returning with max=001 Capability: type 0x01 @ 0xc8 Capability: type 0x05 @ 0xd0 Capability: type 0x10 @ 0x40 Capability: type 0x10 @ 0x40 Enabling Common Clock Configuration L1 Sub-State supported from root port 28 L1 Sub-State Support = 0xf CommonModeRestoreTime = 0x28 Power On Value = 0x1e, Power On Scale = 0x0 Capability: type 0x10 @ 0x40 Capability: type 0x01 @ 0xc8 Capability: type 0x05 @ 0xd0 Capability: type 0x10 @ 0x40 ASPM: Enabled L1 do_pci_scan_bridge returns max 1 scan_static_bus for PCI: 00:1f.0 PNP: 0c31.0 enabled PNP: 0c09.0 enabled scan_static_bus for PCI: 00:1f.0 done PCI: pci_scan_bus returning with max=001 scan_static_bus for Root Device done done BS: BS_DEV_ENUMERATE times (us): entry 4 run 18504 exit 4 found VGA at PCI: 00:02.0 Setting up VGA for PCI: 00:02.0 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Allocating resources... Reading resources... Root Device read_resources bus 0 link: 0 CPU_CLUSTER: 0 read_resources bus 0 link: 0 APIC: 00 missing read_resources CPU_CLUSTER: 0 read_resources bus 0 link: 0 done DOMAIN: 0000 read_resources bus 0 link: 0 mc_add_fixed_mmio_resources: Adding PCIEXBAR @ 60 0xf0000000-0xf3ffffff. mc_add_fixed_mmio_resources: Adding MCHBAR @ 48 0xfed10000-0xfed17fff. mc_add_fixed_mmio_resources: Adding DMIBAR @ 68 0xfed18000-0xfed18fff. mc_add_fixed_mmio_resources: Adding EPBAR @ 40 0xfed19000-0xfed19fff. mc_add_fixed_mmio_resources: Adding GDXCBAR @ 5420 0xfed84000-0xfed84fff. mc_add_fixed_mmio_resources: Adding EDRAMBAR @ 5408 0xfed80000-0xfed83fff. MC MAP: TOM: 0x400000000 MC MAP: TOUUD: 0x47f000000 MC MAP: MESEG_BASE: 0x3ff000000 MC MAP: MESEG_LIMIT: 0x7fff0fffff MC MAP: REMAP_BASE: 0x3ff000000 MC MAP: REMAP_LIMIT: 0x47effffff MC MAP: TOLUD: 0x80000000 MC MAP: BGSM: 0x7d800000 MC MAP: BDSM: 0x7e000000 MC MAP: TESGMB: 0x7d000000 MC MAP: GGC: 0x1c1 PCI: 00:1c.0 read_resources bus 1 link: 0 PCI: 00:1c.0 read_resources bus 1 link: 0 done PCI: 00:1f.0 read_resources bus 0 link: 0 PCI: 00:1f.0 read_resources bus 0 link: 0 done DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done Done reading resources. Show resources in subtree (Root Device)...After reading. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 DOMAIN: 0000 child on link 0 PCI: 00:00.0 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 PCI: 00:00.0 PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 48 PCI: 00:00.0 resource base fed18000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 68 PCI: 00:00.0 resource base fed19000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 40 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 5420 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5408 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0 PCI: 00:00.0 resource base c0000 size 7cf40000 align 0 gran 0 limit 0 flags e0004200 index 1 PCI: 00:00.0 resource base 7d000000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 2 PCI: 00:00.0 resource base 7d800000 size 2800000 align 0 gran 0 limit 0 flags f0000200 index 3 PCI: 00:00.0 resource base 100000000 size 37f000000 align 0 gran 0 limit 0 flags e0004200 index 4 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 5 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 6 PCI: 00:02.0 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 101201 index 18 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 PCI: 00:03.0 PCI: 00:03.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 PCI: 00:13.0 PCI: 00:13.0 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 10 PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 PCI: 00:14.0 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 PCI: 00:15.0 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 PCI: 00:15.1 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 PCI: 00:15.2 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 PCI: 00:15.3 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 PCI: 00:15.4 PCI: 00:15.5 PCI: 00:15.6 PCI: 00:16.0 PCI: 00:16.0 resource base 0 size 20 align 5 gran 5 limit ffffffffffffffff flags 201 index 10 PCI: 00:16.1 PCI: 00:16.2 PCI: 00:16.3 PCI: 00:17.0 PCI: 00:19.0 PCI: 00:1b.0 PCI: 00:1c.1 PCI: 00:1c.2 PCI: 00:1c.0 child on link 0 PCI: 01:00.0 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 01:00.0 PCI: 01:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10 PCI: 00:1c.3 PCI: 00:1c.4 PCI: 00:1c.5 PCI: 00:1d.0 PCI: 00:1e.0 PCI: 00:1f.0 child on link 0 PNP: 0c31.0 PCI: 00:1f.0 resource base fec00000 size 1400000 align 0 gran 0 limit 0 flags c0000200 index 31fe PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0 PCI: 00:1f.0 resource base 1400 size 400 align 0 gran 0 limit 0 flags c0000100 index 48 PCI: 00:1f.0 resource base 1000 size 100 align 0 gran 0 limit 0 flags c0000100 index 40 PNP: 0c31.0 PNP: 0c31.0 resource base a size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 PNP: 0c09.0 PCI: 00:1f.2 PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 PCI: 00:1f.2 resource base 0 size 8000 align 15 gran 15 limit ffffffff flags 200 index 24 PCI: 00:1f.3 PCI: 00:1f.6 PCI: 00:1f.6 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done PCI: 00:02.0 20 * [0x0 - 0x3f] io PCI: 00:1f.2 20 * [0x40 - 0x5f] io PCI: 00:1f.2 10 * [0x60 - 0x67] io PCI: 00:1f.2 18 * [0x68 - 0x6f] io PCI: 00:1f.2 14 * [0x70 - 0x73] io PCI: 00:1f.2 1c * [0x74 - 0x77] io DOMAIN: 0000 compute_resources_io: base: 78 size: 78 align: 6 gran: 0 limit: ffff done DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 01:00.0 10 * [0x0 - 0x1fff] mem PCI: 00:1c.0 compute_resources_mem: base: 2000 size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem PCI: 00:13.0 10 * [0x11000000 - 0x110fffff] mem PCI: 00:1c.0 20 * [0x11100000 - 0x111fffff] mem PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem PCI: 00:1f.2 24 * [0x11210000 - 0x11217fff] mem PCI: 00:03.0 10 * [0x11218000 - 0x1121bfff] mem PCI: 00:13.0 14 * [0x1121c000 - 0x1121cfff] mem PCI: 00:15.0 10 * [0x1121d000 - 0x1121dfff] mem PCI: 00:15.0 14 * [0x1121e000 - 0x1121efff] mem PCI: 00:15.1 10 * [0x1121f000 - 0x1121ffff] mem PCI: 00:15.1 14 * [0x11220000 - 0x11220fff] mem PCI: 00:15.2 10 * [0x11221000 - 0x11221fff] mem PCI: 00:15.2 14 * [0x11222000 - 0x11222fff] mem PCI: 00:15.3 10 * [0x11223000 - 0x11223fff] mem PCI: 00:15.3 14 * [0x11224000 - 0x11224fff] mem PCI: 00:1f.6 10 * [0x11225000 - 0x11225fff] mem PCI: 00:16.0 10 * [0x11226000 - 0x1122601f] mem DOMAIN: 0000 compute_resources_mem: base: 11226020 size: 11226020 align: 28 gran: 0 limit: ffffffff done avoid_fixed_resources: DOMAIN: 0000 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff constrain_resources: DOMAIN: 0000 constrain_resources: PCI: 00:00.0 constrain_resources: PCI: 00:02.0 constrain_resources: PCI: 00:03.0 constrain_resources: PCI: 00:13.0 constrain_resources: PCI: 00:14.0 constrain_resources: PCI: 00:15.0 constrain_resources: PCI: 00:15.1 constrain_resources: PCI: 00:15.2 constrain_resources: PCI: 00:15.3 constrain_resources: PCI: 00:16.0 constrain_resources: PCI: 00:1c.0 constrain_resources: PCI: 01:00.0 constrain_resources: PCI: 00:1f.0 constrain_resources: PNP: 0c31.0 constrain_resources: PNP: 0c09.0 constrain_resources: PCI: 00:1f.2 constrain_resources: PCI: 00:1f.6 avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff lim->base 00001800 lim->limit 0000ffff avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff lim->base 80000000 lim->limit efffffff Setting resources... DOMAIN: 0000 allocate_resources_io: base:1800 size:78 align:6 gran:0 limit:ffff Assigned: PCI: 00:02.0 20 * [0x1800 - 0x183f] io Assigned: PCI: 00:1f.2 20 * [0x1840 - 0x185f] io Assigned: PCI: 00:1f.2 10 * [0x1860 - 0x1867] io Assigned: PCI: 00:1f.2 18 * [0x1868 - 0x186f] io Assigned: PCI: 00:1f.2 14 * [0x1870 - 0x1873] io Assigned: PCI: 00:1f.2 1c * [0x1874 - 0x1877] io DOMAIN: 0000 allocate_resources_io: next_base: 1878 size: 78 align: 6 gran: 0 done PCI: 00:1c.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:1c.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done DOMAIN: 0000 allocate_resources_mem: base:d0000000 size:11226020 align:28 gran:0 limit:efffffff Assigned: PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] prefmem Assigned: PCI: 00:02.0 10 * [0xe0000000 - 0xe0ffffff] mem Assigned: PCI: 00:13.0 10 * [0xe1000000 - 0xe10fffff] mem Assigned: PCI: 00:1c.0 20 * [0xe1100000 - 0xe11fffff] mem Assigned: PCI: 00:14.0 10 * [0xe1200000 - 0xe120ffff] mem Assigned: PCI: 00:1f.2 24 * [0xe1210000 - 0xe1217fff] mem Assigned: PCI: 00:03.0 10 * [0xe1218000 - 0xe121bfff] mem Assigned: PCI: 00:13.0 14 * [0xe121c000 - 0xe121cfff] mem Assigned: PCI: 00:15.0 10 * [0xe121d000 - 0xe121dfff] mem Assigned: PCI: 00:15.0 14 * [0xe121e000 - 0xe121efff] mem Assigned: PCI: 00:15.1 10 * [0xe121f000 - 0xe121ffff] mem Assigned: PCI: 00:15.1 14 * [0xe1220000 - 0xe1220fff] mem Assigned: PCI: 00:15.2 10 * [0xe1221000 - 0xe1221fff] mem Assigned: PCI: 00:15.2 14 * [0xe1222000 - 0xe1222fff] mem Assigned: PCI: 00:15.3 10 * [0xe1223000 - 0xe1223fff] mem Assigned: PCI: 00:15.3 14 * [0xe1224000 - 0xe1224fff] mem Assigned: PCI: 00:1f.6 10 * [0xe1225000 - 0xe1225fff] mem Assigned: PCI: 00:16.0 10 * [0xe1226000 - 0xe122601f] mem DOMAIN: 0000 allocate_resources_mem: next_base: e1226020 size: 11226020 align: 28 gran: 0 done PCI: 00:1c.0 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff PCI: 00:1c.0 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.0 allocate_resources_mem: base:e1100000 size:100000 align:20 gran:20 limit:efffffff Assigned: PCI: 01:00.0 10 * [0xe1100000 - 0xe1101fff] mem PCI: 00:1c.0 allocate_resources_mem: next_base: e1102000 size: 100000 align: 20 gran: 20 done Root Device assign_resources, bus 0 link: 0 DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:02.0 10 <- [0x00e0000000 - 0x00e0ffffff] size 0x01000000 gran 0x18 mem64 PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64 PCI: 00:02.0 20 <- [0x0000001800 - 0x000000183f] size 0x00000040 gran 0x06 io PCI: 00:03.0 10 <- [0x00e1218000 - 0x00e121bfff] size 0x00004000 gran 0x0e mem64 PCI: 00:13.0 10 <- [0x00e1000000 - 0x00e10fffff] size 0x00100000 gran 0x14 mem PCI: 00:13.0 14 <- [0x00e121c000 - 0x00e121cfff] size 0x00001000 gran 0x0c mem PCI: 00:14.0 10 <- [0x00e1200000 - 0x00e120ffff] size 0x00010000 gran 0x10 mem64 PCI: 00:15.0 10 <- [0x00e121d000 - 0x00e121dfff] size 0x00001000 gran 0x0c mem PCI: 00:15.0 14 <- [0x00e121e000 - 0x00e121efff] size 0x00001000 gran 0x0c mem PCI: 00:15.1 10 <- [0x00e121f000 - 0x00e121ffff] size 0x00001000 gran 0x0c mem PCI: 00:15.1 14 <- [0x00e1220000 - 0x00e1220fff] size 0x00001000 gran 0x0c mem PCI: 00:15.2 10 <- [0x00e1221000 - 0x00e1221fff] size 0x00001000 gran 0x0c mem PCI: 00:15.2 14 <- [0x00e1222000 - 0x00e1222fff] size 0x00001000 gran 0x0c mem PCI: 00:15.3 10 <- [0x00e1223000 - 0x00e1223fff] size 0x00001000 gran 0x0c mem PCI: 00:15.3 14 <- [0x00e1224000 - 0x00e1224fff] size 0x00001000 gran 0x0c mem PCI: 00:16.0 10 <- [0x00e1226000 - 0x00e122601f] size 0x00000020 gran 0x05 mem64 PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem PCI: 00:1c.0 20 <- [0x00e1100000 - 0x00e11fffff] size 0x00100000 gran 0x14 bus 01 mem PCI: 00:1c.0 assign_resources, bus 1 link: 0 PCI: 01:00.0 10 <- [0x00e1100000 - 0x00e1101fff] size 0x00002000 gran 0x0d mem64 PCI: 00:1c.0 assign_resources, bus 1 link: 0 PCI: 00:1f.0 assign_resources, bus 0 link: 0 PNP: 0c31.0 70 <- [0x000000000a - 0x000000000a] size 0x00000001 gran 0x00 irq <tpm> PCI: 00:1f.0 assign_resources, bus 0 link: 0 PCI: 00:1f.2 10 <- [0x0000001860 - 0x0000001867] size 0x00000008 gran 0x03 io PCI: 00:1f.2 14 <- [0x0000001870 - 0x0000001873] size 0x00000004 gran 0x02 io PCI: 00:1f.2 18 <- [0x0000001868 - 0x000000186f] size 0x00000008 gran 0x03 io PCI: 00:1f.2 1c <- [0x0000001874 - 0x0000001877] size 0x00000004 gran 0x02 io PCI: 00:1f.2 20 <- [0x0000001840 - 0x000000185f] size 0x00000020 gran 0x05 io PCI: 00:1f.2 24 <- [0x00e1210000 - 0x00e1217fff] size 0x00008000 gran 0x0f mem PCI: 00:1f.6 10 <- [0x00e1225000 - 0x00e1225fff] size 0x00001000 gran 0x0c mem64 DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Show resources in subtree (Root Device)...After assigning values. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 DOMAIN: 0000 child on link 0 PCI: 00:00.0 DOMAIN: 0000 resource base 1800 size 78 align 6 gran 0 limit ffff flags 40040100 index 10000000 DOMAIN: 0000 resource base d0000000 size 11226020 align 28 gran 0 limit efffffff flags 40040200 index 10000100 PCI: 00:00.0 PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 48 PCI: 00:00.0 resource base fed18000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 68 PCI: 00:00.0 resource base fed19000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 40 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 5420 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5408 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0 PCI: 00:00.0 resource base c0000 size 7cf40000 align 0 gran 0 limit 0 flags e0004200 index 1 PCI: 00:00.0 resource base 7d000000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 2 PCI: 00:00.0 resource base 7d800000 size 2800000 align 0 gran 0 limit 0 flags f0000200 index 3 PCI: 00:00.0 resource base 100000000 size 37f000000 align 0 gran 0 limit 0 flags e0004200 index 4 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 5 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 6 PCI: 00:02.0 PCI: 00:02.0 resource base e0000000 size 1000000 align 24 gran 24 limit efffffff flags 60000201 index 10 PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit efffffff flags 60101201 index 18 PCI: 00:02.0 resource base 1800 size 40 align 6 gran 6 limit ffff flags 60000100 index 20 PCI: 00:03.0 PCI: 00:03.0 resource base e1218000 size 4000 align 14 gran 14 limit efffffff flags 60000201 index 10 PCI: 00:13.0 PCI: 00:13.0 resource base e1000000 size 100000 align 20 gran 20 limit efffffff flags 60000200 index 10 PCI: 00:13.0 resource base e121c000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 14 PCI: 00:14.0 PCI: 00:14.0 resource base e1200000 size 10000 align 16 gran 16 limit efffffff flags 60000201 index 10 PCI: 00:15.0 PCI: 00:15.0 resource base e121d000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 10 PCI: 00:15.0 resource base e121e000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 14 PCI: 00:15.1 PCI: 00:15.1 resource base e121f000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 10 PCI: 00:15.1 resource base e1220000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 14 PCI: 00:15.2 PCI: 00:15.2 resource base e1221000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 10 PCI: 00:15.2 resource base e1222000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 14 PCI: 00:15.3 PCI: 00:15.3 resource base e1223000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 10 PCI: 00:15.3 resource base e1224000 size 1000 align 12 gran 12 limit efffffff flags 60000200 index 14 PCI: 00:15.4 PCI: 00:15.5 PCI: 00:15.6 PCI: 00:16.0 PCI: 00:16.0 resource base e1226000 size 20 align 5 gran 5 limit efffffff flags 60000201 index 10 PCI: 00:16.1 PCI: 00:16.2 PCI: 00:16.3 PCI: 00:17.0 PCI: 00:19.0 PCI: 00:1b.0 PCI: 00:1c.1 PCI: 00:1c.2 PCI: 00:1c.0 child on link 0 PCI: 01:00.0 PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 PCI: 00:1c.0 resource base e1100000 size 100000 align 20 gran 20 limit efffffff flags 60080202 index 20 PCI: 01:00.0 PCI: 01:00.0 resource base e1100000 size 2000 align 13 gran 13 limit efffffff flags 60000201 index 10 PCI: 00:1c.3 PCI: 00:1c.4 PCI: 00:1c.5 PCI: 00:1d.0 PCI: 00:1e.0 PCI: 00:1f.0 child on link 0 PNP: 0c31.0 PCI: 00:1f.0 resource base fec00000 size 1400000 align 0 gran 0 limit 0 flags c0000200 index 31fe PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0 PCI: 00:1f.0 resource base 1400 size 400 align 0 gran 0 limit 0 flags c0000100 index 48 PCI: 00:1f.0 resource base 1000 size 100 align 0 gran 0 limit 0 flags c0000100 index 40 PNP: 0c31.0 PNP: 0c31.0 resource base a size 1 align 0 gran 0 limit 0 flags e0000400 index 70 PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 PNP: 0c09.0 PCI: 00:1f.2 PCI: 00:1f.2 resource base 1860 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 PCI: 00:1f.2 resource base 1870 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 PCI: 00:1f.2 resource base 1868 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 PCI: 00:1f.2 resource base 1874 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c PCI: 00:1f.2 resource base 1840 size 20 align 5 gran 5 limit ffff flags 60000100 index 20 PCI: 00:1f.2 resource base e1210000 size 8000 align 15 gran 15 limit efffffff flags 60000200 index 24 PCI: 00:1f.3 PCI: 00:1f.6 PCI: 00:1f.6 resource base e1225000 size 1000 align 12 gran 12 limit efffffff flags 60000201 index 10 Done allocating resources. BS: BS_DEV_RESOURCES times (us): entry 5 run 6882 exit 5 Enabling resources... PCI: 00:00.0 subsystem <- 0000/0000 PCI: 00:00.0 cmd <- 06 PCI: 00:02.0 subsystem <- 0000/0000 PCI: 00:02.0 cmd <- 03 PCI: 00:03.0 subsystem <- 0000/0000 PCI: 00:03.0 cmd <- 02 PCI: 00:13.0 subsystem <- 0000/0000 PCI: 00:13.0 cmd <- 102 PCI: 00:14.0 subsystem <- 0000/0000 PCI: 00:14.0 cmd <- 102 PCI: 00:15.0 subsystem <- 0000/0000 PCI: 00:15.0 cmd <- 106 PCI: 00:15.1 subsystem <- 0000/0000 PCI: 00:15.1 cmd <- 102 PCI: 00:15.2 subsystem <- 0000/0000 PCI: 00:15.2 cmd <- 102 PCI: 00:15.3 subsystem <- 0000/0000 PCI: 00:15.3 cmd <- 102 PCI: 00:16.0 subsystem <- 0000/0000 PCI: 00:16.0 cmd <- 02 PCI: 00:1c.0 bridge ctrl <- 0003 PCI: 00:1c.0 subsystem <- 0000/0000 PCI: 00:1c.0 cmd <- 06 PCI: 00:1f.0 subsystem <- 0000/0000 PCI: 00:1f.0 cmd <- 107 PCI: 00:1f.2 subsystem <- 0000/0000 PCI: 00:1f.2 cmd <- 103 PCI: 00:1f.6 subsystem <- 0000/0000 PCI: 00:1f.6 cmd <- 102 PCI: 01:00.0 cmd <- 02 done. BS: BS_DEV_ENABLE times (us): entry 5 run 1525 exit 5 SF: Detected W25Q64 with page size 1000, total 800000 FMAP: Found "FMAP" version 1.0 at ffe10000. FMAP: base = 0 size = 800000 #areas = 33 FMAP: area RW_ELOG found FMAP: offset: 3f0000 FMAP: size: 16384 bytes FMAP: No valid base address, using 0xff800000 FMAP: RW_ELOG at ffbf0000 (offset 3f0000) ELOG: FLASH @0x7cfddb30 [SPI 0x003f0000] ELOG: area is 4096 bytes, full threshold 3072, shrink size 1024 ELOG: Event(17) added with size 13 ELOG: Event(9A) added with size 9 Initializing devices... Root Device init mainboard_ec_init Chrome EC: Set WAKE mask to 0x00818006 Chrome EC: Set WAKE mask to 0x00000000 Chrome EC: Set WAKE mask to 0x00000000 Root Device init 3346 usecs CPU_CLUSTER: 0 init CPU has 2 cores, 4 threads enabled. MTRR: Physical address space: 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 0x00000000000c0000 - 0x000000007d800000 size 0x7d740000 type 6 0x000000007d800000 - 0x00000000d0000000 size 0x52800000 type 0 0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1 0x00000000e0000000 - 0x00000000ff800000 size 0x1f800000 type 0 0x00000000ff800000 - 0x0000000100000000 size 0x00800000 type 5 0x0000000100000000 - 0x000000047f000000 size 0x37f000000 type 6 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() MTRR: default type WB/UC MTRR counts: 12/9. MTRR: UC selected as default type. MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6 MTRR: 1 base 0x000000007d800000 mask 0x0000007fff800000 type 0 MTRR: 2 base 0x000000007e000000 mask 0x0000007ffe000000 type 0 MTRR: 3 base 0x00000000d0000000 mask 0x0000007ff0000000 type 1 MTRR: 4 base 0x00000000ff800000 mask 0x0000007fff800000 type 0 MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6 MTRR: 6 base 0x0000000200000000 mask 0x0000007e00000000 type 6 MTRR: 7 base 0x0000000400000000 mask 0x0000007f80000000 type 6 Taking a reserved OS MTRR. MTRR: 8 base 0x000000047f000000 mask 0x0000007fff000000 type 0
MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled
Initializing VR config. PCODE: 24MHz BLCK calibration response: 0 PCODE: 24MHz BLCK calibration value: 0x85000000 PCH Power: PCODE Levels 0x3f1c50c2 0x004cd2c9 microcode: sig=0x306d4 pf=0x40 revision=0x1d Setting up SMI for CPU Loading module at 00038000 with entry 00038000. filesize: 0x180 memsize: 0x180 Processing 10 relocs. Offset value of 0x00038000 SMM Module: stub loaded at 00038000. Will call 7cf9f25c(7cfd00c0) Installing SMM handler to 0x7d000000 Loading module at 7d010000 with entry 7d010a0f. filesize: 0x7760 memsize: 0xb800 Processing 567 relocs. Offset value of 0x7d010000 Loading module at 7d008000 with entry 7d008000. filesize: 0x180 memsize: 0x180 Processing 10 relocs. Offset value of 0x7d008000 SMM Module: placing jmp sequence at 7d007c00 rel16 0x03fd SMM Module: placing jmp sequence at 7d007800 rel16 0x07fd SMM Module: placing jmp sequence at 7d007400 rel16 0x0bfd SMM Module: stub loaded at 7d008000. Will call 7d010a0f(00000000) Initializing Southbridge SMI... ... pmbase = 0x1000
SMI_STS: MCSMI In relocation handler: cpu 0 New SMBASE=0x7d000000 IEDBASE=0x7d400000 Writing SMRR. base = 0x7d000006, mask=0xff800800 Relocation complete. CPU: Intel(R) Core(TM) i7-5500U CPU @ 2.40GHz. Loading module at 00030000 with entry 00030000. filesize: 0x140 memsize: 0x140 Processing 16 relocs. Offset value of 0x00030000 Attempting to start 3 APs Waiting for 10ms after sending INIT. Waiting for 1st SIPI to complete...done. Waiting for 2nd SIPI to complete...AP: slot 1 apic_id 1. done. In relocation handler: cpu 1 New SMBASE=0x7cfffc00 IEDBASE=0x7d400000 Writing SMRR. base = 0x7d000006, mask=0xff800800 Relocation complete. AP: slot 2 apic_id 3. AP: slot 3 apic_id 2. In relocation handler: cpu 3 New SMBASE=0x7cfff400 IEDBASE=0x7d400000 Writing SMRR. base = 0x7d000006, mask=0xff800800 Relocation complete. In relocation handler: cpu 2 New SMBASE=0x7cfff800 IEDBASE=0x7d400000 Writing SMRR. base = 0x7d000006, mask=0xff800800 Relocation complete. Initializing CPU #0 CPU: vendor Intel device 306d4 CPU: family 06, model 3d, stepping 04 Setting up local apic... apic_id: 0x00 done. cpu: energy policy set to 6 Turbo is available but hidden Turbo has been enabled CPU #0 initialized Initializing CPU #1 Initializing CPU #2 Initializing CPU #3 CPU: vendor Intel device 306d4 CPU: family 06, model 3d, stepping 04 Setting up local apic... apic_id: 0x01 done. CPU: vendor Intel device 306d4 CPU: family 06, model 3d, stepping 04 Setting up local apic... apic_id: 0x02 done. CPU: vendor Intel device 306d4 CPU: family 06, model 3d, stepping 04 Setting up local apic... apic_id: 0x03 done. cpu: energy policy set to 6 cpu: energy policy set to 6 cpu: energy policy set to 6 CPU #1 initialized CPU #2 initialized CPU #3 initialized Enabling SMIs. Locking SMM. cpu: frequency set to 3000 CPU_CLUSTER: 0 init 39873 usecs PCI: 00:00.0 init Set BIOS_RESET_CPL CPU TDP: 15 Watts PCI: 00:00.0 init 1015 usecs PCI: 00:02.0 init CBFS: WARNING: No file header found at 0x7ff480 - try next aligned address: 0x7ff4c0. CBFS: WARNING: 'pci8086,1616.rom' not found. CBFS: Could not find file 'pci8086,1616.rom'. In CBFS, ROM address for PCI: 00:02.0 = fff004f8 PCI expansion ROM, signature 0xaa55, INIT size 0x10000, data ptr 0x0040 PCI ROM image, vendor ID 8086, device ID 0406, PCI ROM image, Class Code 030000, Code Type 00 Copying VGA ROM Image from fff004f8 to 0xc0000, 0x10000 bytes Real mode stub @00000600: 867 bytes Calling Option ROM... int15_handler: AX=5f35 BX=c000 CX=0002 DX=03da ... Option ROM returned. VBE: Getting information about VESA mode 4161 VBE: resolution: 1280x850@16 VBE: framebuffer: d0000000 VBE: Setting VESA mode 4161 VGA Option ROM has been loaded PCI: 00:02.0 init 719490 usecs PCI: 00:03.0 init Mini-HD: base = e1218000 HDA: Initializing codec #0 HDA: codec viddid: 80862808 HDA: No verb table entry found PCI: 00:03.0 init 3019 usecs PCI: 00:13.0 init ADSP: Enable ACPI Mode IRQ3 PCI: 00:13.0 init 106 usecs PCI: 00:15.0 init Initializing Serial IO device PCI: 00:15.0 init 86 usecs PCI: 00:15.1 init Initializing Serial IO device PCI: 00:15.1 init 35 usecs PCI: 00:15.2 init Initializing Serial IO device PCI: 00:15.2 init 35 usecs PCI: 00:15.3 init Initializing Serial IO device PCI: 00:15.3 init 34 usecs PCI: 00:16.0 init ME: FW Partition Table : OK ME: Bringup Loader Failure : NO ME: Firmware Init Complete : NO ME: Manufacturing Mode : NO ME: Boot Options Present : NO ME: Update In Progress : NO ME: Current Working State : Normal ME: Current Operation State : M0 with UMA ME: Current Operation Mode : Normal ME: Error Code : No Error ME: Progress Phase : Host Communication ME: Power Management Event : Pseudo-global reset ME: Progress Phase State : Host communication established ME: BIOS path: Normal ME: Extend SHA-256: 8e7202fb0a73a025095e0f1341e69e07bb4ef9e6bef976cc70e2cca7863d8f6d ME: found version 10.0.38.1000 ME: Wake Event to ME Reset: 0 ms ME: ME Reset to Platform Reset: 7 ms ME: Platform Reset to CPU Reset: 57 ms ME: ICC SET CLOCK ENABLES 0x013b0000 ME: HMRPFO LOCK NOACK message successful ME: END OF POST NOACK message successful PCI: 00:16.0 init 59 usecs PCI: 00:1c.0 init Initializing PCH PCIe bridge. PCI: 00:1c.0 init 8 usecs PCI: 00:1f.0 init RTC Init IOAPIC: Initializing IOAPIC at 0xfec00000 IOAPIC: Bootstrap Processor Local APIC = 0x00 IOAPIC: ID = 0x02 i8259_configure_irq_trigger: current interrupts are 0x0 i8259_configure_irq_trigger: try to set interrupts 0x200 Set power off after power failure. PCH PM init Disabling ACPI via APMC: done. PCI: 00:1f.0 init 2991 usecs PCI: 00:1f.2 init SATA: Initializing controller in AHCI mode. ABAR: E1210000 PCI: 00:1f.2 init 94 usecs PCI: 00:1f.6 init PCI: 00:1f.6 init 2 usecs PCI: 01:00.0 init PCI: 01:00.0 init 2 usecs PNP: 0c09.0 init Keyboard init... Google Chrome EC: Initializing keyboard. Google Chrome EC: Hello got back 11223344 status (0) Google Chrome EC: version: ro: samus_v1.7.633-4b16a5c rw: samus_v1.7.688-22cf733 running image: 2 PNP: 0c09.0 init 14192 usecs Devices initialized Show all devs...After init. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:03.0: enabled 1 PCI: 00:13.0: enabled 1 PCI: 00:14.0: enabled 1 PCI: 00:15.0: enabled 1 PCI: 00:15.1: enabled 1 PCI: 00:15.2: enabled 1 PCI: 00:15.3: enabled 1 PCI: 00:15.4: enabled 0 PCI: 00:15.5: enabled 0 PCI: 00:15.6: enabled 0 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:17.0: enabled 0 PCI: 00:19.0: enabled 0 PCI: 00:1b.0: enabled 0 PCI: 00:1c.1: enabled 0 PCI: 00:1c.2: enabled 0 PCI: 00:1c.0: enabled 1 PCI: 00:1c.3: enabled 0 PCI: 00:1c.4: enabled 0 PCI: 00:1c.5: enabled 0 PCI: 00:1d.0: enabled 0 PCI: 00:1e.0: enabled 0 PCI: 00:1f.0: enabled 1 PNP: 0c31.0: enabled 1 PNP: 0c09.0: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 0 PCI: 00:1f.6: enabled 1 PCI: 01:00.0: enabled 1 APIC: 01: enabled 1 APIC: 03: enabled 1 APIC: 02: enabled 1 BS: BS_DEV_INIT times (us): entry 4045 run 786868 exit 2 Finalize devices... PCI: 00:16.0 final Devices finalized BS: BS_POST_DEVICE times (us): entry 2 run 21 exit 2 BS: BS_OS_RESUME_CHECK times (us): entry 2 run 17 exit 1 Updating MRC cache data. FMAP: area RW_MRC_CACHE found FMAP: offset: 3e0000 FMAP: size: 65536 bytes FMAP: No valid base address, using 0xff800000 FMAP: RW_MRC_CACHE at ffbe0000 (offset 3e0000) MRC cache slot 0 @ ffbe0000 MRC cache up to date. SF: Detected W25Q64 with page size 1000, total 800000 SPI flash protection: WPSW=1 SRP0=1 spi_flash_protect: PRR 0 is enabled for range 0x003e0000-0x003effff Enabled Protected Range on RW_MRC_CACHE region ACPI: Writing ACPI tables at 7cf44000. ACPI: * FACS ACPI: * DSDT ACPI: * FADT SCI is IRQ9 ACPI: added table 1/32, length now 40 ACPI: * HPET ACPI: added table 2/32, length now 44 ACPI: * MADT SCI is IRQ9 ACPI: added table 3/32, length now 48 ACPI: * MCFG ACPI: added table 4/32, length now 52 ACPI: Patching up global NVS in DSDT at offset 0x00c3 -> 7cf93000 ELOG: Event(A0) added with size 9 Ramoops buffer: 0x100000@0x7ce43000. ACPI: * DSDT @ 7cf44250 Length 4720 ACPI: * SSDT Found 1 CPU(s) with 4 core(s) each. PSS: 2401MHz power 15000 control 0x1e00 status 0x1e00 PSS: 2400MHz power 15000 control 0x1800 status 0x1800 PSS: 1700MHz power 9781 control 0x1100 status 0x1100 PSS: 1300MHz power 7124 control 0xd00 status 0xd00 PSS: 900MHz power 4702 control 0x900 status 0x900 PSS: 500MHz power 2480 control 0x500 status 0x500 PSS: 2401MHz power 15000 control 0x1e00 status 0x1e00 PSS: 2400MHz power 15000 control 0x1800 status 0x1800 PSS: 1700MHz power 9781 control 0x1100 status 0x1100 PSS: 1300MHz power 7124 control 0xd00 status 0xd00 PSS: 900MHz power 4702 control 0x900 status 0x900 PSS: 500MHz power 2480 control 0x500 status 0x500 PSS: 2401MHz power 15000 control 0x1e00 status 0x1e00 PSS: 2400MHz power 15000 control 0x1800 status 0x1800 PSS: 1700MHz power 9781 control 0x1100 status 0x1100 PSS: 1300MHz power 7124 control 0xd00 status 0xd00 PSS: 900MHz power 4702 control 0x900 status 0x900 PSS: 500MHz power 2480 control 0x500 status 0x500 PSS: 2401MHz power 15000 control 0x1e00 status 0x1e00 PSS: 2400MHz power 15000 control 0x1800 status 0x1800 PSS: 1700MHz power 9781 control 0x1100 status 0x1100 PSS: 1300MHz power 7124 control 0xd00 status 0xd00 PSS: 900MHz power 4702 control 0x900 status 0x900 PSS: 500MHz power 2480 control 0x500 status 0x500 ACPI: added table 5/32, length now 56 current = 7cf4abc0 ACPI: done. ACPI tables: 27584 bytes. smbios_write_tables: 7ce42000 Create smbios type 17 Root Device (GOOGLE Samus) CPU_CLUSTER: 0 (Intel Broadwell) APIC: 00 (Intel Broadwell) DOMAIN: 0000 (Intel Broadwell) PCI: 00:00.0 (Intel Broadwell) PCI: 00:02.0 (Intel Broadwell) PCI: 00:03.0 (Intel Broadwell) PCI: 00:13.0 (Intel Broadwell) PCI: 00:14.0 (Intel Broadwell) PCI: 00:15.0 (Intel Broadwell) PCI: 00:15.1 (Intel Broadwell) PCI: 00:15.2 (Intel Broadwell) PCI: 00:15.3 (Intel Broadwell) PCI: 00:15.4 (Intel Broadwell) PCI: 00:15.5 (Intel Broadwell) PCI: 00:15.6 (Intel Broadwell) PCI: 00:16.0 (Intel Broadwell) PCI: 00:16.1 (Intel Broadwell) PCI: 00:16.2 (Intel Broadwell) PCI: 00:16.3 (Intel Broadwell) PCI: 00:17.0 (Intel Broadwell) PCI: 00:19.0 (Intel Broadwell) PCI: 00:1b.0 (Intel Broadwell) PCI: 00:1c.1 (Intel Broadwell) PCI: 00:1c.2 (Intel Broadwell) PCI: 00:1c.0 (Intel Broadwell) PCI: 00:1c.3 (Intel Broadwell) PCI: 00:1c.4 (Intel Broadwell) PCI: 00:1c.5 (Intel Broadwell) PCI: 00:1d.0 (Intel Broadwell) PCI: 00:1e.0 (Intel Broadwell) PCI: 00:1f.0 (Intel Broadwell) PNP: 0c31.0 (LPC TPM) PNP: 0c09.0 (Google Chrome EC) PCI: 00:1f.2 (Intel Broadwell) PCI: 00:1f.3 (Intel Broadwell) PCI: 00:1f.6 (Intel Broadwell) PCI: 01:00.0 (unknown) APIC: 01 (unknown) APIC: 03 (unknown) APIC: 02 (unknown) SMBIOS tables: 541 bytes. Writing table forward entry at 0x00000500 Wrote coreboot table at: 00000500, 0x10 bytes, checksum e2fa Table forward entry ends at 0x00000528. ... aligned to 0x00001000 Writing coreboot table at 0x7ce3a000 rom_table_end = 0x7ce3a000 ... aligned to 0x7ce40000 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000a0000-00000000000fffff: RESERVED 3. 0000000000100000-000000007ce39fff: RAM 4. 000000007ce3a000-000000007cffffff: CONFIGURATION TABLES 5. 000000007d000000-000000007fffffff: RESERVED 6. 00000000f0000000-00000000f3ffffff: RESERVED 7. 00000000fed10000-00000000fed19fff: RESERVED 8. 00000000fed40000-00000000fed44fff: RESERVED 9. 00000000fed80000-00000000fed84fff: RESERVED 10. 0000000100000000-000000047effffff: RAM Wrote coreboot table at: 7ce3a000, 0x2f0 bytes, checksum 4cc8 coreboot table: 776 bytes. CBMEM ROOT 0. 7cfff000 00001000 CAR GLOBALS 1. 7cffe000 00001000 CONSOLE 2. 7cfee000 00010000 POWER STATE 3. 7cfed000 00001000 TIME STAMP 4. 7cfec000 00001000 MRC DATA 5. 7cfea000 00002000 MEM INFO 6. 7cfe9000 00001000 ROMSTAGE 7. 7cfe8000 00001000 ROMSTG STCK 8. 7cfe3000 00005000 VBOOT 9. 7cfe2000 00001000 RAMSTAGE 10. 7cf96000 0004c000 GDT 11. 7cf95000 00001000 ACPI GNVS 12. 7cf93000 00002000 REFCODE 13. 7cf60000 00033000 SMM BACKUP 14. 7cf50000 00010000 ACPI 15. 7cf44000 0000c000 GNVS PTR 16. 7cf43000 00001000 RAMOOPS 17. 7ce43000 00100000 SMBIOS 18. 7ce42000 00001000 COREBOOT 19. 7ce3a000 00008000 BS: BS_WRITE_TABLES times (us): entry 1479 run 2536 exit 2 Booting 0xf5ad byte verified payload at 0xffa1002c. Payload aligned size: 0xf600 Loading segment from rom address 0x0003002c code (compression=1) New segment dstaddr 0x2104020 memsize 0x2311c0 srcaddr 0x30064 filesize 0xf575 Loading segment from rom address 0x00030048 Entry Point 0x02104020 Loading Segment: addr: 0x0000000002104020 memsz: 0x00000000002311c0 filesz: 0x000000000000f575 lb: [0x000000007cf97000, 0x000000007cfe1048) Post relocation: addr: 0x0000000002104020 memsz: 0x00000000002311c0 filesz: 0x000000000000f575 using LZMA [ 0x02104020, 02122fcc, 0x023351e0) <- 00030064 Clearing Segment: addr: 0x0000000002122fcc memsz: 0x0000000000212214 dest 02104020, end 023351e0, bouncebuffer ffffffff Loaded segments Finalizing chipset. Finalizing SMM. BS: BS_PAYLOAD_LOAD times (us): entry 2 run 18646 exit 595 Jumping to boot code at 02104020 CPU0: stack: 7cfdc000 - 7cfdd000, lowest used address 7cfdc2b4, stack used: 3404 bytes
Starting depthcharge on samus... new_rt5677_codec: chip = 0x2C, bits_per_sample = 16, sample_rate = 48000 lr_frame_size = 256, master_clock = 0 The GBB signature is at 0x2004020 and is: 24 47 42 42 Wipe memory regions: [0x00000000001000, 0x000000000a0000) [0x00000000100200, 0x00000002000000) [0x000000023351e0, 0x0000007ce3a000) [0x00000100000000, 0x0000047f000000) Calling VbSelectAndLoadKernel(). VbEcSoftwareSync(devidx=0) cros_ec_init: CrosEC protocol v3 supported (256, 256) cros_ec_probe_passthru: devidx=1 supported (128, 128) Google ChromeOS EC driver ready, id 'samus_v1.7.688-22cf733' Clearing the recovery request. EC hash:8885505d2ff4964a51fac8ef4953548316ff63c55018eaccfe8316e18ecc620c EC-RW hash address, size are 0xffa1f5dc, 32. Hash = 8885505d2ff4964a51fac8ef4953548316ff63c55018eaccfe8316e18ecc620c Expected hash:8885505d2ff4964a51fac8ef4953548316ff63c55018eaccfe8316e18ecc620c VbEcSoftwareSync() in EC-RW and it matches VbEcSoftwareSync(devidx=1) EC hash:77db273c0d3376f404204a9078091f87a012faf8a08266c00be2dcd6a97ca74d EC-RW hash address, size are 0xffa1f5fc, 32. Hash = 77db273c0d3376f404204a9078091f87a012faf8a08266c00be2dcd6a97ca74d Expected hash:77db273c0d3376f404204a9078091f87a012faf8a08266c00be2dcd6a97ca74d VbEcSoftwareSync() in EC-RW and it matches TPM: TlclRead(0x1008, 13) Found TPM SLB9635 TT 1.2 by Infineon TPM: command 0xcf returned 0x0 TPM: command 0x65 returned 0x0 TPM: RollbackKernelRead 10001 Entering VbBootDeveloper() backlight_update called but not implemented. leaving VbDisplayScreenFromGBB() with 0 VbAudioOpen() - ticks_per_msec is 1000 VbAudioOpen() - VbExBeep() is limited VbGetDevMusicNotes: use_short is 0, hdr is 0x0, maxsize is 0 VbGetDevMusicNotes: using 5 default notes VbAudioOpen() - note count 5 Added USB disk 4. Added USB disk 5. VbBootDeveloper() - user pressed Ctrl+L; Try legacy boot CODE/DATA: dst=0xe1e98 dst_len=123240 src=0xffc00060 src_len=63752 compression=1 Shutting down all USB controllers. Removed USB disk 4. Removed USB disk 5. Finalizing Coreboot Exiting depthcharge with code 8 at timestamp: 3556009 SeaBIOS (version rel-1.9.0-41-ge973a79) BUILD: gcc: (GCC) 5.2.0 binutils: (GNU Binutils) 2.25.1 Found coreboot cbmem console @ 7cfee000 Found mainboard GOOGLE Samus malloc preinit Relocating init from 0x000e3420 to 0x7cdee440 (size 47904) malloc init Found CBFS header at 0xffdfffa0 Add romfile: payload (size=63808) Add romfile: vgaroms/seavgabios.rom (size=29184) Add romfile: (size=2003864) multiboot: eax=ff06e, ebx=ffc00044 init ivt init bda init bios32 init PMM init PNPBIOS table init keyboard init mouse init pic math cp init PCI probe PCI device 00:00.0 (vd=8086:1604 c=0600) PCI device 00:02.0 (vd=8086:1616 c=0300) PCI device 00:03.0 (vd=8086:160c c=0403) PCI device 00:14.0 (vd=8086:9cb1 c=0c03) PCI device 00:1c.0 (vd=8086:9c94 c=0604) PCI device 00:1f.0 (vd=8086:9cc3 c=0601) PCI device 00:1f.2 (vd=8086:9c83 c=0106) PCI device 00:1f.6 (vd=8086:9ca4 c=1180) PCI device 01:00.0 (vd=8086:08b1 c=0280) Found 9 PCI devices (max PCI bus is 01) Relocating coreboot bios tables Copying SMBIOS entry point from 0x7ce42000 to 0x000f6980 Copying ACPI RSDP from 0x7cf44000 to 0x000f6950 rsdp=0x000f6950 rsdt=0x7cf44030 fadt=0x7cf48970 pm_tmr_blk=1008 Using pmtimer, ioport 0x1008 init timer WARNING - Timeout at tis_wait_sts:107! Scan for VGA option rom Attempting to init PCI bdf 00:02.0 (vd 8086:1616) Copying data 29184@0xffc0f9b8 to 29184@0x000c0000 Running option rom at c000:0003 pmm call arg1=0 pmm00: length=20 handle=ffffffff flags=9 Turning on vga text mode console SeaBIOS (version rel-1.9.0-41-ge973a79) /7cdec000\ Start thread |7cdec000| init usb |7cdec000| XHCI init on dev 00:14.0: regs @ 0xe1200000, 15 ports, 32 slots, 32 byte contexts |7cdec000| XHCI protocol USB 2.00, 11 ports (offset 1), def 3018 |7cdec000| XHCI protocol USB 3.00, 4 ports (offset 12), def 1000 |7cdec000| XHCI extcap 0xc1 @ e1208040 |7cdec000| XHCI extcap 0xc0 @ e1208070 |7cdec000| XHCI extcap 0x1 @ e1208460 |7cdec000| XHCI extcap 0xa @ e1208480 /7cdeb000\ Start thread |7cdeb000| configure_xhci: resetting init ps2port /7cdea000\ Start thread \7cdec000/ End thread |7cdeb000| configure_xhci: setup 16 scratch pad buffers init lpt Found 0 lpt ports init serial Found 0 serial ports init floppy drives init hard drives init ahci AHCI controller at 1f.2, iobase e1210000, irq 10 AHCI: cap 0xdf34ff03, ports_impl 0x1 /7cdec000\ Start thread |7cdec000| AHCI/0: probing init megasas |7cdec000| AHCI/0: link up |7cdec000| AHCI/0: ... finished, status 0x51, ERROR 0x4 |7cdec000| Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0 |7cdec000| AHCI/0: registering: "AHCI/0: KINGSTON RBU-SUS151S364GD ATA-10 Hard-Disk (61057 MiBytes)" |7cdec000| Registering bootable: AHCI/0: KINGSTON RBU-SUS151S364GD ATA-10 Hard-Disk (61057 MiBytes) (type:2 prio:103 data:f68e0) \7cdec000/ End thread |7cdea000| PS2 keyboard initialized \7cdea000/ End thread /7cdec000\ Start thread /7cdea000\ Start thread /7cde9000\ Start thread /7cde8000\ Start thread /7cde7000\ Start thread /7cde6000\ Start thread /7cde5000\ Start thread /7cde4000\ Start thread /7cde3000\ Start thread /7cde2000\ Start thread /7cde1000\ Start thread /7cde0000\ Start thread |7cde0000| XHCI port #12: 0x00001211, powered, pls 0, speed 4 [Super] |7cde0000| set_address 0x7ce39fb0 /7cddf000\ Start thread /7cdde000\ Start thread /7cddd000\ Start thread |7cde0000| xhci_alloc_pipe: usbdev 0x7cded520, ring 0x7ce39200, slotid 0, epid 1 |7cde0000| xhci_cmd_enable_slot: |7cde0000| xhci_trb_queue: ring 0x7ce39d00 [nidx 1, len 0] |7cde0000| xhci_process_events: status change port #7 |7cde0000| xhci_process_events: status change port #8 |7cde0000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39d00, evt 0x7ce39e00, type 33, eidx 1, cc 1] |7cde0000| xhci_address: enable slot: got slotid 1 |7cde0000| xhci_cmd_address_device: slotid 1 |7cde0000| xhci_trb_queue: ring 0x7ce39d00 [nidx 2, len 0] |7cde0000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39d10, evt 0x7ce39e00, type 33, eidx 2, cc 4] |7cde0000| xhci_cmd_disable_slot: slotid 1 |7cde0000| xhci_trb_queue: ring 0x7ce39d00 [nidx 3, len 0] |7cde0000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39d20, evt 0x7ce39e00, type 33, eidx 3, cc 1] |7cde0000| xhci_address: disable failed (cc 1/4) \7cde0000/ End thread |7cde4000| xhci_hub_reset port #8: 0x000206e1, powered, pls 7, speed 1 [Full] |7cde4000| XHCI port #8: 0x00200603, powered, enabled, pls 0, speed 1 [Full] |7cde4000| set_address 0x7ce39fb0 |7cde4000| xhci_alloc_pipe: usbdev 0x7cded720, ring 0x7ce39200, slotid 0, epid 1 |7cde4000| xhci_cmd_enable_slot: |7cde4000| xhci_trb_queue: ring 0x7ce39d00 [nidx 4, len 0] |7cde4000| xhci_process_events: status change port #8 |7cde4000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39d30, evt 0x7ce39e00, type 33, eidx 4, cc 1] |7cde4000| xhci_address: enable slot: got slotid 2 |7cde4000| xhci_cmd_address_device: slotid 2 |7cde4000| xhci_trb_queue: ring 0x7ce39d00 [nidx 5, len 0] |7cde4000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39d40, evt 0x7ce39e00, type 33, eidx 5, cc 1] |7cde4000| xhci_realloc_pipe: usbdev 0x7cded720, ring 0x7ce39200, slotid 2, epid 1 |7cde4000| config_usb: 0x7ce39320 |7cde4000| xhci_trb_queue: ring 0x7ce39200 [nidx 1, len 8] |7cde4000| xhci_trb_queue: ring 0x7ce39200 [nidx 2, len 8] |7cde4000| xhci_trb_queue: ring 0x7ce39200 [nidx 3, len 0] |7cde4000| xhci_xfer_kick: ring 0x7ce39200, slotid 2, epid 1 |7cde5000| xhci_hub_reset port #7: 0x000206e1, powered, pls 7, speed 1 [Full] |7cde4000| xhci_process_events: ring 0x7ce39200 [trb 0x7ce39220, evt 0x7ce39300, type 32, eidx 3, cc 1] |7cde4000| device rev=0200 cls=e0 sub=01 proto=01 size=64 |7cde4000| xhci_realloc_pipe: usbdev 0x7cded720, ring 0x7ce39200, slotid 2, epid 1 |7cde4000| xhci_realloc_pipe: reconf ctl endpoint pkt size: 8 -> 64 |7cde4000| xhci_cmd_evaluate_context: slotid 2, add 0x2, del 0x0 |7cde4000| xhci_trb_queue: ring 0x7ce39d00 [nidx 6, len 0] |7cde4000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39d50, evt 0x7ce39e00, type 33, eidx 6, cc 1] |7cde4000| xhci_trb_queue: ring 0x7ce39200 [nidx 4, len 8] |7cde4000| xhci_trb_queue: ring 0x7ce39200 [nidx 5, len 9] |7cde4000| xhci_trb_queue: ring 0x7ce39200 [nidx 6, len 0] |7cde4000| xhci_xfer_kick: ring 0x7ce39200, slotid 2, epid 1 |7cde4000| xhci_process_events: ring 0x7ce39200 [trb 0x7ce39250, evt 0x7ce39300, type 32, eidx 6, cc 1] |7cde4000| xhci_trb_queue: ring 0x7ce39200 [nidx 7, len 8] |7cde4000| xhci_trb_queue: ring 0x7ce39200 [nidx 8, len 177] |7cde4000| xhci_trb_queue: ring 0x7ce39200 [nidx 9, len 0] |7cde4000| xhci_xfer_kick: ring 0x7ce39200, slotid 2, epid 1 |7cde4000| xhci_process_events: ring 0x7ce39200 [trb 0x7ce39280, evt 0x7ce39300, type 32, eidx 9, cc 1] \7cde4000/ End thread \7cdec000/ End thread \7cde9000/ End thread \7cdea000/ End thread \7cde8000/ End thread \7cde7000/ End thread \7cde6000/ End thread \7cde3000/ End thread \7cde2000/ End thread \7cde1000/ End thread \7cddf000/ End thread \7cdde000/ End thread |7cde5000| XHCI port #7: 0x00200e03, powered, enabled, pls 0, speed 3 [High] |7cde5000| set_address 0x7ce39fb0 |7cde5000| xhci_alloc_pipe: usbdev 0x7cded7a0, ring 0x7ce39000, slotid 0, epid 1 |7cde5000| xhci_cmd_enable_slot: |7cde5000| xhci_trb_queue: ring 0x7ce39d00 [nidx 7, len 0] |7cde5000| xhci_process_events: status change port #15 |7cde5000| xhci_process_events: status change port #12 |7cde5000| xhci_process_events: status change port #7 |7cde5000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39d60, evt 0x7ce39e00, type 33, eidx 7, cc 1] |7cde5000| xhci_address: enable slot: got slotid 3 |7cde5000| xhci_cmd_address_device: slotid 3 |7cde5000| xhci_trb_queue: ring 0x7ce39d00 [nidx 8, len 0] |7cde5000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39d70, evt 0x7ce39e00, type 33, eidx 8, cc 1] |7cde5000| xhci_realloc_pipe: usbdev 0x7cded7a0, ring 0x7ce39000, slotid 3, epid 1 |7cde5000| config_usb: 0x7ce39120 |7cde5000| xhci_trb_queue: ring 0x7ce39000 [nidx 1, len 8] |7cde5000| xhci_trb_queue: ring 0x7ce39000 [nidx 2, len 8] |7cde5000| xhci_trb_queue: ring 0x7ce39000 [nidx 3, len 0] |7cde5000| xhci_xfer_kick: ring 0x7ce39000, slotid 3, epid 1 |7cddd000| XHCI port #15: 0x00201203, powered, enabled, pls 0, speed 4 [Super] |7cddd000| set_address 0x7ce39fb0 |7cde5000| xhci_process_events: ring 0x7ce39000 [trb 0x7ce39020, evt 0x7ce39100, type 32, eidx 3, cc 1] |7cde5000| device rev=0200 cls=ef sub=02 proto=01 size=64 |7cde5000| xhci_realloc_pipe: usbdev 0x7cded7a0, ring 0x7ce39000, slotid 3, epid 1 |7cde5000| xhci_trb_queue: ring 0x7ce39000 [nidx 4, len 8] |7cde5000| xhci_trb_queue: ring 0x7ce39000 [nidx 5, len 9] |7cde5000| xhci_trb_queue: ring 0x7ce39000 [nidx 6, len 0] |7cde5000| xhci_xfer_kick: ring 0x7ce39000, slotid 3, epid 1 |7cde5000| xhci_process_events: ring 0x7ce39000 [trb 0x7ce39050, evt 0x7ce39100, type 32, eidx 6, cc 1] |7cde5000| xhci_trb_queue: ring 0x7ce39000 [nidx 7, len 8] |7cde5000| xhci_trb_queue: ring 0x7ce39000 [nidx 8, len 1001] |7cde5000| xhci_trb_queue: ring 0x7ce39000 [nidx 9, len 0] |7cde5000| xhci_xfer_kick: ring 0x7ce39000, slotid 3, epid 1 |7cde5000| xhci_process_events: ring 0x7ce39000 [trb 0x7ce39080, evt 0x7ce39100, type 32, eidx 9, cc 1] |7cde5000| xhci_trb_queue: ring 0x7ce39000 [nidx 10, len 8] |7cde5000| xhci_trb_queue: ring 0x7ce39000 [nidx 11, len 0] |7cde5000| xhci_xfer_kick: ring 0x7ce39000, slotid 3, epid 1 |7cde5000| xhci_process_events: ring 0x7ce39000 [trb 0x7ce390a0, evt 0x7ce39100, type 32, eidx 11, cc 1] |7cde5000| usb_hid_setup 0x7ce39120 \7cde5000/ End thread |7cddd000| xhci_alloc_pipe: usbdev 0x7cded400, ring 0x7ce28200, slotid 0, epid 1 |7cddd000| xhci_cmd_enable_slot: |7cddd000| xhci_trb_queue: ring 0x7ce39d00 [nidx 9, len 0] |7cddd000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39d80, evt 0x7ce39e00, type 33, eidx 9, cc 1] |7cddd000| xhci_address: enable slot: got slotid 4 |7cddd000| xhci_cmd_address_device: slotid 4 |7cddd000| xhci_trb_queue: ring 0x7ce39d00 [nidx 10, len 0] |7cddd000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39d90, evt 0x7ce39e00, type 33, eidx 10, cc 1] |7cddd000| xhci_realloc_pipe: usbdev 0x7cded400, ring 0x7ce28200, slotid 4, epid 1 |7cddd000| config_usb: 0x7ce28320 |7cddd000| xhci_trb_queue: ring 0x7ce28200 [nidx 1, len 8] |7cddd000| xhci_trb_queue: ring 0x7ce28200 [nidx 2, len 8] |7cddd000| xhci_trb_queue: ring 0x7ce28200 [nidx 3, len 0] |7cddd000| xhci_xfer_kick: ring 0x7ce28200, slotid 4, epid 1 |7cddd000| xhci_process_events: ring 0x7ce28200 [trb 0x7ce28220, evt 0x7ce28300, type 32, eidx 3, cc 1] |7cddd000| device rev=0300 cls=00 sub=00 proto=00 size=512 |7cddd000| xhci_realloc_pipe: usbdev 0x7cded400, ring 0x7ce28200, slotid 4, epid 1 |7cddd000| xhci_trb_queue: ring 0x7ce28200 [nidx 4, len 8] |7cddd000| xhci_trb_queue: ring 0x7ce28200 [nidx 5, len 9] |7cddd000| xhci_trb_queue: ring 0x7ce28200 [nidx 6, len 0] |7cddd000| xhci_xfer_kick: ring 0x7ce28200, slotid 4, epid 1 |7cddd000| xhci_process_events: ring 0x7ce28200 [trb 0x7ce28250, evt 0x7ce28300, type 32, eidx 6, cc 1] |7cddd000| xhci_trb_queue: ring 0x7ce28200 [nidx 7, len 8] |7cddd000| xhci_trb_queue: ring 0x7ce28200 [nidx 8, len 121] |7cddd000| xhci_trb_queue: ring 0x7ce28200 [nidx 9, len 0] |7cddd000| xhci_xfer_kick: ring 0x7ce28200, slotid 4, epid 1 |7cddd000| xhci_process_events: ring 0x7ce28200 [trb 0x7ce28280, evt 0x7ce28300, type 32, eidx 9, cc 1] |7cddd000| xhci_trb_queue: ring 0x7ce28200 [nidx 10, len 8] |7cddd000| xhci_trb_queue: ring 0x7ce28200 [nidx 11, len 0] |7cddd000| xhci_xfer_kick: ring 0x7ce28200, slotid 4, epid 1 |7cddd000| xhci_process_events: ring 0x7ce28200 [trb 0x7ce282a0, evt 0x7ce28300, type 32, eidx 11, cc 1] |7cddd000| xhci_alloc_pipe: usbdev 0x7cded400, ring 0x000edb00, slotid 0, epid 3 |7cddd000| xhci_cmd_configure_endpoint: slotid 4, add 0x9, del 0x0 |7cddd000| xhci_trb_queue: ring 0x7ce39d00 [nidx 11, len 0] |7cddd000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39da0, evt 0x7ce39e00, type 33, eidx 11, cc 1] |7cddd000| xhci_alloc_pipe: usbdev 0x7cded400, ring 0x000ed900, slotid 0, epid 4 |7cddd000| xhci_cmd_configure_endpoint: slotid 4, add 0x11, del 0x0 |7cddd000| xhci_trb_queue: ring 0x7ce39d00 [nidx 12, len 0] |7cddd000| xhci_process_events: ring 0x7ce39d00 [trb 0x7ce39db0, evt 0x7ce39e00, type 33, eidx 12, cc 1] |7cddd000| xhci_trb_queue: ring 0x7ce28200 [nidx 12, len 8] |7cddd000| xhci_trb_queue: ring 0x7ce28200 [nidx 13, len 1] |7cddd000| xhci_trb_queue: ring 0x7ce28200 [nidx 14, len 0] |7cddd000| xhci_xfer_kick: ring 0x7ce28200, slotid 4, epid 1 |7cddd000| xhci_process_events: ring 0x7ce28200 [trb 0x7ce282d0, evt 0x7ce28300, type 32, eidx 14, cc 1] |7cddd000| Searching bootorder for: /pci@i0cf8/usb@14/storage@f/*@0/*@0,0 |7cddd000| Searching bootorder for: /pci@i0cf8/usb@14/usb-*@f |7cddd000| xhci_trb_queue: ring 0x000ed900 [nidx 1, len 31] |7cddd000| xhci_xfer_kick: ring 0x000ed900, slotid 4, epid 4 |7cddd000| xhci_process_events: ring 0x000ed900 [trb 0x000ed900, evt 0x000eda00, type 32, eidx 1, cc 1] |7cddd000| xhci_trb_queue: ring 0x000edb00 [nidx 1, len 36] |7cddd000| xhci_xfer_kick: ring 0x000edb00, slotid 4, epid 3 |7cddd000| xhci_process_events: ring 0x000edb00 [trb 0x000edb00, evt 0x000edc00, type 32, eidx 1, cc 1] |7cddd000| xhci_trb_queue: ring 0x000edb00 [nidx 2, len 13] |7cddd000| xhci_xfer_kick: ring 0x000edb00, slotid 4, epid 3 |7cddd000| xhci_process_events: ring 0x000edb00 [trb 0x000edb10, evt 0x000edc00, type 32, eidx 2, cc 1] |7cddd000| USB MSC vendor='Mushkin' product='Ventura Ultra' rev='0' type=0 removable=0 |7cddd000| xhci_trb_queue: ring 0x000ed900 [nidx 2, len 31] |7cddd000| xhci_xfer_kick: ring 0x000ed900, slotid 4, epid 4 |7cddd000| xhci_process_events: ring 0x000ed900 [trb 0x000ed910, evt 0x000eda00, type 32, eidx 2, cc 1] | 2709 bytes lost
Edward
On Fri, Dec 04, 2015 at 07:08:50PM +0000, edward wandasiewicz wrote:
On 4 Dec 2015 7:04 p.m., "Kevin O'Connor" kevin@koconnor.net wrote:
On Fri, Dec 04, 2015 at 06:36:18PM +0000, edward wandasiewicz wrote:
@ John
Is the work on SeaVGABIOS for CBFS work under construction for the Broadwell based Pixel 2015?
Looking at Kevin's chromeimage.sh - showing relevant parts only
CBFSTOOL=cbfstool PAYLOAD=out/bios.bin.elf PAYLOADVGA=out/vgabios.bin
[...]
# # Add SeaVGABIOS to CBFS # $ CBFSTOOL $CBFSFILE add -f $PAYLOADVGA -n vgaroms/seavgabios.rom -t
optionrom
Question - if it is work under construction, the above may or may not show any VGA output? i.e. black screen
Or give it a whirl, and I may surprise myself?
Or stick with
## Extract vgabios from SeaBIOS CBFS area of original image.
ORIGCBFSFILE=orig-seabios.cbfs
$ dd if=$ORIGIMAGE of=$ORIGCBFSFILE skip=2 bs=2M count=1 2> /dev/null
$ CBFSTOOL $ORIGCBFSFILE extract -n pci8086,0406.rom -f pci8086,0406.rom
$ CBFSTOOL $CBFSFILE add -f pci8086,0406.rom -n pci8086,0a06.rom -t
optionrom
The logs you sent me seemed to indicate that SeaVGABIOS was running,
This means use vgaroms/seavgabios.rom
and leave commented parts in a commented state - no need for pci8086,0a06.rom parts
Yes.
-Kevin
-
edward wandasiewicz -
Kevin O'Connor