On Sun, Sep 02, 2012 at 09:02:05PM +0200, Christian Gmeiner wrote:
Am 02.09.2012 19:59 schrieb "Kevin O'Connor" kevin@koconnor.net:
On Sat, Sep 01, 2012 at 05:12:52PM +0200, Christian Gmeiner wrote:
There is no reason to access the DC registers via VGA memory mapping if we could the access via memory.
The patch series looks okay to me. Are these patches specific to the board you have, or will they work with all the boards currently supported by the SeaVGABIOS Geode code?
The patches are for all supported Geode devices. I try to get access to GX hardware so that I could test the patches in real hardware. I am working on a lx800 hardware. I am waiting for the edid patches get merged to come up with more patches :)
Are the "edid patches" you refer to the ones from Hiroshi Miura, or something else?
-Kevin
Am 02.09.2012 21:50 schrieb "Kevin O'Connor" kevin@koconnor.net:
On Sun, Sep 02, 2012 at 09:02:05PM +0200, Christian Gmeiner wrote:
Am 02.09.2012 19:59 schrieb "Kevin O'Connor" kevin@koconnor.net:
On Sat, Sep 01, 2012 at 05:12:52PM +0200, Christian Gmeiner wrote:
There is no reason to access the DC registers via VGA memory mapping if we could the access via memory.
The patch series looks okay to me. Are these patches specific to the board you have, or will they work with all the boards currently supported by the SeaVGABIOS Geode code?
The patches are for all supported Geode devices. I try to get access to
GX
hardware so that I could test the patches in real hardware. I am
working on
a lx800 hardware. I am waiting for the edid patches get merged to come
up
with more patches :)
Are the "edid patches" you refer to the ones from Hiroshi Miura, or something else?
The one from Hiroshi Miura. As I also want to do some EDID stuff for the geode. I will have a closer look at his patches tomorrow in office.
-
Christian Gmeiner -
Kevin O'Connor