On Mon, Feb 15, 2016 at 12:00:48PM +0000, Zeh, Werner wrote:
Hi Kevin.
We had some issues with some connected AHCI devices in SeaBIOS. We have connected some CF-Cards by using a simple SATA<->IDE bridge to the mainboard and in some cases, the drive (which is the CF-card) was not recognized correctly. After some deeper analysis we found that SeaBIOS does not set up the transfer rate which is used to communicate to the drive. The supported transfer rate can be found in the data structure which is delivered by IDENTIFY_DEVICE command.
So in our error cases the default transfer rate was too high and therefore data error has occurred. I have attached a patch which will deal with this case on AHCI controllers. Maybe you can push this patch to mainline or at least have a look at it.
Up to now I have verified the function of this patch with the latest master branch of SeaBIOS and a Broadwell-DE CPU. I have used PIO4, default PIO, Multiword-DMA2 and several Ultra-DMA CF-cards to ensure that all three paths work properly.
BTW: I am not that familiar with code style in SeaBIOS. If I made some formal mistakes, feel free to correct them.
Thanks. I'm not that familiar with the AHCI internals. Gerd, would you be able to review?
-Kevin
On Fr, 2016-02-19 at 21:18 -0500, Kevin O'Connor wrote:
On Mon, Feb 15, 2016 at 12:00:48PM +0000, Zeh, Werner wrote:
Hi Kevin.
We had some issues with some connected AHCI devices in SeaBIOS. We have connected some CF-Cards by using a simple SATA<->IDE bridge to the mainboard and in some cases, the drive (which is the CF-card) was not recognized correctly. After some deeper analysis we found that SeaBIOS does not set up the transfer rate which is used to communicate to the drive. The supported transfer rate can be found in the data structure which is delivered by IDENTIFY_DEVICE command.
So in our error cases the default transfer rate was too high and therefore data error has occurred. I have attached a patch which will deal with this case on AHCI controllers. Maybe you can push this patch to mainline or at least have a look at it.
Up to now I have verified the function of this patch with the latest master branch of SeaBIOS and a Broadwell-DE CPU. I have used PIO4, default PIO, Multiword-DMA2 and several Ultra-DMA CF-cards to ensure that all three paths work properly.
BTW: I am not that familiar with code style in SeaBIOS. If I made some formal mistakes, feel free to correct them.
Thanks. I'm not that familiar with the AHCI internals. Gerd, would you be able to review?
Patch looks good to me. Applied some tweaks, mostly cosmetically. The only functional change is that multi_dma and pio modes are checked even if the udma bit (bit 2 word 53) is set, just in case none of the bits in word 88 is set. Updated patch will go to the list in a moment.
cheers, Gerd
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Gerd Hoffmann -
Kevin O'Connor