Hi,
Currently the acpi (+smbios) io regions are in the middle of the addres space: At 0xb000 and 0xb100. And we start allocating I/O ports at 0xc000. piix additionally has some magic io ports (for cpu + pci hotplug) between 0xae00 and 0xaffff.
For q35 I'd like to move the acpi ports out if the way, so we can start allocating io ports at 0x2000 and use the whole 0x2000 -> 0xffff range.
This patch series does just that. There is one problem with that though (as you might have guessed from the 'RfC' tag):
To simplify things the acpi port move is done for both piix and q35, even though it doesn't buy us much on piix due to the hotplug ports. Programming the piix smbios base register was broken in qemu until very recently (1.4 will be the first release with this fixed). Bummer.
So what are our options?
(1) Set ACPI_PM_BASE at runtime, continue to use 0xb000 for piix. I'd prefer that one. Looks non-trivial due to apci dependencies and src/smm.c though.
(2) Make ACPI_PM_BASE a config option, so we can leave it at 0xb000 by default and allow switching to 0x1000 manually if we know qemu is new enougth to handle it properly. acpi dependency is still there, but as we pipe the aml through cpp anyway it shouldn't be that bad.
(3) Your bright idea?
cheers, Gerd
Gerd Hoffmann (2): move ACPI_PM_BASE from 0xb000 to 0x1000 q35: allocate from ioports from 0x2000 up
src/ioport.h | 4 ++-- src/pciinit.c | 6 +++++- src/ssdt-proc.dsl | 2 +- 3 files changed, 8 insertions(+), 4 deletions(-)
Signed-off-by: Gerd Hoffmann kraxel@redhat.com --- src/ioport.h | 4 ++-- src/ssdt-proc.dsl | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/ioport.h b/src/ioport.h index 3282fb4..615d467 100644 --- a/src/ioport.h +++ b/src/ioport.h @@ -56,8 +56,8 @@ #define PORT_BIOS_DEBUG 0x0402 #define PORT_QEMU_CFG_CTL 0x0510 #define PORT_QEMU_CFG_DATA 0x0511 -#define PORT_ACPI_PM_BASE 0xb000 -#define PORT_SMB_BASE 0xb100 +#define PORT_ACPI_PM_BASE 0x1000 +#define PORT_SMB_BASE 0x1100 #define PORT_BIOS_APM 0x8900
// Serial port offsets diff --git a/src/ssdt-proc.dsl b/src/ssdt-proc.dsl index 407d61e..4a52a97 100644 --- a/src/ssdt-proc.dsl +++ b/src/ssdt-proc.dsl @@ -22,7 +22,7 @@ DefinitionBlock ("ssdt-proc.aml", "SSDT", 0x01, "BXPC", "BXSSDT", 0x1) ACPI_EXTRACT_PROCESSOR_START ssdt_proc_start ACPI_EXTRACT_PROCESSOR_END ssdt_proc_end ACPI_EXTRACT_PROCESSOR_STRING ssdt_proc_name - Processor(CPAA, 0xAA, 0x0000b010, 0x06) { + Processor(CPAA, 0xAA, 0x00001010, 0x06) { ACPI_EXTRACT_NAME_BYTE_CONST ssdt_proc_id Name(ID, 0xAA) /*
--- src/pciinit.c | 6 +++++- 1 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/src/pciinit.c b/src/pciinit.c index a406bbd..1de34b8 100644 --- a/src/pciinit.c +++ b/src/pciinit.c @@ -40,6 +40,8 @@ u64 pcimem_end = BUILD_PCIMEM_END; u64 pcimem64_start = BUILD_PCIMEM64_START; u64 pcimem64_end = BUILD_PCIMEM64_END;
+static u32 ioport_base = 0xc000; + struct pci_region_entry { struct pci_device *dev; int bar; @@ -312,6 +314,8 @@ void mch_mem_addr_init(struct pci_device *dev, void *arg)
/* setup pci i/o window (above mmconfig) */ pcimem_start = addr + size; + + ioport_base = 0x2000; }
static const struct pci_device_id pci_platform_tbl[] = { @@ -610,7 +614,7 @@ static int pci_bios_check_devices(struct pci_bus *busses) // Setup region bases (given the regions' size and alignment) static int pci_bios_init_root_regions(struct pci_bus *bus) { - bus->r[PCI_REGION_TYPE_IO].base = 0xc000; + bus->r[PCI_REGION_TYPE_IO].base = ioport_base;
struct pci_region *r_end = &bus->r[PCI_REGION_TYPE_PREFMEM]; struct pci_region *r_start = &bus->r[PCI_REGION_TYPE_MEM];
On Mon, Jan 14, 2013 at 01:56:03PM +0100, Gerd Hoffmann wrote:
Hi,
Currently the acpi (+smbios) io regions are in the middle of the addres space: At 0xb000 and 0xb100. And we start allocating I/O ports at 0xc000. piix additionally has some magic io ports (for cpu + pci hotplug) between 0xae00 and 0xaffff.
For q35 I'd like to move the acpi ports out if the way, so we can start allocating io ports at 0x2000 and use the whole 0x2000 -> 0xffff range.
Is there a shortage of IO ports on q35 without this change?
BTW, this type of change would need to wait until after the next release.
-Kevin
On 01/15/13 00:47, Kevin O'Connor wrote:
On Mon, Jan 14, 2013 at 01:56:03PM +0100, Gerd Hoffmann wrote:
Hi,
Currently the acpi (+smbios) io regions are in the middle of the addres space: At 0xb000 and 0xb100. And we start allocating I/O ports at 0xc000. piix additionally has some magic io ports (for cpu + pci hotplug) between 0xae00 and 0xaffff.
For q35 I'd like to move the acpi ports out if the way, so we can start allocating io ports at 0x2000 and use the whole 0x2000 -> 0xffff range.
Is there a shortage of IO ports on q35 without this change?
Problem is each pci bridge needs a 4k out of 64k io address space (if it has devices with io ports behind it) because that is the smallest io window allowed by the pci specs. So if you build a somewhat larger virtual machine with pcie ports and pci bridges you quickly run out of address space if you limit yourself to 16k (0xc000+).
BTW, this type of change would need to wait until after the next release.
Sure, it isn't by intention to get this into 1.7.2.
cheers, Gerd
-
Gerd Hoffmann -
Kevin O'Connor