Signed-off-by: Vasilis Liaskovitis vasilis.liaskovitis@profitbricks.com --- hw/acpi_piix4.c | 15 +++++++++++++++ 1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index d5743b6..8bf30dd 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -37,6 +37,7 @@
#define GPE_BASE 0xafe0 #define PROC_BASE 0xaf00 +#define PROC_EJ_BASE 0xaf20 #define GPE_LEN 4 #define PCI_BASE 0xae00 #define PCI_EJ_BASE 0xae08 @@ -493,6 +494,17 @@ static void pcihotplug_write(void *opaque, uint32_t addr, uint32_t val) PIIX4_DPRINTF("pcihotplug write %x <== %d\n", addr, val); }
+static uint32_t cpuej_read(void *opaque, uint32_t addr) +{ + PIIX4_DPRINTF("cpuej read %x\n", addr); + return 0; +} + +static void cpuej_write(void *opaque, uint32_t addr, uint32_t val) +{ + PIIX4_DPRINTF("cpuej write %x <== %d\n", addr, val); +} + static uint32_t pciej_read(void *opaque, uint32_t addr) { PIIX4_DPRINTF("pciej read %x\n", addr); @@ -553,6 +565,9 @@ static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s) register_ioport_write(PROC_BASE, 32, 1, gpe_writeb, s); register_ioport_read(PROC_BASE, 32, 1, gpe_readb, s);
+ register_ioport_write(PROC_EJ_BASE, 32, 1, cpuej_write, s); + register_ioport_read(PROC_EJ_BASE, 32, 1, cpuej_read, s); + register_ioport_write(PCI_BASE, 8, 4, pcihotplug_write, pci0_status); register_ioport_read(PCI_BASE, 8, 4, pcihotplug_read, pci0_status);