On Thu, 2012-03-08 at 22:57:30 +0000, Julian Pidancet wrote:
On Wed, Mar 7, 2012 at 7:04 PM, Guillem Jover guillem@hadrons.org wrote:
On Wed, 2012-03-07 at 17:54:57 +0000, Julian Pidancet wrote:
So according to the manual, it should be BP, not EBP.
The register being decreased should match the one being used to address the stack, and the one to use depends on the descriptor as per above.
There is no "descriptor" in real mode. Default stack size is always 16-bit.
Certainly! And sorry, somehow missed the fact this is exclusively real-mode being emulated.
Also, I think the right thing to do is to decrement BP instead of EBP when SYSMODE_PREFIX_DATA is set:
M.x86.R_BP -= 4; push_long(fetch_data_long_abs(M.x86.R_SS, M.x86.R_BP));instead of:
M.x86.R_EBP -= 4; push_long(fetch_data_long_abs(M.x86.R_SS, M.x86.R_BP));...to remain exactly consistent with the manual.
Indeed.
In any case, It won't be a problem, because the 16 high bits of EBP will most likely be zero in real-mode code.
Well, not if the the code is using some 32-bit instructions. :)
They are not "32-bit instructions". The processor is still functioning in real-mode, therefore, addressing still follows the rules of real-mode addressing, as mentioned in Volume 1:Basic Architecture :
3.3.5 32-Bit and 16-Bit Address and Operand Sizes
Regardless of the mode, if the instructions are being modified by the prefixes to use 32-bit operands or addresses, they are in my book 32-bit instructions. In any case what I meant was that ebp can have any value because the register can be assigned directly, for example, and wrap-around might vary depending on what part of it it's being operated on.
thanks, guillem
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Guillem Jover