Over the last few days I've been looking through the vga bios code, and I observed some areas for improvement.
-Kevin
Kevin O'Connor (6): vgabios: Define video_save_pointer_table layout. vgabios: Minor - use segoff_s for static_functionality ptr. vgabios: Extend information in internal vgamode_s struct. vgabios: Use vgamode_s instead of video_param_table in code. vgabios: Generate video_param_table at runtime. vgabios: Place a signature at offset 0x1e of the rom.
vgasrc/vga.c | 28 ++-- vgasrc/vgaentry.S | 4 + vgasrc/vgafb.c | 9 +- vgasrc/vgaio.c | 16 +- vgasrc/vgatables.c | 461 ++++++++++++++++++++++++---------------------------- vgasrc/vgatables.h | 31 ++-- 6 files changed, 256 insertions(+), 293 deletions(-)
Signed-off-by: Kevin O'Connor kevin@koconnor.net --- vgasrc/vga.c | 6 +++--- vgasrc/vgatables.c | 4 ++-- vgasrc/vgatables.h | 12 +++++++++++- 3 files changed, 16 insertions(+), 6 deletions(-)
diff --git a/vgasrc/vga.c b/vgasrc/vga.c index d1de5cc..ee10704 100644 --- a/vgasrc/vga.c +++ b/vgasrc/vga.c @@ -420,7 +420,7 @@ vga_set_mode(u8 mode, u8 noclearmem) // FIXME We nearly have the good tables. to be reworked SET_BDA(dcc_index, 0x08); // 8 is VGA should be ok for now SET_BDA(video_savetable - , SEGOFF(get_global_seg(), (u32)video_save_pointer_table)); + , SEGOFF(get_global_seg(), (u32)&video_save_pointer_table));
// FIXME SET_BDA(video_msr, 0x00); // Unavailable on vanilla vga, but... @@ -1586,8 +1586,8 @@ vga_post(struct bregs *regs) // XXX - clear screen and display info
// XXX: fill it - SET_VGA(video_save_pointer_table[0], (u32)video_param_table); - SET_VGA(video_save_pointer_table[1], get_global_seg()); + SET_VGA(video_save_pointer_table.videoparam + , SEGOFF(get_global_seg(), (u32)video_param_table));
// Fixup checksum extern u8 _rom_header_size, _rom_header_checksum; diff --git a/vgasrc/vgatables.c b/vgasrc/vgatables.c index 0587e65..17a6ca6 100644 --- a/vgasrc/vgatables.c +++ b/vgasrc/vgatables.c @@ -13,6 +13,8 @@ * Video parameter table ****************************************************************/
+struct VideoSavePointer_s video_save_pointer_table VAR16; + struct VideoParam_s video_param_table[] VAR16 = { // index=0x00 no mode defined {}, @@ -414,8 +416,6 @@ find_vga_entry(u8 mode) return NULL; }
-u16 video_save_pointer_table[14] VAR16; -
/**************************************************************** * Static functionality table diff --git a/vgasrc/vgatables.h b/vgasrc/vgatables.h index d2fad8c..ef15b1d 100644 --- a/vgasrc/vgatables.h +++ b/vgasrc/vgatables.h @@ -70,6 +70,16 @@ #define SCREEN_IO_START(x,y,p) (((((x)*(y)) | 0x00ff) + 1) * (p)) #define SCREEN_MEM_START(x,y,p) SCREEN_IO_START(((x)*2),(y),(p))
+// Standard Video Save Pointer Table +struct VideoSavePointer_s { + struct segoff_s videoparam; + struct segoff_s paramdynamicsave; + struct segoff_s textcharset; + struct segoff_s graphcharset; + struct segoff_s secsavepointer; + u8 reserved[8]; +} PACKED; + /* standard BIOS Video Parameter Table */ struct VideoParam_s { u8 twidth; @@ -138,7 +148,7 @@ struct saveDACcolors {
// vgatables.c struct vgamode_s *find_vga_entry(u8 mode); -extern u16 video_save_pointer_table[]; +extern struct VideoSavePointer_s video_save_pointer_table; extern struct VideoParam_s video_param_table[]; extern u8 static_functionality[];
--- vgasrc/vga.c | 7 +++---- 1 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/vgasrc/vga.c b/vgasrc/vga.c index ee10704..903c04c 100644 --- a/vgasrc/vga.c +++ b/vgasrc/vga.c @@ -1092,8 +1092,7 @@ handle_101a(struct bregs *regs)
struct funcInfo { - u16 static_functionality_off; - u16 static_functionality_seg; + struct segoff_s static_functionality; u8 bda_0x49[30]; u8 bda_0x84[3]; u8 dcc_index; @@ -1119,8 +1118,8 @@ handle_101b(struct bregs *regs) struct funcInfo *info = (void*)(regs->di+0); memset_far(seg, info, 0, sizeof(*info)); // Address of static functionality table - SET_FARVAR(seg, info->static_functionality_off, (u32)static_functionality); - SET_FARVAR(seg, info->static_functionality_seg, get_global_seg()); + SET_FARVAR(seg, info->static_functionality + , SEGOFF(get_global_seg(), (u32)static_functionality));
// Hard coded copy from BIOS area. Should it be cleaner ? memcpy_far(seg, info->bda_0x49, SEG_BDA, (void*)0x49
Copy all the data in video_param_table to vga_modes.
Signed-off-by: Kevin O'Connor kevin@koconnor.net --- vgasrc/vgatables.c | 164 ++++++++++++++++++++++++++++++++++++++++++++++------ vgasrc/vgatables.h | 12 ++++- 2 files changed, 157 insertions(+), 19 deletions(-)
diff --git a/vgasrc/vgatables.c b/vgasrc/vgatables.c index 17a6ca6..9fac4cd 100644 --- a/vgasrc/vgatables.c +++ b/vgasrc/vgatables.c @@ -245,7 +245,7 @@ struct VideoParam_s video_param_table[] VAR16 = {
/**************************************************************** - * Palette definitions + * Register definitions ****************************************************************/
/* Mono */ @@ -376,6 +376,117 @@ static u8 palette3[] VAR16 = { 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00 };
+static u8 sequ_01[] VAR16 = { 0x08, 0x03, 0x00, 0x02 }; +static u8 crtc_01[] VAR16 = { + 0x2d, 0x27, 0x28, 0x90, 0x2b, 0xa0, 0xbf, 0x1f, + 0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00, + 0x9c, 0x8e, 0x8f, 0x14, 0x1f, 0x96, 0xb9, 0xa3, + 0xff }; +static u8 actl_01[] VAR16 = { + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07, + 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, + 0x0c, 0x00, 0x0f, 0x08 }; +static u8 grdc_01[] VAR16 = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x0f, 0xff }; +static u8 sequ_03[] VAR16 = { 0x00, 0x03, 0x00, 0x02 }; +static u8 crtc_03[] VAR16 = { + 0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f, + 0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00, + 0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3, + 0xff }; +static u8 sequ_04[] VAR16 = { 0x09, 0x03, 0x00, 0x02 }; +static u8 crtc_04[] VAR16 = { + 0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f, + 0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xa2, + 0xff }; +static u8 actl_04[] VAR16 = { + 0x00, 0x13, 0x15, 0x17, 0x02, 0x04, 0x06, 0x07, + 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, + 0x01, 0x00, 0x03, 0x00 }; +static u8 grdc_04[] VAR16 = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0f, 0x0f, 0xff }; +static u8 sequ_06[] VAR16 = { 0x01, 0x01, 0x00, 0x06 }; +static u8 crtc_06[] VAR16 = { + 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f, + 0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x9c, 0x8e, 0x8f, 0x28, 0x00, 0x96, 0xb9, 0xc2, + 0xff }; +static u8 actl_06[] VAR16 = { + 0x00, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, + 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, + 0x01, 0x00, 0x01, 0x00 }; +static u8 grdc_06[] VAR16 = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0d, 0x0f, 0xff }; +static u8 crtc_07[] VAR16 = { + 0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f, + 0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00, + 0x9c, 0x8e, 0x8f, 0x28, 0x0f, 0x96, 0xb9, 0xa3, + 0xff }; +static u8 actl_07[] VAR16 = { + 0x00, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, + 0x10, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, + 0x0e, 0x00, 0x0f, 0x08 }; +static u8 grdc_07[] VAR16 = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0a, 0x0f, 0xff }; +static u8 sequ_0d[] VAR16 = { 0x09, 0x0f, 0x00, 0x06 }; +static u8 crtc_0d[] VAR16 = { + 0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f, + 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xe3, + 0xff }; +static u8 actl_0d[] VAR16 = { + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, + 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, + 0x01, 0x00, 0x0f, 0x00 }; +static u8 grdc_0d[] VAR16 = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff }; +static u8 sequ_0e[] VAR16 = { 0x01, 0x0f, 0x00, 0x06 }; +static u8 crtc_0e[] VAR16 = { + 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f, + 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x9c, 0x8e, 0x8f, 0x28, 0x00, 0x96, 0xb9, 0xe3, + 0xff }; +static u8 crtc_0f[] VAR16 = { + 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f, + 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x83, 0x85, 0x5d, 0x28, 0x0f, 0x63, 0xba, 0xe3, + 0xff }; +static u8 actl_0f[] VAR16 = { + 0x00, 0x08, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, + 0x00, 0x08, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, + 0x01, 0x00, 0x01, 0x00 }; +static u8 actl_10[] VAR16 = { + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07, + 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, + 0x01, 0x00, 0x0f, 0x00 }; +static u8 crtc_11[] VAR16 = { + 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e, + 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xea, 0x8c, 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xe3, + 0xff }; +static u8 actl_11[] VAR16 = { + 0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f, + 0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f, + 0x01, 0x00, 0x0f, 0x00 }; +static u8 sequ_13[] VAR16 = { 0x01, 0x0f, 0x00, 0x0e }; +static u8 crtc_13[] VAR16 = { + 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f, + 0x00, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x9c, 0x8e, 0x8f, 0x28, 0x40, 0x96, 0xb9, 0xa3, + 0xff }; +static u8 actl_13[] VAR16 = { + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, + 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, + 0x41, 0x00, 0x0f, 0x00 }; +static u8 grdc_13[] VAR16 = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0f, 0xff }; +static u8 crtc_6A[] VAR16 = { + 0x7f, 0x63, 0x63, 0x83, 0x6b, 0x1b, 0x72, 0xf0, + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x59, 0x8d, 0x57, 0x32, 0x00, 0x57, 0x73, 0xe3, + 0xff }; +
/**************************************************************** * Video mode list @@ -385,23 +496,40 @@ static u8 palette3[] VAR16 = { #define VPARAM(x) &video_param_table[x]
static struct vgamode_s vga_modes[] VAR16 = { - //mode vparam model bits sstart pelm dac - {0x00, VPARAM(0x17), CTEXT, 4, SEG_CTEXT, 0xFF, PAL(palette2)}, - {0x01, VPARAM(0x17), CTEXT, 4, SEG_CTEXT, 0xFF, PAL(palette2)}, - {0x02, VPARAM(0x18), CTEXT, 4, SEG_CTEXT, 0xFF, PAL(palette2)}, - {0x03, VPARAM(0x18), CTEXT, 4, SEG_CTEXT, 0xFF, PAL(palette2)}, - {0x04, VPARAM(0x04), CGA, 2, SEG_CTEXT, 0xFF, PAL(palette1)}, - {0x05, VPARAM(0x05), CGA, 2, SEG_CTEXT, 0xFF, PAL(palette1)}, - {0x06, VPARAM(0x06), CGA, 1, SEG_CTEXT, 0xFF, PAL(palette1)}, - {0x07, VPARAM(0x07), MTEXT, 4, SEG_MTEXT, 0xFF, PAL(palette0)}, - {0x0D, VPARAM(0x0d), PLANAR4, 4, SEG_GRAPH, 0xFF, PAL(palette1)}, - {0x0E, VPARAM(0x0e), PLANAR4, 4, SEG_GRAPH, 0xFF, PAL(palette1)}, - {0x0F, VPARAM(0x11), PLANAR1, 1, SEG_GRAPH, 0xFF, PAL(palette0)}, - {0x10, VPARAM(0x12), PLANAR4, 4, SEG_GRAPH, 0xFF, PAL(palette2)}, - {0x11, VPARAM(0x1a), PLANAR1, 1, SEG_GRAPH, 0xFF, PAL(palette2)}, - {0x12, VPARAM(0x1b), PLANAR4, 4, SEG_GRAPH, 0xFF, PAL(palette2)}, - {0x13, VPARAM(0x1c), LINEAR8, 8, SEG_GRAPH, 0xFF, PAL(palette3)}, - {0x6A, VPARAM(0x1d), PLANAR4, 4, SEG_GRAPH, 0xFF, PAL(palette2)}, + //mode model tx ty ch bits sstart slength vparam + // pelm dac sequ misc crtc actl grdc + {0x00, CTEXT, 40, 25, 16, 4, SEG_CTEXT, 0x0800, VPARAM(0x17) + , 0xFF, PAL(palette2), sequ_01, 0x67, crtc_01, actl_01, grdc_01 }, + {0x01, CTEXT, 40, 25, 16, 4, SEG_CTEXT, 0x0800, VPARAM(0x17) + , 0xFF, PAL(palette2), sequ_01, 0x67, crtc_01, actl_01, grdc_01 }, + {0x02, CTEXT, 80, 25, 16, 4, SEG_CTEXT, 0x1000, VPARAM(0x18) + , 0xFF, PAL(palette2), sequ_03, 0x67, crtc_03, actl_01, grdc_01 }, + {0x03, CTEXT, 80, 25, 16, 4, SEG_CTEXT, 0x1000, VPARAM(0x18) + , 0xFF, PAL(palette2), sequ_03, 0x67, crtc_03, actl_01, grdc_01 }, + {0x04, CGA, 40, 25, 8, 2, SEG_CTEXT, 0x0800, VPARAM(0x04) + , 0xFF, PAL(palette1), sequ_04, 0x63, crtc_04, actl_04, grdc_04}, + {0x05, CGA, 40, 25, 8, 2, SEG_CTEXT, 0x0800, VPARAM(0x05) + , 0xFF, PAL(palette1), sequ_04, 0x63, crtc_04, actl_04, grdc_04}, + {0x06, CGA, 80, 25, 8, 1, SEG_CTEXT, 0x1000, VPARAM(0x06) + , 0xFF, PAL(palette1), sequ_06, 0x63, crtc_06, actl_06, grdc_06}, + {0x07, MTEXT, 80, 25, 16, 4, SEG_MTEXT, 0x1000, VPARAM(0x07) + , 0xFF, PAL(palette0), sequ_03, 0x66, crtc_07, actl_07, grdc_07}, + {0x0D, PLANAR4, 40, 25, 8, 4, SEG_GRAPH, 0x2000, VPARAM(0x0d) + , 0xFF, PAL(palette1), sequ_0d, 0x63, crtc_0d, actl_0d, grdc_0d}, + {0x0E, PLANAR4, 80, 25, 8, 4, SEG_GRAPH, 0x4000, VPARAM(0x0e) + , 0xFF, PAL(palette1), sequ_0e, 0x63, crtc_0e, actl_0d, grdc_0d}, + {0x0F, PLANAR1, 80, 25, 14, 1, SEG_GRAPH, 0x8000, VPARAM(0x11) + , 0xFF, PAL(palette0), sequ_0e, 0xa3, crtc_0f, actl_0f, grdc_0d}, + {0x10, PLANAR4, 80, 25, 14, 4, SEG_GRAPH, 0x8000, VPARAM(0x12) + , 0xFF, PAL(palette2), sequ_0e, 0xa3, crtc_0f, actl_10, grdc_0d}, + {0x11, PLANAR1, 80, 30, 16, 1, SEG_GRAPH, 0x0000, VPARAM(0x1a) + , 0xFF, PAL(palette2), sequ_0e, 0xe3, crtc_11, actl_11, grdc_0d}, + {0x12, PLANAR4, 80, 30, 16, 4, SEG_GRAPH, 0x0000, VPARAM(0x1b) + , 0xFF, PAL(palette2), sequ_0e, 0xe3, crtc_11, actl_10, grdc_0d}, + {0x13, LINEAR8, 40, 25, 8, 8, SEG_GRAPH, 0x0000, VPARAM(0x1c) + , 0xFF, PAL(palette3), sequ_13, 0x63, crtc_13, actl_13, grdc_13}, + {0x6A, PLANAR4, 100, 37, 16, 4, SEG_GRAPH, 0x0000, VPARAM(0x1d) + , 0xFF, PAL(palette2), sequ_0e, 0xe3, crtc_6A, actl_10, grdc_0d}, };
struct vgamode_s * diff --git a/vgasrc/vgatables.h b/vgasrc/vgatables.h index ef15b1d..9976745 100644 --- a/vgasrc/vgatables.h +++ b/vgasrc/vgatables.h @@ -95,13 +95,23 @@ struct VideoParam_s {
struct vgamode_s { u8 svgamode; - struct VideoParam_s *vparam; u8 memmodel; /* CTEXT,MTEXT,CGA,PL1,PL2,PL4,P8,P15,P16,P24,P32 */ + u8 twidth; + u8 theight; + u8 cheight; u8 pixbits; u16 sstart; + u16 slength; + struct VideoParam_s *vparam; + u8 pelmask; u8 *dac; u16 dacsize; + u8 *sequ_regs; + u8 miscreg; + u8 *crtc_regs; + u8 *actl_regs; + u8 *grdc_regs; };
struct saveVideoHardware {
Now that all the info in video_param_table is also in vgamode_s, use the info in vgamode_s throughout the code.
Signed-off-by: Kevin O'Connor kevin@koconnor.net --- vgasrc/vga.c | 14 ++++++-------- vgasrc/vgafb.c | 9 +++------ vgasrc/vgaio.c | 16 ++++++++++------ vgasrc/vgatables.c | 34 +++++++++++++++++----------------- vgasrc/vgatables.h | 3 +-- 5 files changed, 37 insertions(+), 39 deletions(-)
diff --git a/vgasrc/vga.c b/vgasrc/vga.c index 903c04c..e7b96ff 100644 --- a/vgasrc/vga.c +++ b/vgasrc/vga.c @@ -175,8 +175,7 @@ set_active_page(u8 page) // Start address address = SCREEN_IO_START(nbcols, nbrows, page); } else { - struct VideoParam_s *vparam_g = GET_GLOBAL(vmode_g->vparam); - address = page * GET_GLOBAL(vparam_g->slength); + address = page * GET_GLOBAL(vmode_g->slength); }
vgahw_set_active_page(address); @@ -394,8 +393,7 @@ vga_set_mode(u8 mode, u8 noclearmem) perform_gray_scale_summing(0x00, 0x100); }
- struct VideoParam_s *vparam_g = GET_GLOBAL(vmode_g->vparam); - vgahw_set_mode(vparam_g); + vgahw_set_mode(vmode_g);
if (noclearmem == 0x00) clear_screen(vmode_g); @@ -406,12 +404,12 @@ vga_set_mode(u8 mode, u8 noclearmem) crtc_addr = VGAREG_MDA_CRTC_ADDRESS;
// Set the BIOS mem - u16 cheight = GET_GLOBAL(vparam_g->cheight); + u16 cheight = GET_GLOBAL(vmode_g->cheight); SET_BDA(video_mode, mode); - SET_BDA(video_cols, GET_GLOBAL(vparam_g->twidth)); - SET_BDA(video_pagesize, GET_GLOBAL(vparam_g->slength)); + SET_BDA(video_cols, GET_GLOBAL(vmode_g->twidth)); + SET_BDA(video_pagesize, GET_GLOBAL(vmode_g->slength)); SET_BDA(crtc_address, crtc_addr); - SET_BDA(video_rows, GET_GLOBAL(vparam_g->theightm1)); + SET_BDA(video_rows, GET_GLOBAL(vmode_g->theight)-1); SET_BDA(char_height, cheight); SET_BDA(video_ctl, (0x60 | noclearmem)); SET_BDA(video_switches, 0xF9); diff --git a/vgasrc/vgafb.c b/vgasrc/vgafb.c index 866f7f8..1e1943d 100644 --- a/vgasrc/vgafb.c +++ b/vgasrc/vgafb.c @@ -40,8 +40,7 @@ static void scroll_pl4(struct vgamode_s *vmode_g, int nblines, int attr , struct cursorpos ul, struct cursorpos lr) { - struct VideoParam_s *vparam_g = GET_GLOBAL(vmode_g->vparam); - u8 cheight = GET_GLOBAL(vparam_g->cheight); + u8 cheight = GET_GLOBAL(vmode_g->cheight); int stride = GET_BDA(video_cols); void *src_far, *dest_far; if (nblines >= 0) { @@ -72,8 +71,7 @@ static void scroll_cga(struct vgamode_s *vmode_g, int nblines, int attr , struct cursorpos ul, struct cursorpos lr) { - struct VideoParam_s *vparam_g = GET_GLOBAL(vmode_g->vparam); - u8 cheight = GET_GLOBAL(vparam_g->cheight); + u8 cheight = GET_GLOBAL(vmode_g->cheight); u8 bpp = GET_GLOBAL(vmode_g->pixbits); int stride = GET_BDA(video_cols) * bpp; void *src_far, *dest_far; @@ -190,8 +188,7 @@ write_gfx_char_pl4(struct vgamode_s *vmode_g if (cp.x >= nbcols) return;
- struct VideoParam_s *vparam_g = GET_GLOBAL(vmode_g->vparam); - u8 cheight = GET_GLOBAL(vparam_g->cheight); + u8 cheight = GET_GLOBAL(vmode_g->cheight); u8 *fdata_g; switch (cheight) { case 14: diff --git a/vgasrc/vgaio.c b/vgasrc/vgaio.c index ffded34..6154076 100644 --- a/vgasrc/vgaio.c +++ b/vgasrc/vgaio.c @@ -481,16 +481,17 @@ vgahw_restore_state(u16 seg, struct saveVideoHardware *info) }
void -vgahw_set_mode(struct VideoParam_s *vparam_g) +vgahw_set_mode(struct vgamode_s *vmode_g) { // Reset Attribute Ctl flip-flop inb(VGAREG_ACTL_RESET);
// Set Attribute Ctl + u8 *regs = GET_GLOBAL(vmode_g->actl_regs); u16 i; for (i = 0; i <= 0x13; i++) { outb(i, VGAREG_ACTL_ADDRESS); - outb(GET_GLOBAL(vparam_g->actl_regs[i]), VGAREG_ACTL_WRITE_DATA); + outb(GET_GLOBAL(regs[i]), VGAREG_ACTL_WRITE_DATA); } outb(0x14, VGAREG_ACTL_ADDRESS); outb(0x00, VGAREG_ACTL_WRITE_DATA); @@ -498,19 +499,21 @@ vgahw_set_mode(struct VideoParam_s *vparam_g) // Set Sequencer Ctl outb(0, VGAREG_SEQU_ADDRESS); outb(0x03, VGAREG_SEQU_DATA); + regs = GET_GLOBAL(vmode_g->sequ_regs); for (i = 1; i <= 4; i++) { outb(i, VGAREG_SEQU_ADDRESS); - outb(GET_GLOBAL(vparam_g->sequ_regs[i - 1]), VGAREG_SEQU_DATA); + outb(GET_GLOBAL(regs[i - 1]), VGAREG_SEQU_DATA); }
// Set Grafx Ctl + regs = GET_GLOBAL(vmode_g->grdc_regs); for (i = 0; i <= 8; i++) { outb(i, VGAREG_GRDC_ADDRESS); - outb(GET_GLOBAL(vparam_g->grdc_regs[i]), VGAREG_GRDC_DATA); + outb(GET_GLOBAL(regs[i]), VGAREG_GRDC_DATA); }
// Set CRTC address VGA or MDA - u8 miscreg = GET_GLOBAL(vparam_g->miscreg); + u8 miscreg = GET_GLOBAL(vmode_g->miscreg); u16 crtc_addr = VGAREG_VGA_CRTC_ADDRESS; if (!(miscreg & 1)) crtc_addr = VGAREG_MDA_CRTC_ADDRESS; @@ -518,9 +521,10 @@ vgahw_set_mode(struct VideoParam_s *vparam_g) // Disable CRTC write protection outw(0x0011, crtc_addr); // Set CRTC regs + regs = GET_GLOBAL(vmode_g->crtc_regs); for (i = 0; i <= 0x18; i++) { outb(i, crtc_addr); - outb(GET_GLOBAL(vparam_g->crtc_regs[i]), crtc_addr + 1); + outb(GET_GLOBAL(regs[i]), crtc_addr + 1); }
// Set the misc register diff --git a/vgasrc/vgatables.c b/vgasrc/vgatables.c index 9fac4cd..10bcbcd 100644 --- a/vgasrc/vgatables.c +++ b/vgasrc/vgatables.c @@ -496,39 +496,39 @@ static u8 crtc_6A[] VAR16 = { #define VPARAM(x) &video_param_table[x]
static struct vgamode_s vga_modes[] VAR16 = { - //mode model tx ty ch bits sstart slength vparam + //mode model tx ty ch bits sstart slength // pelm dac sequ misc crtc actl grdc - {0x00, CTEXT, 40, 25, 16, 4, SEG_CTEXT, 0x0800, VPARAM(0x17) + {0x00, CTEXT, 40, 25, 16, 4, SEG_CTEXT, 0x0800 , 0xFF, PAL(palette2), sequ_01, 0x67, crtc_01, actl_01, grdc_01 }, - {0x01, CTEXT, 40, 25, 16, 4, SEG_CTEXT, 0x0800, VPARAM(0x17) + {0x01, CTEXT, 40, 25, 16, 4, SEG_CTEXT, 0x0800 , 0xFF, PAL(palette2), sequ_01, 0x67, crtc_01, actl_01, grdc_01 }, - {0x02, CTEXT, 80, 25, 16, 4, SEG_CTEXT, 0x1000, VPARAM(0x18) + {0x02, CTEXT, 80, 25, 16, 4, SEG_CTEXT, 0x1000 , 0xFF, PAL(palette2), sequ_03, 0x67, crtc_03, actl_01, grdc_01 }, - {0x03, CTEXT, 80, 25, 16, 4, SEG_CTEXT, 0x1000, VPARAM(0x18) + {0x03, CTEXT, 80, 25, 16, 4, SEG_CTEXT, 0x1000 , 0xFF, PAL(palette2), sequ_03, 0x67, crtc_03, actl_01, grdc_01 }, - {0x04, CGA, 40, 25, 8, 2, SEG_CTEXT, 0x0800, VPARAM(0x04) + {0x04, CGA, 40, 25, 8, 2, SEG_CTEXT, 0x0800 , 0xFF, PAL(palette1), sequ_04, 0x63, crtc_04, actl_04, grdc_04}, - {0x05, CGA, 40, 25, 8, 2, SEG_CTEXT, 0x0800, VPARAM(0x05) + {0x05, CGA, 40, 25, 8, 2, SEG_CTEXT, 0x0800 , 0xFF, PAL(palette1), sequ_04, 0x63, crtc_04, actl_04, grdc_04}, - {0x06, CGA, 80, 25, 8, 1, SEG_CTEXT, 0x1000, VPARAM(0x06) + {0x06, CGA, 80, 25, 8, 1, SEG_CTEXT, 0x1000 , 0xFF, PAL(palette1), sequ_06, 0x63, crtc_06, actl_06, grdc_06}, - {0x07, MTEXT, 80, 25, 16, 4, SEG_MTEXT, 0x1000, VPARAM(0x07) + {0x07, MTEXT, 80, 25, 16, 4, SEG_MTEXT, 0x1000 , 0xFF, PAL(palette0), sequ_03, 0x66, crtc_07, actl_07, grdc_07}, - {0x0D, PLANAR4, 40, 25, 8, 4, SEG_GRAPH, 0x2000, VPARAM(0x0d) + {0x0D, PLANAR4, 40, 25, 8, 4, SEG_GRAPH, 0x2000 , 0xFF, PAL(palette1), sequ_0d, 0x63, crtc_0d, actl_0d, grdc_0d}, - {0x0E, PLANAR4, 80, 25, 8, 4, SEG_GRAPH, 0x4000, VPARAM(0x0e) + {0x0E, PLANAR4, 80, 25, 8, 4, SEG_GRAPH, 0x4000 , 0xFF, PAL(palette1), sequ_0e, 0x63, crtc_0e, actl_0d, grdc_0d}, - {0x0F, PLANAR1, 80, 25, 14, 1, SEG_GRAPH, 0x8000, VPARAM(0x11) + {0x0F, PLANAR1, 80, 25, 14, 1, SEG_GRAPH, 0x8000 , 0xFF, PAL(palette0), sequ_0e, 0xa3, crtc_0f, actl_0f, grdc_0d}, - {0x10, PLANAR4, 80, 25, 14, 4, SEG_GRAPH, 0x8000, VPARAM(0x12) + {0x10, PLANAR4, 80, 25, 14, 4, SEG_GRAPH, 0x8000 , 0xFF, PAL(palette2), sequ_0e, 0xa3, crtc_0f, actl_10, grdc_0d}, - {0x11, PLANAR1, 80, 30, 16, 1, SEG_GRAPH, 0x0000, VPARAM(0x1a) + {0x11, PLANAR1, 80, 30, 16, 1, SEG_GRAPH, 0x0000 , 0xFF, PAL(palette2), sequ_0e, 0xe3, crtc_11, actl_11, grdc_0d}, - {0x12, PLANAR4, 80, 30, 16, 4, SEG_GRAPH, 0x0000, VPARAM(0x1b) + {0x12, PLANAR4, 80, 30, 16, 4, SEG_GRAPH, 0x0000 , 0xFF, PAL(palette2), sequ_0e, 0xe3, crtc_11, actl_10, grdc_0d}, - {0x13, LINEAR8, 40, 25, 8, 8, SEG_GRAPH, 0x0000, VPARAM(0x1c) + {0x13, LINEAR8, 40, 25, 8, 8, SEG_GRAPH, 0x0000 , 0xFF, PAL(palette3), sequ_13, 0x63, crtc_13, actl_13, grdc_13}, - {0x6A, PLANAR4, 100, 37, 16, 4, SEG_GRAPH, 0x0000, VPARAM(0x1d) + {0x6A, PLANAR4, 100, 37, 16, 4, SEG_GRAPH, 0x0000 , 0xFF, PAL(palette2), sequ_0e, 0xe3, crtc_6A, actl_10, grdc_0d}, };
diff --git a/vgasrc/vgatables.h b/vgasrc/vgatables.h index 9976745..f31595e 100644 --- a/vgasrc/vgatables.h +++ b/vgasrc/vgatables.h @@ -102,7 +102,6 @@ struct vgamode_s { u8 pixbits; u16 sstart; u16 slength; - struct VideoParam_s *vparam;
u8 pelmask; u8 *dac; @@ -221,7 +220,7 @@ void vgahw_set_scan_lines(u8 lines); u16 vgahw_get_vde(void); void vgahw_save_state(u16 seg, struct saveVideoHardware *info); void vgahw_restore_state(u16 seg, struct saveVideoHardware *info); -void vgahw_set_mode(struct VideoParam_s *vparam_g); +void vgahw_set_mode(struct vgamode_s *vmode_g); void vgahw_enable_video_addressing(u8 disable); void vgahw_init(void);
Now that all the mode info is available in vga_modes, generate the externally visible video_param_table data from it.
Signed-off-by: Kevin O'Connor kevin@koconnor.net --- vgasrc/vga.c | 5 +- vgasrc/vgatables.c | 293 ++++++++++++---------------------------------------- vgasrc/vgatables.h | 26 +----- 3 files changed, 69 insertions(+), 255 deletions(-)
diff --git a/vgasrc/vga.c b/vgasrc/vga.c index e7b96ff..ba07584 100644 --- a/vgasrc/vga.c +++ b/vgasrc/vga.c @@ -23,7 +23,6 @@ #define DEBUG_VGA_POST 1 #define DEBUG_VGA_10 3
-#define SET_VGA(var, val) SET_FARVAR(get_global_seg(), (var), (val))
/**************************************************************** * PCI Data @@ -1582,9 +1581,7 @@ vga_post(struct bregs *regs)
// XXX - clear screen and display info
- // XXX: fill it - SET_VGA(video_save_pointer_table.videoparam - , SEGOFF(get_global_seg(), (u32)video_param_table)); + build_video_param();
// Fixup checksum extern u8 _rom_header_size, _rom_header_checksum; diff --git a/vgasrc/vgatables.c b/vgasrc/vgatables.c index 10bcbcd..9027c88 100644 --- a/vgasrc/vgatables.c +++ b/vgasrc/vgatables.c @@ -13,235 +13,74 @@ * Video parameter table ****************************************************************/
+// Standard Video Save Pointer Table +struct VideoSavePointer_s { + struct segoff_s videoparam; + struct segoff_s paramdynamicsave; + struct segoff_s textcharset; + struct segoff_s graphcharset; + struct segoff_s secsavepointer; + u8 reserved[8]; +} PACKED; + struct VideoSavePointer_s video_save_pointer_table VAR16;
-struct VideoParam_s video_param_table[] VAR16 = { - // index=0x00 no mode defined - {}, - // index=0x01 no mode defined - {}, - // index=0x02 no mode defined - {}, - // index=0x03 no mode defined - {}, - // index=0x04 vga mode 0x04 - { 40, 24, 8, 0x0800, /* tw, th-1, ch, slength */ - { 0x09, 0x03, 0x00, 0x02 }, /* sequ_regs */ - 0x63, /* miscreg */ - { 0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f, - 0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xa2, - 0xff }, /* crtc_regs */ - { 0x00, 0x13, 0x15, 0x17, 0x02, 0x04, 0x06, 0x07, - 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, - 0x01, 0x00, 0x03, 0x00 }, /* actl_regs */ - { 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0f, 0x0f, 0xff }, /* grdc_regs */ - }, - /* index=0x05 vga mode 0x05 */ - { 40, 24, 8, 0x0800, /* tw, th-1, ch, slength */ - { 0x09, 0x03, 0x00, 0x02 }, /* sequ_regs */ - 0x63, /* miscreg */ - { 0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f, - 0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xa2, - 0xff }, /* crtc_regs */ - { 0x00, 0x13, 0x15, 0x17, 0x02, 0x04, 0x06, 0x07, - 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, - 0x01, 0x00, 0x03, 0x00 }, /* actl_regs */ - { 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0f, 0x0f, 0xff }, /* grdc_regs */ - }, - /* index=0x06 vga mode 0x06 */ - { 80, 24, 8, 0x1000, /* tw, th-1, ch, slength */ - { 0x01, 0x01, 0x00, 0x06 }, /* sequ_regs */ - 0x63, /* miscreg */ - { 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f, - 0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x9c, 0x8e, 0x8f, 0x28, 0x00, 0x96, 0xb9, 0xc2, - 0xff }, /* crtc_regs */ - { 0x00, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, - 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, - 0x01, 0x00, 0x01, 0x00 }, /* actl_regs */ - { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0d, 0x0f, 0xff }, /* grdc_regs */ - }, - /* index=0x07 vga mode 0x07 */ - { 80, 24, 16, 0x1000, /* tw, th-1, ch, slength */ - { 0x00, 0x03, 0x00, 0x02 }, /* sequ_regs */ - 0x66, /* miscreg */ - { 0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f, - 0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00, - 0x9c, 0x8e, 0x8f, 0x28, 0x0f, 0x96, 0xb9, 0xa3, - 0xff }, /* crtc_regs */ - { 0x00, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, - 0x10, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, - 0x0e, 0x00, 0x0f, 0x08 }, /* actl_regs */ - { 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0a, 0x0f, 0xff }, /* grdc_regs */ - }, - /* index=0x08 no mode defined */ - {}, - /* index=0x09 no mode defined */ - {}, - /* index=0x0a no mode defined */ - {}, - /* index=0x0b no mode defined */ - {}, - /* index=0x0c no mode defined */ - {}, - /* index=0x0d vga mode 0x0d */ - { 40, 24, 8, 0x2000, /* tw, th-1, ch, slength */ - { 0x09, 0x0f, 0x00, 0x06 }, /* sequ_regs */ - 0x63, /* miscreg */ - { 0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f, - 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xe3, - 0xff }, /* crtc_regs */ - { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, - 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, - 0x01, 0x00, 0x0f, 0x00 }, /* actl_regs */ - { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff }, /* grdc_regs */ - }, - /* index=0x0e vga mode 0x0e */ - { 80, 24, 8, 0x4000, /* tw, th-1, ch, slength */ - { 0x01, 0x0f, 0x00, 0x06 }, /* sequ_regs */ - 0x63, /* miscreg */ - { 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f, - 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x9c, 0x8e, 0x8f, 0x28, 0x00, 0x96, 0xb9, 0xe3, - 0xff }, /* crtc_regs */ - { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, - 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, - 0x01, 0x00, 0x0f, 0x00 }, /* actl_regs */ - { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff }, /* grdc_regs */ - }, - /* index=0x0f no mode defined */ - {}, - /* index=0x10 no mode defined */ - {}, - /* index=0x11 vga mode 0x0f */ - { 80, 24, 14, 0x8000, /* tw, th-1, ch, slength */ - { 0x01, 0x0f, 0x00, 0x06 }, /* sequ_regs */ - 0xa3, /* miscreg */ - { 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f, - 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x83, 0x85, 0x5d, 0x28, 0x0f, 0x63, 0xba, 0xe3, - 0xff }, /* crtc_regs */ - { 0x00, 0x08, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, - 0x00, 0x08, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, - 0x01, 0x00, 0x01, 0x00 }, /* actl_regs */ - { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff }, /* grdc_regs */ - }, - /* index=0x12 vga mode 0x10 */ - { 80, 24, 14, 0x8000, /* tw, th-1, ch, slength */ - { 0x01, 0x0f, 0x00, 0x06 }, /* sequ_regs */ - 0xa3, /* miscreg */ - { 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f, - 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x83, 0x85, 0x5d, 0x28, 0x0f, 0x63, 0xba, 0xe3, - 0xff }, /* crtc_regs */ - { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07, - 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, - 0x01, 0x00, 0x0f, 0x00 }, /* actl_regs */ - { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff }, /* grdc_regs */ - }, - /* index=0x13 no mode defined */ - {}, - /* index=0x14 no mode defined */ - {}, - /* index=0x15 no mode defined */ - {}, - /* index=0x16 no mode defined */ - {}, - /* index=0x17 vga mode 0x01 */ - { 40, 24, 16, 0x0800, /* tw, th-1, ch, slength */ - { 0x08, 0x03, 0x00, 0x02 }, /* sequ_regs */ - 0x67, /* miscreg */ - { 0x2d, 0x27, 0x28, 0x90, 0x2b, 0xa0, 0xbf, 0x1f, - 0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00, - 0x9c, 0x8e, 0x8f, 0x14, 0x1f, 0x96, 0xb9, 0xa3, - 0xff }, /* crtc_regs */ - { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07, - 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, - 0x0c, 0x00, 0x0f, 0x08 }, /* actl_regs */ - { 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x0f, 0xff }, /* grdc_regs */ - }, - /* index=0x18 vga mode 0x03 */ - { 80, 24, 16, 0x1000, /* tw, th-1, ch, slength */ - { 0x00, 0x03, 0x00, 0x02 }, /* sequ_regs */ - 0x67, /* miscreg */ - { 0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f, - 0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00, - 0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3, - 0xff }, /* crtc_regs */ - { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07, - 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, - 0x0c, 0x00, 0x0f, 0x08 }, /* actl_regs */ - { 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x0f, 0xff }, /* grdc_regs */ - }, - /* index=0x19 vga mode 0x07 */ - { 80, 24, 16, 0x1000, /* tw, th-1, ch, slength */ - { 0x00, 0x03, 0x00, 0x02 }, /* sequ_regs */ - 0x66, /* miscreg */ - { 0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f, - 0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00, - 0x9c, 0x8e, 0x8f, 0x28, 0x0f, 0x96, 0xb9, 0xa3, - 0xff }, /* crtc_regs */ - { 0x00, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, - 0x10, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, - 0x0e, 0x00, 0x0f, 0x08 }, /* actl_regs */ - { 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0a, 0x0f, 0xff }, /* grdc_regs */ - }, - /* index=0x1a vga mode 0x11 */ - { 80, 29, 16, 0x0000, /* tw, th-1, ch, slength */ - { 0x01, 0x0f, 0x00, 0x06 }, /* sequ_regs */ - 0xe3, /* miscreg */ - { 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e, - 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xea, 0x8c, 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xe3, - 0xff }, /* crtc_regs */ - { 0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f, - 0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f, - 0x01, 0x00, 0x0f, 0x00 }, /* actl_regs */ - { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff }, /* grdc_regs */ - }, - /* index=0x1b vga mode 0x12 */ - { 80, 29, 16, 0x0000, /* tw, th-1, ch, slength */ - { 0x01, 0x0f, 0x00, 0x06 }, /* sequ_regs */ - 0xe3, /* miscreg */ - { 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e, - 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xea, 0x8c, 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xe3, - 0xff }, /* crtc_regs */ - { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07, - 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, - 0x01, 0x00, 0x0f, 0x00 }, /* actl_regs */ - { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff }, /* grdc_regs */ - }, - /* index=0x1c vga mode 0x13 */ - { 40, 24, 8, 0x0000, /* tw, th-1, ch, slength */ - { 0x01, 0x0f, 0x00, 0x0e }, /* sequ_regs */ - 0x63, /* miscreg */ - { 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f, - 0x00, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x9c, 0x8e, 0x8f, 0x28, 0x40, 0x96, 0xb9, 0xa3, - 0xff }, /* crtc_regs */ - { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, - 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, - 0x41, 0x00, 0x0f, 0x00 }, /* actl_regs */ - { 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0f, 0xff }, /* grdc_regs */ - }, - /* index=0x1d vga mode 0x6a */ - { 100, 36, 16, 0x0000, /* tw, th-1, ch, slength */ - { 0x01, 0x0f, 0x00, 0x06 }, /* sequ_regs */ - 0xe3, /* miscreg */ - { 0x7f, 0x63, 0x63, 0x83, 0x6b, 0x1b, 0x72, 0xf0, - 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x59, 0x8d, 0x57, 0x32, 0x00, 0x57, 0x73, 0xe3, - 0xff }, /* crtc_regs */ - { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07, - 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, - 0x01, 0x00, 0x0f, 0x00 }, /* actl_regs */ - { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff }, /* grdc_regs */ - }, -}; +// standard BIOS Video Parameter Table +struct VideoParam_s { + u8 twidth; + u8 theightm1; + u8 cheight; + u16 slength; + u8 sequ_regs[4]; + u8 miscreg; + u8 crtc_regs[25]; + u8 actl_regs[20]; + u8 grdc_regs[9]; +} PACKED; + +struct VideoParam_s video_param_table[29] VAR16; + +void +build_video_param(void) +{ + static u8 parammodes[ARRAY_SIZE(video_param_table)] VAR16 = { + 0, 0, 0, 0, 0x04, 0x05, 0x06, 0x07, + 0, 0, 0, 0, 0, 0x0d, 0x0e, 0, + 0, 0x0f, 0x10, 0, 0, 0, 0, 0x01, + 0x03, 0x07, 0x11, 0x12, 0x13 + }; + + int i; + for (i=0; i<ARRAY_SIZE(parammodes); i++) { + u8 mode = GET_GLOBAL(parammodes[i]); + if (! mode) + continue; + struct VideoParam_s *vparam_g = &video_param_table[i]; + struct vgamode_s *vmode_g = find_vga_entry(mode); + if (!vmode_g) + continue; + SET_VGA(vparam_g->twidth, GET_GLOBAL(vmode_g->twidth)); + SET_VGA(vparam_g->theightm1, GET_GLOBAL(vmode_g->theight)-1); + SET_VGA(vparam_g->cheight, GET_GLOBAL(vmode_g->cheight)); + SET_VGA(vparam_g->slength, GET_GLOBAL(vmode_g->slength)); + memcpy_far(get_global_seg(), vparam_g->sequ_regs + , get_global_seg(), GET_GLOBAL(vmode_g->sequ_regs) + , ARRAY_SIZE(vparam_g->sequ_regs)); + SET_VGA(vparam_g->miscreg, GET_GLOBAL(vmode_g->miscreg)); + memcpy_far(get_global_seg(), vparam_g->crtc_regs + , get_global_seg(), GET_GLOBAL(vmode_g->crtc_regs) + , ARRAY_SIZE(vparam_g->crtc_regs)); + memcpy_far(get_global_seg(), vparam_g->actl_regs + , get_global_seg(), GET_GLOBAL(vmode_g->actl_regs) + , ARRAY_SIZE(vparam_g->actl_regs)); + memcpy_far(get_global_seg(), vparam_g->grdc_regs + , get_global_seg(), GET_GLOBAL(vmode_g->grdc_regs) + , ARRAY_SIZE(vparam_g->grdc_regs)); + } + + SET_VGA(video_save_pointer_table.videoparam + , SEGOFF(get_global_seg(), (u32)video_param_table)); +}
/**************************************************************** diff --git a/vgasrc/vgatables.h b/vgasrc/vgatables.h index f31595e..5a90174 100644 --- a/vgasrc/vgatables.h +++ b/vgasrc/vgatables.h @@ -70,29 +70,6 @@ #define SCREEN_IO_START(x,y,p) (((((x)*(y)) | 0x00ff) + 1) * (p)) #define SCREEN_MEM_START(x,y,p) SCREEN_IO_START(((x)*2),(y),(p))
-// Standard Video Save Pointer Table -struct VideoSavePointer_s { - struct segoff_s videoparam; - struct segoff_s paramdynamicsave; - struct segoff_s textcharset; - struct segoff_s graphcharset; - struct segoff_s secsavepointer; - u8 reserved[8]; -} PACKED; - -/* standard BIOS Video Parameter Table */ -struct VideoParam_s { - u8 twidth; - u8 theightm1; - u8 cheight; - u16 slength; - u8 sequ_regs[4]; - u8 miscreg; - u8 crtc_regs[25]; - u8 actl_regs[20]; - u8 grdc_regs[9]; -} PACKED; - struct vgamode_s { u8 svgamode; u8 memmodel; /* CTEXT,MTEXT,CGA,PL1,PL2,PL4,P8,P15,P16,P24,P32 */ @@ -157,8 +134,8 @@ struct saveDACcolors {
// vgatables.c struct vgamode_s *find_vga_entry(u8 mode); +void build_video_param(void); extern struct VideoSavePointer_s video_save_pointer_table; -extern struct VideoParam_s video_param_table[]; extern u8 static_functionality[];
// vgafonts.c @@ -169,6 +146,7 @@ extern u8 vgafont14alt[]; extern u8 vgafont16alt[];
// vga.c +#define SET_VGA(var, val) SET_FARVAR(get_global_seg(), (var), (val)) struct carattr { u8 car, attr, use_attr; };
It appears some emulators look for a signature at offset 0x1e of the option rom. So, port the signature from the LGPL bios.
Signed-off-by: Kevin O'Connor kevin@koconnor.net --- vgasrc/vgaentry.S | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/vgasrc/vgaentry.S b/vgasrc/vgaentry.S index 2dc07c1..112857b 100644 --- a/vgasrc/vgaentry.S +++ b/vgasrc/vgaentry.S @@ -40,6 +40,10 @@ _rom_header_pcidata: #endif _rom_header_pnpdata: .word 0 +_rom_header_other2: + .word 0 +_rom_header_signature: + .asciz "IBM"
/****************************************************************
-
Kevin O'Connor