Add support to check for overlaps with e820 entries. In case the 64bit pci io window has conflicts move it down.
The only known case where this happens is AMD processors with 1TB address space which has some space just below 1TB reserved for HT.
Signed-off-by: Gerd Hoffmann kraxel@redhat.com --- src/e820map.h | 1 + src/e820map.c | 15 +++++++++++++++ src/fw/pciinit.c | 2 ++ 3 files changed, 18 insertions(+)
diff --git a/src/e820map.h b/src/e820map.h index de8b523003c5..07ce16ec213f 100644 --- a/src/e820map.h +++ b/src/e820map.h @@ -18,6 +18,7 @@ struct e820entry { void e820_add(u64 start, u64 size, u32 type); void e820_remove(u64 start, u64 size); void e820_prepboot(void); +int e820_is_used(u64 start, u64 size);
// e820 map storage extern struct e820entry e820_list[]; diff --git a/src/e820map.c b/src/e820map.c index 39445cf6399d..c761e5e98a75 100644 --- a/src/e820map.c +++ b/src/e820map.c @@ -150,3 +150,18 @@ e820_prepboot(void) { dump_map(); } + +int +e820_is_used(u64 start, u64 size) +{ + int i; + for (i=0; i<e820_count; i++) { + struct e820entry *e = &e820_list[i]; + if (start + size <= e->start) + continue; + if (start >= e->start + e->size) + continue; + return 1; + } + return 0; +} diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c index b52bd1d5054b..c7084f5e397e 100644 --- a/src/fw/pciinit.c +++ b/src/fw/pciinit.c @@ -1140,6 +1140,8 @@ static void pci_bios_map_devices(struct pci_bus *busses) if (r64_mem.base < top - size) { r64_mem.base = top - size; } + if (e820_is_used(r64_mem.base, size)) + r64_mem.base -= size; } r64_mem.base = ALIGN(r64_mem.base, align_mem); r64_mem.base = ALIGN(r64_mem.base, (1LL<<30)); // 1G hugepage