SeaBIOS

seabios@seabios.org

2 participants
3799 discussions

Re: [SeaBIOS] [PATCH 1/2] Don't pass return address to transition(32, 16, 16big) on stack.
by H. Peter Anvin 08 Dec '10

08 Dec '10

First of all, sorry for the very late reply, however, I thought I really ought to offer my perspective on this: On 11/25/2010 06:24 AM, Kevin O'Connor wrote: > It's difficult to have a uniform view of the stack when transition > modes, so pass the return address in a register. As a result, the > transition functions only access memory via the %cs selector now. I think this assertion is rather unfortunate, because my own experience with thunking is that it is actually a very useful thing to have access to the real-mode stack. This is simply accomplished by computing a 32-bit register containing the value (ss << 4) + sp, for example: movzwl %sp, %eax movl %ss, %ecx shrl $4, %ecx addl %ecx, %eax This is particularly handy if there is a push/pop of the 16-bit register set in the entry/exit sequence. Furthermore, pushing the target address onto the stack rather than stuffing it into a register allows a 32-bit routine to have full access to the 16-bit register image, whereas burning a register means that that register is going to have to be handled differently. In Syslinux I have this formalized so that the sequence: pushl $func32 callw _pm_call ... turns into the C function call: void func32(com32sys_t *regs) ... where com32sys_t is a structure which contains the 16-bit register image: typedef struct { uint16_t gs; /* Offset 0 */ uint16_t fs; /* Offset 2 */ uint16_t es; /* Offset 4 */ uint16_t ds; /* Offset 6 */ reg32_t edi; /* Offset 8 */ reg32_t esi; /* Offset 12 */ reg32_t ebp; /* Offset 16 */ reg32_t _unused_esp; /* Offset 20 */ reg32_t ebx; /* Offset 24 */ reg32_t edx; /* Offset 28 */ reg32_t ecx; /* Offset 32 */ reg32_t eax; /* Offset 36 */ reg32_t eflags; /* Offset 40 */ } com32sys_t; This is simply the image created on the stack by the sequence (in NASM syntax): _pm_call: pushfd pushad push ds push es push fs push gs This has been shown to be amazingly versatile, especially since the 16-bit register image can be not just observed but written directly. One can implement this either with or without a stack switch (to do so without a stack switch, the protected-mode ESP is computed from SS:SP). However, since real-mode stacks tend to be very small -- often only a few hundred bytes -- it is probably a bad idea. In Syslinux this is actually implemeted in form of a lower-level function which does indeed take an address in a register, so the two approaches are not mutually exclusive. The actual full implementation of the _pm_call routine looks like (note: this code assumes CS = 0). ; ; _pm_call: call PM routine in low memory from RM ; ; on stack = PM routine to call (a 32-bit address) ; ; ECX, ESI, EDI passed to the called function; ; EAX = EBP in the called function points to the stack frame ; which includes all registers (which can be changed if desired.) ; ; All registers and the flags saved/restored ; ; This routine is invoked by the pm_call macro. ; _pm_call: pushfd pushad push ds push es push fs push gs mov bp,sp mov ax,cs mov ebx,.pm mov ds,ax jmp enter_pm bits 32 section .textnr .pm: ; EAX points to the top of the RM stack, which is EFLAGS test RM_FLAGSH,02h ; RM EFLAGS.IF jz .no_sti sti .no_sti: call [ebp+4*2+9*4+2] ; Entrypoint on RM stack mov bx,.rm jmp enter_rm bits 16 section .text16 .rm: pop gs pop fs pop es pop ds popad popfd ret 4 ; Drop entrypoint The entire file including the enter_pm/enter_rm functions can be seen at: http://tinyurl.com/2cjvt4a -hpa

2 3

[PATCH] create separate IPL entry for each CD/DVD
by Gleb Natapov 07 Dec '10

07 Dec '10

Current code creates only one IPL entry of type IPL_TYPE_CDROM even if there are more then one CDROM drive present. If CDROM that the entry refers to is not bootable there is no way to retry boot from another CDROM. Fix this by creating IPL entry for each CDROM drive found. First CDROM will always be placed in IPL entry 3 for backwards compatibility. Signed-off-by: Gleb Natapov <gleb(a)redhat.com> diff --git a/src/ata.c b/src/ata.c index 7079bf2..bdec225 100644 --- a/src/ata.c +++ b/src/ata.c @@ -779,8 +779,10 @@ init_drive_atapi(struct atadrive_s *dummy, u16 *buffer) dprintf(1, "%s\n", adrive_g->drive.desc); // fill cdidmap - if (iscd) + if (iscd) { map_cd_drive(&adrive_g->drive); + add_baid_cdrom(&adrive_g->drive); + } return adrive_g; } diff --git a/src/block.c b/src/block.c index 818c9f9..cab503c 100644 --- a/src/block.c +++ b/src/block.c @@ -27,6 +27,16 @@ getDrive(u8 exttype, u8 extdriveoffset) return GLOBALFLAT2GLOBAL(drive_gf); } +int getDriveId(u8 exttype, struct drive_s *drive_g) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(Drives.idmap[0]); i++) + if (getDrive(exttype, i) == drive_g) + return i; + + return -1; +} /**************************************************************** * Disk geometry translation diff --git a/src/boot.c b/src/boot.c index 021b8ac..5e3919f 100644 --- a/src/boot.c +++ b/src/boot.c @@ -87,6 +87,25 @@ add_bev(u16 seg, u16 bev, u16 desc) ie->description = d; } +// Add a IPL entry for BAID cdrom. +void +add_baid_cdrom(struct drive_s *drive_g) +{ + if (! CONFIG_CDROM_BOOT) + return; + + /* put first cdrom into ipl 3 for compatability with qemu */ + struct ipl_entry_s *ie = &IPL.bev[2]; + if (IPL.bevcount >= ARRAY_SIZE(IPL.bev) && ie->vector) + return; + + if (ie->vector) + ie = &IPL.bev[IPL.bevcount++]; + ie->type = IPL_TYPE_CDROM; + ie->vector = (u32)drive_g; + ie->description = "DVD/CD"; +} + // Add a bcv entry for an expansion card harddrive or legacy option rom void add_bcv(u16 seg, u16 ip, u16 desc) @@ -188,12 +207,11 @@ menu_show_harddisk(struct ipl_entry_s *ie, int menupos) static int menu_show_cdrom(struct ipl_entry_s *ie, int menupos) { - int i; - for (i = 0; i < Drives.cdcount; i++) { - struct drive_s *drive_g = getDrive(EXTTYPE_CD, i); - printf("%d. DVD/CD [%s]\n", menupos + i, drive_g->desc); - } - return Drives.cdcount; + struct drive_s *drive_g = (void*)ie->vector; + if (!ie->vector) + return 0; + printf("%d. DVD/CD [%s]\n", menupos, drive_g->desc); + return 1; } // Show coreboot-fs menu item. @@ -399,9 +417,14 @@ boot_cdrom(struct ipl_entry_s *ie) { if (! CONFIG_CDROM_BOOT) return; - int status = cdrom_boot(ie->subchoice); + + if (!ie->vector) + return; + + struct drive_s *drive_g = GLOBALFLAT2GLOBAL((void*)ie->vector); + int status = cdrom_boot(drive_g); if (status) { - printf("Boot failed: Could not read from CDROM (code %04x)\n", status); + printf("Boot failed: Could not read from CDROM %s (code %04x)\n", drive_g->desc, status); return; } diff --git a/src/boot.h b/src/boot.h index db046e3..f751d71 100644 --- a/src/boot.h +++ b/src/boot.h @@ -43,6 +43,8 @@ void add_bev(u16 seg, u16 bev, u16 desc); void add_bcv(u16 seg, u16 ip, u16 desc); struct drive_s; void add_bcv_internal(struct drive_s *drive_g); +void add_baid_cdrom(struct drive_s *drive_g); + void boot_prep(void); #endif // __BOOT_H diff --git a/src/cdrom.c b/src/cdrom.c index 349e401..31ceaaa 100644 --- a/src/cdrom.c +++ b/src/cdrom.c @@ -241,12 +241,13 @@ atapi_is_ready(struct disk_op_s *op) } int -cdrom_boot(int cdid) +cdrom_boot(struct drive_s *drive_g) { struct disk_op_s dop; + int cdid = getDriveId(EXTTYPE_CD, drive_g); memset(&dop, 0, sizeof(dop)); - dop.drive_g = getDrive(EXTTYPE_CD, cdid); - if (!dop.drive_g) + dop.drive_g = drive_g; + if (!dop.drive_g || cdid < 0) return 1; int ret = atapi_is_ready(&dop); diff --git a/src/disk.h b/src/disk.h index c1ba6ae..a598bb4 100644 --- a/src/disk.h +++ b/src/disk.h @@ -229,6 +229,7 @@ struct drives_s { // block.c extern struct drives_s Drives; struct drive_s *getDrive(u8 exttype, u8 extdriveoffset); +int getDriveId(u8 exttype, struct drive_s *drive_g); void setup_translation(struct drive_s *drive_g); void map_floppy_drive(struct drive_s *drive_g); void map_hd_drive(struct drive_s *drive_g); @@ -249,7 +250,7 @@ extern struct drive_s *cdemu_drive_gf; int process_cdemu_op(struct disk_op_s *op); void cdemu_setup(void); void cdemu_134b(struct bregs *regs); -int cdrom_boot(int cdid); +int cdrom_boot(struct drive_s *drive_g); // ramdisk.c void ramdisk_setup(void); -- Gleb.

2 2

Re: [SeaBIOS] [Qemu-devel] [Patch] Small fix for qemu APIC for Mac OS X support
by Isaku Yamahata 05 Dec '10

05 Dec '10

On Thu, Nov 25, 2010 at 08:18:45PM +0000, adq wrote: > On 25 November 2010 11:28, Isaku Yamahata <yamahata(a)valinux.co.jp> wrote: > > On Wed, Nov 24, 2010 at 02:08:16PM +0000, adq wrote: > >> > Interesting. I was also thinking that maybe we can leverage overriding mechanisms that are already available. Maybe it's possible to squeeze the HPET node into an SSDT. Maybe we need to override the whole DSDT from the command line. > >> > >> We'll definitely need to override the DSDT for the applesmc device. I > >> was thinking something along the lines of an additional DSDT binary > >> supplied with QEMU for use when emulating apple hardware as you > >> suggest. > > > > The patches for qemu and seabios have been floating around. > > I wrote them for Q35 chipset support, but no one has gotten interested in it. > > But now, you are there. I'm willing to rebase/resend them. > > I'd definitely be interested to see those! Here is seabios part. >From 7a6e97b74bc0d25aca42a43cabcc68836edaf6c0 Mon Sep 17 00:00:00 2001 Message-Id: <7a6e97b74bc0d25aca42a43cabcc68836edaf6c0.1290774988.git.yamahata(a)valinux.co.jp> In-Reply-To: <cover.1290774988.git.yamahata(a)valinux.co.jp> References: <cover.1290774988.git.yamahata(a)valinux.co.jp> From: Isaku Yamahata <yamahata(a)valinux.co.jp> Date: Tue, 15 Jun 2010 12:41:13 +0900 Subject: [PATCH 1/1] seabios: acpi: allow qemu to load dsdt as external acpi table. allow qemu to load dsdt as external acpi table. Signed-off-by: Isaku Yamahata <yamahata(a)valinux.co.jp> --- changes v1 -> v2. - load qemu table first and they try default dsdt table if qemu doesn't supply dsdt. Thus unnecessary malloc_high()/free() is avoided. --- src/acpi.c | 44 ++++++++++++++++++++++++++++++++++++-------- 1 files changed, 36 insertions(+), 8 deletions(-) diff --git a/src/acpi.c b/src/acpi.c index 18830dc..f4e0780 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -54,6 +54,11 @@ struct facs_descriptor_rev1 /* + * Differentiated System Descrition Table (DSDT) + */ +#define DSDT_SIGNATURE 0x54445344 // DSDT + +/* * MADT values and structures */ @@ -221,14 +226,20 @@ static const struct pci_device_id fadt_init_tbl[] = { PCI_DEVICE_END }; +static void fill_dsdt(struct fadt_descriptor_rev1 *fadt, void *dsdt) +{ + fadt->dsdt = cpu_to_le32((u32)dsdt); + fadt->checksum -= checksum(fadt, sizeof(*fadt)); + dprintf(1, "ACPI DSDT=%p\n", dsdt); +} + static void* build_fadt(int bdf) { struct fadt_descriptor_rev1 *fadt = malloc_high(sizeof(*fadt)); struct facs_descriptor_rev1 *facs = memalign_high(64, sizeof(*facs)); - void *dsdt = malloc_high(sizeof(AmlCode)); - if (!fadt || !facs || !dsdt) { + if (!fadt || !facs) { warn_noalloc(); return NULL; } @@ -238,13 +249,11 @@ build_fadt(int bdf) facs->signature = FACS_SIGNATURE; facs->length = cpu_to_le32(sizeof(*facs)); - /* DSDT */ - memcpy(dsdt, AmlCode, sizeof(AmlCode)); - /* FADT */ memset(fadt, 0, sizeof(*fadt)); fadt->firmware_ctrl = cpu_to_le32((u32)facs); - fadt->dsdt = cpu_to_le32((u32)dsdt); + fadt->dsdt = 0; /* dsdt will be filled later in acpi_bios_init() + by fill_dsdt() */ fadt->model = 1; fadt->reserved1 = 0; int pm_sci_int = pci_config_readb(bdf, PCI_INTERRUPT_LINE); @@ -620,7 +629,8 @@ acpi_bios_init(void) } while(0) // Add tables - ACPI_INIT_TABLE(build_fadt(bdf)); + struct fadt_descriptor_rev1 *fadt = build_fadt(bdf); + ACPI_INIT_TABLE(fadt); ACPI_INIT_TABLE(build_ssdt()); ACPI_INIT_TABLE(build_madt()); ACPI_INIT_TABLE(build_hpet()); @@ -635,12 +645,30 @@ acpi_bios_init(void) warn_noalloc(); continue; } - ACPI_INIT_TABLE(qemu_cfg_next_acpi_table_load(addr, len)); + struct acpi_table_header *header = + qemu_cfg_next_acpi_table_load(addr, len); + if (header->signature == DSDT_SIGNATURE) { + if (fadt) { + fill_dsdt(fadt, addr); + } + } else { + ACPI_INIT_TABLE(header); + } if (tbl_idx == MAX_ACPI_TABLES) { warn_noalloc(); break; } } + if (fadt && !fadt->dsdt) { + /* default DSDT */ + void *dsdt = malloc_high(sizeof(AmlCode)); + if (!dsdt) { + warn_noalloc(); + return; + } + memcpy(dsdt, AmlCode, sizeof(AmlCode)); + fill_dsdt(fadt, dsdt); + } struct rsdt_descriptor_rev1 *rsdt; size_t rsdt_len = sizeof(*rsdt) + sizeof(u32) * tbl_idx; -- 1.7.1.1 -- yamahata

3 2

[PATCH] Check if capability enabled in XXX_cmd_data functions.
by Kevin O'Connor 05 Dec '10

05 Dec '10

Make sure to check if CONFIG_AHCI, CONFIG_ATA, CONFIG_USB_MSC is enabled in their respective cmd_data functions. This reduces the compile size when they are not enabled. --- src/ahci.c | 3 +++ src/ata.c | 3 +++ src/usb-msc.c | 3 +++ 3 files changed, 9 insertions(+), 0 deletions(-) diff --git a/src/ahci.c b/src/ahci.c index ee404d4..6c3127a 100644 --- a/src/ahci.c +++ b/src/ahci.c @@ -155,6 +155,9 @@ static int ahci_command(struct ahci_port_s *port, int iswrite, int isatapi, int ahci_cmd_data(struct disk_op_s *op, void *cdbcmd, u16 blocksize) { + if (! CONFIG_AHCI) + return 0; + struct ahci_port_s *port = container_of( op->drive_g, struct ahci_port_s, drive); struct ahci_cmd_s *cmd = GET_GLOBAL(port->cmd); diff --git a/src/ata.c b/src/ata.c index 7079bf2..e533108 100644 --- a/src/ata.c +++ b/src/ata.c @@ -602,6 +602,9 @@ process_ata_op(struct disk_op_s *op) int atapi_cmd_data(struct disk_op_s *op, void *cdbcmd, u16 blocksize) { + if (! CONFIG_ATA) + return 0; + struct atadrive_s *adrive_g = container_of( op->drive_g, struct atadrive_s, drive); struct ata_channel_s *chan_gf = GET_GLOBAL(adrive_g->chan_gf); diff --git a/src/usb-msc.c b/src/usb-msc.c index 968cae3..080efdc 100644 --- a/src/usb-msc.c +++ b/src/usb-msc.c @@ -50,6 +50,9 @@ struct csw_s { int usb_cmd_data(struct disk_op_s *op, void *cdbcmd, u16 blocksize) { + if (!CONFIG_USB_MSC) + return 0; + dprintf(16, "usb_cmd_data id=%p write=%d count=%d bs=%d buf=%p\n" , op->drive_g, 0, op->count, blocksize, op->buf_fl); struct usbdrive_s *udrive_g = container_of( -- 1.7.3.2

1 0

[PATCH] Require a "_cfuncXX_" symbol prefix for inter-mode c function references.
by Kevin O'Connor 05 Dec '10

05 Dec '10

The compiler can get confused when referencing a C function in a different mode. (It reasonably assumes that the C function in the current mode is desired.) To avoid this compiler confusion, introduce symbol prefixes (_cfunc16_, _cfunc32flat_, _cfunc32seg_) that must be used on C function symbols that are referenced from other compilation modes. This makes it less likely compiler confusion will occur. It will also makes it easier to implement and use vtable like operation structures. --- src/pci.c | 12 ++++-------- src/resume.c | 2 +- src/romlayout.S | 12 ++++++------ src/stacks.c | 6 ++---- src/types.h | 12 ++++++------ tools/layoutrom.py | 39 ++++++++++++++++++++++++++++----------- 6 files changed, 47 insertions(+), 36 deletions(-) diff --git a/src/pci.c b/src/pci.c index e43c83a..5237f19 100644 --- a/src/pci.c +++ b/src/pci.c @@ -229,21 +229,19 @@ pci_reboot(void) // helper functions to access pci mmio bars from real mode -extern u32 pci_readl_32(u32 addr); -#if MODESEGMENT == 0 u32 VISIBLE32FLAT pci_readl_32(u32 addr) { dprintf(3, "32: pci read : %x\n", addr); return readl((void*)addr); } -#endif u32 pci_readl(u32 addr) { if (MODESEGMENT) { dprintf(3, "16: pci read : %x\n", addr); - return call32(pci_readl_32, addr, -1); + extern void _cfunc32flat_pci_readl_32(u32 addr); + return call32(_cfunc32flat_pci_readl_32, addr, -1); } else { return pci_readl_32(addr); } @@ -254,15 +252,12 @@ struct reg32 { u32 data; }; -extern void pci_writel_32(struct reg32 *reg32); -#if MODESEGMENT == 0 void VISIBLE32FLAT pci_writel_32(struct reg32 *reg32) { dprintf(3, "32: pci write: %x, %x (%p)\n", reg32->addr, reg32->data, reg32); writel((void*)(reg32->addr), reg32->data); } -#endif void pci_writel(u32 addr, u32 val) { @@ -271,7 +266,8 @@ void pci_writel(u32 addr, u32 val) dprintf(3, "16: pci write: %x, %x (%x:%p)\n", reg32.addr, reg32.data, GET_SEG(SS), &reg32); void *flatptr = MAKE_FLATPTR(GET_SEG(SS), &reg32); - call32(pci_writel_32, (u32)flatptr, -1); + extern void _cfunc32flat_pci_writel_32(struct reg32 *reg32); + call32(_cfunc32flat_pci_writel_32, (u32)flatptr, -1); } else { pci_writel_32(&reg32); } diff --git a/src/resume.c b/src/resume.c index 2a743c9..20e2e3d 100644 --- a/src/resume.c +++ b/src/resume.c @@ -40,7 +40,7 @@ handle_resume(u8 status) asm volatile( "movw %w1, %%ss\n" "movl %0, %%esp\n" - "movl $s3_resume, %%edx\n" + "movl $_cfunc32flat_s3_resume, %%edx\n" "jmp transition32\n" : : "i"(BUILD_S3RESUME_STACK_ADDR), "r"(0) ); diff --git a/src/romlayout.S b/src/romlayout.S index d83f337..7a14a7f 100644 --- a/src/romlayout.S +++ b/src/romlayout.S @@ -252,7 +252,7 @@ entry_post: jnz 1f // Normal entry point - ENTRY_INTO32 _start + ENTRY_INTO32 _cfunc32flat__start // Entry point when a post call looks like a resume. 1: @@ -367,7 +367,7 @@ apm32protected_entry: pushl %cs // Move second descriptor after %cs to %gs addl $16, (%esp) popl %gs - ENTRY_ARG_ESP handle_apm32 + ENTRY_ARG_ESP _cfunc32seg_handle_apm32 popl %gs popfl lretl @@ -379,7 +379,7 @@ pcibios32_entry: pushl %gs // Backup %gs and set %gs=%ds pushl %ds popl %gs - ENTRY_ARG_ESP handle_pcibios32 + ENTRY_ARG_ESP _cfunc32seg_handle_pcibios32 popl %gs popfl lretl @@ -418,7 +418,7 @@ post32: movw %ax, %gs movw %ax, %ss movl $BUILD_STACK_ADDR, %esp - ljmpl $SEG32_MODE32_CS, $_start + ljmpl $SEG32_MODE32_CS, $_cfunc32flat__start .code16gcc @@ -476,11 +476,11 @@ irqentryarg: // int 18/19 are special - they reset stack and call into 32bit mode. DECLFUNC entry_19 entry_19: - ENTRY_INTO32 handle_19 + ENTRY_INTO32 _cfunc32flat_handle_19 DECLFUNC entry_18 entry_18: - ENTRY_INTO32 handle_18 + ENTRY_INTO32 _cfunc32flat_handle_18 /**************************************************************** diff --git a/src/stacks.c b/src/stacks.c index c77ba1f..53bf669 100644 --- a/src/stacks.c +++ b/src/stacks.c @@ -373,8 +373,6 @@ wait_preempt(void) return 1; } -extern void yield_preempt(void); -#if MODESEGMENT == 0 // Try to execute 32bit threads. void VISIBLE32INIT yield_preempt(void) @@ -382,7 +380,6 @@ yield_preempt(void) PreemptCount++; switch_next(&MainThread); } -#endif // 16bit code that checks if threads are pending and executes them if so. void @@ -393,5 +390,6 @@ check_preempt(void) || GET_FLATPTR(MainThread.next) == &MainThread) return; - call32(yield_preempt, 0, 0); + extern void _cfunc32flat_yield_preempt(void); + call32(_cfunc32flat_yield_preempt, 0, 0); } diff --git a/src/types.h b/src/types.h index 7d610ec..c0c6d26 100644 --- a/src/types.h +++ b/src/types.h @@ -44,11 +44,11 @@ extern void __force_link_error__only_in_16bit(void) __noreturn; // Notes a function as externally visible in the 16bit code chunk. # define VISIBLE16 __VISIBLE // Notes a function as externally visible in the 32bit flat code chunk. -# define VISIBLE32FLAT __section(".discard.func32flat." UNIQSEC) noinline __weak +# define VISIBLE32FLAT __section(".discard.func32flat." UNIQSEC) noinline // Notes a 32bit flat function that will only be called during init. # define VISIBLE32INIT VISIBLE32FLAT // Notes a function as externally visible in the 32bit segmented code chunk. -# define VISIBLE32SEG __section(".discard.func32seg." UNIQSEC) noinline __weak +# define VISIBLE32SEG __section(".discard.func32seg." UNIQSEC) noinline // Designate a variable as (only) visible to 16bit code. # define VAR16 __section(".data16." UNIQSEC) // Designate a variable as visible to 16bit, 32bit, and assembler code. @@ -70,8 +70,8 @@ extern void __force_link_error__only_in_16bit(void) __noreturn; # define ASSERT32SEG() __force_link_error__only_in_32bit_segmented() # define ASSERT32FLAT() __force_link_error__only_in_32bit_flat() #elif MODESEGMENT == 1 -# define VISIBLE16 __section(".discard.func16." UNIQSEC) noinline __weak -# define VISIBLE32FLAT __section(".discard.func32flat." UNIQSEC) noinline __weak +# define VISIBLE16 __section(".discard.func16." UNIQSEC) noinline +# define VISIBLE32FLAT __section(".discard.func32flat." UNIQSEC) noinline # define VISIBLE32INIT VISIBLE32FLAT # define VISIBLE32SEG __VISIBLE # define VAR16 __section(".discard.var16." UNIQSEC) @@ -86,10 +86,10 @@ extern void __force_link_error__only_in_16bit(void) __noreturn; # define ASSERT32SEG() do { } while (0) # define ASSERT32FLAT() __force_link_error__only_in_32bit_flat() #else -# define VISIBLE16 __section(".discard.func16." UNIQSEC) noinline __weak +# define VISIBLE16 __section(".discard.func16." UNIQSEC) noinline # define VISIBLE32FLAT __section(".text.runtime." UNIQSEC) __VISIBLE # define VISIBLE32INIT __section(".text.init." UNIQSEC) __VISIBLE -# define VISIBLE32SEG __section(".discard.func32seg." UNIQSEC) noinline __weak +# define VISIBLE32SEG __section(".discard.func32seg." UNIQSEC) noinline # define VAR16 __section(".discard.var16." UNIQSEC) # define VAR16VISIBLE VAR16 __VISIBLE __weak # define VAR16EXPORT VAR16VISIBLE diff --git a/tools/layoutrom.py b/tools/layoutrom.py index 7eca502..4109b16 100755 --- a/tools/layoutrom.py +++ b/tools/layoutrom.py @@ -209,15 +209,16 @@ def outXRefs(sections): for reloc in section.relocs: symbol = reloc.symbol if (symbol.section is None - or symbol.section.fileid == section.fileid - or symbol.name in xrefs): + or (symbol.section.fileid == section.fileid + and symbol.name == reloc.symbolname) + or reloc.symbolname in xrefs): continue - xrefs[symbol.name] = 1 + xrefs[reloc.symbolname] = 1 addr = symbol.section.finalloc + symbol.offset if (section.fileid == '32flat' and symbol.section.fileid in ('16', '32seg')): addr += BUILD_BIOS_ADDR - out += "%s = 0x%x ;\n" % (symbol.name, addr) + out += "%s = 0x%x ;\n" % (reloc.symbolname, addr) return out # Write LD script includes for the given sections using relative offsets @@ -396,13 +397,29 @@ def findInit(sections): # Section garbage collection ###################################################################### +CFUNCPREFIX = [('_cfunc16_', 0), ('_cfunc32seg_', 1), ('_cfunc32flat_', 2)] + # Find and keep the section associated with a symbol (if available). -def keepsymbol(reloc, infos, pos): - symbolname = reloc.symbol.name +def keepsymbol(reloc, infos, pos, isxref): + symbolname = reloc.symbolname + mustbecfunc = 0 + for symprefix, needpos in CFUNCPREFIX: + if symbolname.startswith(symprefix): + if needpos != pos: + return -1 + symbolname = symbolname[len(symprefix):] + mustbecfunc = 1 + break symbol = infos[pos][1].get(symbolname) if (symbol is None or symbol.section is None or symbol.section.name.startswith('.discard.')): return -1 + isdestcfunc = (symbol.section.name.startswith('.text.') + and not symbol.section.name.startswith('.text.asm.')) + if ((mustbecfunc and not isdestcfunc) + or (not mustbecfunc and isdestcfunc and isxref)): + return -1 + reloc.symbol = symbol keepsection(symbol.section, infos, pos) return 0 @@ -416,14 +433,14 @@ def keepsection(section, infos, pos=0): section.keep = 1 # Keep all sections that this section points to for reloc in section.relocs: - ret = keepsymbol(reloc, infos, pos) + ret = keepsymbol(reloc, infos, pos, 0) if not ret: continue # Not in primary sections - it may be a cross 16/32 reference - ret = keepsymbol(reloc, infos, (pos+1)%3) + ret = keepsymbol(reloc, infos, (pos+1)%3, 1) if not ret: continue - ret = keepsymbol(reloc, infos, (pos+2)%3) + ret = keepsymbol(reloc, infos, (pos+2)%3, 1) if not ret: continue @@ -449,7 +466,7 @@ class Section: name = size = alignment = fileid = relocs = None finalloc = category = keep = None class Reloc: - offset = type = symbol = None + offset = type = symbolname = symbol = None class Symbol: name = offset = section = None @@ -514,6 +531,7 @@ def parseObjDump(file, fileid): reloc = Reloc() reloc.offset = int(off, 16) reloc.type = type + reloc.symbolname = symbolname reloc.symbol = symbols[symbolname] relocsection.relocs.append(reloc) except ValueError: @@ -541,7 +559,6 @@ def main(): findInit(sections) # Determine the final memory locations of each kept section. - # locsX = [(addr, sectioninfo), ...] doLayout(sections) # Write out linker script files. -- 1.7.3.2

1 0

[PATCH v2 0/4] ahci support
by Gerd Hoffmann 05 Dec '10

05 Dec '10

Hi, Second version of the ahci patches. Rebased to latest master, updated according to Kevins review comments. The patches are also available in the git repository at: git://anongit.freedesktop.org/~kraxel/seabios ahci.3 Gerd Hoffmann (4): pci: add helper functions for mmio bar access from real mode. util: add memset_fl() ata: make helpers available add ahci support Makefile | 2 +- src/ahci.c | 480 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ src/ahci.h | 196 +++++++++++++++++++++++ src/ata.c | 20 ++- src/ata.h | 2 + src/block.c | 3 + src/blockcmd.c | 3 + src/config.h | 2 + src/disk.h | 1 + src/pci.c | 51 ++++++ src/pci.h | 4 + src/post.c | 2 + src/util.c | 9 + src/util.h | 1 + 14 files changed, 766 insertions(+), 10 deletions(-) create mode 100644 src/ahci.c create mode 100644 src/ahci.h

2 5

Re: [SeaBIOS] [PATCHv6 00/16] boot order specification
by Kevin O'Connor 03 Dec '10

03 Dec '10

Trimming CC list, adding seabios list. On Sat, Nov 27, 2010 at 09:04:24PM +0200, Gleb Natapov wrote: > On Sat, Nov 27, 2010 at 01:40:12PM -0500, Kevin O'Connor wrote: > > On Sat, Nov 27, 2010 at 08:15:42PM +0200, Gleb Natapov wrote: > > > Qemu does not know that Seabios needs optionrom to boot from a device. > > > It knows even less about bcvs in option rom. Qemu knows about device > > > itself, not how firmware boots from it. > > > > If the user wants to boot from a device and that device has an > > optionrom, then it's a safe bet that the optionrom is needed to boot > > from it. > > > Suppose we add SCSI support to Seabios and suppose SCSI card Seabios can > natively boot from has optionrom. What Seabios will do in such situation > and how qemu can know it? Besides qemu support tries to be firmware > agnostic. In such a situation, under my proposal, users wouldn't be able to specify a default boot from their scsi drive until after qemu was also upgraded to know seabios could boot native scsi. (Or, they'd only be able to do it by adding in a command-line option.) > > In any case, I'd rather have qemu know which devices seabios can boot > > then have seabios try to figure out what rom to run from a device > > path. > You run all of them just like you do now. Information you get from qemu is > only used for sorting BCV/BEV entries. BCV/BEV that does not have > corespondent boot path in boot order list is put at the end. If qemu sends in "/pci@i0cf8/scsi@3/disk@0,0" or "/pci@i0cf8/ethernet@4/ethernet-phy@0" it will expect seabios to boot from the appropriate device. In both cases, seabios would need to run a rom in order to fulfill that request. Trying to figure out which rom is quite painful. That's why I'd prefer to see qemu instead pass in something like "/pci@i0cf8/rom@3/bcv@0" or "/pci@i0cf8/rom@4/bev". That is, if the machine needs to boot via a rom I'd prefer qemu state that explicitly. BTW, in the situation where seabios has native device support (eg, ATA), I don't have any concerns. (The names are a bit verbose, but that's not really an issue.) > > > BTW are you actually aware of any option rom with multiple BCVs and, if > > > yes, how those BCVs differ? > > > > Multiple BCVs - yes. A SCSI card will define a BCV for each attached > > drive. I don't have a scsi card myself, but the support was added by > > a user who ran into the problem first hand. > Optionrom is static. How number of BCVs can depend on number of attached > drives? Not sure what you mean by "Optionrom is static". SeaBIOS unlocks the memory, and the optionrom can and will modify itself with additional PNP headers so that it can list multiple BCVs - one for each drive. In particular, gPXE uses self modification to relocate parts of itself into high ram. -Kevin

5 21

Split dev-i440fx.c?
by Sebastian Herbszt 28 Nov '10

28 Nov '10

dev-i440fx.c contains functions related to the 440FX and PIIX. Those for the PIIX should also apply to the ICH (e.g. piix_ide_init). Should they be moved to dev-piix_ich.c? Sebastian

3 3

[PATCH 0/3] ahci support
by Gerd Hoffmann 26 Nov '10

26 Nov '10

Hi, This patch series adds ahci support to seabios. It depends on the call32 patches just posted by Kevin. For convinience the patches are available in the git repository at: git://anongit.freedesktop.org/~kraxel/seabios ahci.2 enjoy, Gerd Gerd Hoffmann (3): pci: add helper functions for mmio bar access from real mode. make ata helpers available add ahci support Makefile | 2 +- src/ahci.c | 484 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ src/ahci.h | 196 +++++++++++++++++++++++ src/ata.c | 20 ++- src/ata.h | 2 + src/block.c | 3 + src/blockcmd.c | 3 + src/config.h | 2 + src/disk.h | 1 + src/pci.c | 51 ++++++ src/pci.h | 4 + src/post.c | 2 + 12 files changed, 760 insertions(+), 10 deletions(-) create mode 100644 src/ahci.c create mode 100644 src/ahci.h

2 4

Re: [SeaBIOS] [Qemu-devel] [Patch] Small fix for qemu APIC for Mac OS X support
by Isaku Yamahata 26 Nov '10

26 Nov '10

On Thu, Nov 25, 2010 at 08:18:45PM +0000, adq wrote: > On 25 November 2010 11:28, Isaku Yamahata <yamahata(a)valinux.co.jp> wrote: > > On Wed, Nov 24, 2010 at 02:08:16PM +0000, adq wrote: > >> > Interesting. I was also thinking that maybe we can leverage overriding mechanisms that are already available. Maybe it's possible to squeeze the HPET node into an SSDT. Maybe we need to override the whole DSDT from the command line. > >> > >> We'll definitely need to override the DSDT for the applesmc device. I > >> was thinking something along the lines of an additional DSDT binary > >> supplied with QEMU for use when emulating apple hardware as you > >> suggest. > > > > The patches for qemu and seabios have been floating around. > > I wrote them for Q35 chipset support, but no one has gotten interested in it. > > But now, you are there. I'm willing to rebase/resend them. > > I'd definitely be interested to see those! Here is qemu part. I rebased and just compiled it. >From df45b74ca7217d40981cd8895fb1b270fb8039ec Mon Sep 17 00:00:00 2001 Message-Id: <df45b74ca7217d40981cd8895fb1b270fb8039ec.1290775119.git.yamahata(a)valinux.co.jp> In-Reply-To: <cover.1290775119.git.yamahata(a)valinux.co.jp> References: <cover.1290775119.git.yamahata(a)valinux.co.jp> From: Isaku Yamahata <yamahata(a)valinux.co.jp> Date: Fri, 26 Nov 2010 21:25:26 +0900 Subject: [PATCH 1/1] acpi: add option, load_header, for -acpitable to load acpi header This patch adds load_header option to -acpitable to load acpi table which includes acpi header. With this option and with seabios patches, alternative dsdt table can be passed to BIOS. Signed-off-by: Isaku Yamahata <yamahata(a)valinux.co.jp> --- hw/acpi.c | 26 +++++++++++++++++++++++--- qemu-options.hx | 2 ++ 2 files changed, 25 insertions(+), 3 deletions(-) diff --git a/hw/acpi.c b/hw/acpi.c index 8071e7b..fe9bede 100644 --- a/hw/acpi.c +++ b/hw/acpi.c @@ -47,6 +47,7 @@ static int acpi_checksum(const uint8_t *data, int len) int acpi_table_add(const char *t) { static const char *dfl_id = "QEMUQEMU"; + bool load_header = false; char buf[1024], *p, *f; struct acpi_table_header acpi_hdr; unsigned long val; @@ -54,6 +55,17 @@ int acpi_table_add(const char *t) struct acpi_table_header *acpi_hdr_p; size_t off; + if (strncmp(t, "load_header", strlen("load_header")) == 0) { + /* the files includes acpi header to load. + * the acpi header options, sig, rev, ... will be ignored. + */ + load_header = true; + t += strlen("load_header"); + if (*t == ',') { + t++; + } + } + memset(&acpi_hdr, 0, sizeof(acpi_hdr)); if (get_param_value(buf, sizeof(buf), "sig", t)) { @@ -110,7 +122,11 @@ int acpi_table_add(const char *t) buf[0] = '\0'; } - length = sizeof(acpi_hdr); + if (load_header) { + length = 0; + } else { + length = sizeof(acpi_hdr); + } f = buf; while (buf[0]) { @@ -140,8 +156,12 @@ int acpi_table_add(const char *t) *(uint16_t*)p = cpu_to_le32(length); p += sizeof(uint16_t); - memcpy(p, &acpi_hdr, sizeof(acpi_hdr)); - off = sizeof(acpi_hdr); + if (load_header) { + off = 0; + } else { + off = sizeof(acpi_hdr); + memcpy(p, &acpi_hdr, sizeof(acpi_hdr)); + } f = buf; while (buf[0]) { diff --git a/qemu-options.hx b/qemu-options.hx index 4d99a58..c30eb2a 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -981,9 +981,11 @@ ETEXI DEF("acpitable", HAS_ARG, QEMU_OPTION_acpitable, "-acpitable [sig=str][,rev=n][,oem_id=str][,oem_table_id=str][,oem_rev=n][,asl_compiler_id=str][,asl_compiler_rev=n][,data=file1[:file2]...]\n" + "-acpitable [load_header][,data=file1[:file2]...]\n" " ACPI table description\n", QEMU_ARCH_I386) STEXI @item -acpitable [sig=@var{str}][,rev=@var{n}][,oem_id=@var{str}][,oem_table_id=@var{str}][,oem_rev=@var{n}] [,asl_compiler_id=@var{str}][,asl_compiler_rev=@var{n}][,data=@var{file1}[:@var{file2}]...] +@item -acpitable [load_header][,data=@var{file1}[:@var{file2}]...] @findex -acpitable Add ACPI table with specified header fields and context from specified files. ETEXI -- 1.7.1.1 -- yamahata

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

SeaBIOS