SeaBIOS

seabios@seabios.org

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[PATCH 08/10] Convert AHCI detection code to use struct pci_device.
by Kevin O'Connor 21 Jun '11

21 Jun '11

--- src/ahci.c | 12 ++++++------ 1 files changed, 6 insertions(+), 6 deletions(-) diff --git a/src/ahci.c b/src/ahci.c index b28597a..fb4b70c 100644 --- a/src/ahci.c +++ b/src/ahci.c @@ -8,7 +8,7 @@ #include "ioport.h" // inb #include "util.h" // dprintf #include "biosvar.h" // GET_EBDA -#include "pci.h" // foreachbdf +#include "pci.h" // foreachpci #include "pci_ids.h" // PCI_CLASS_STORAGE_OTHER #include "pci_regs.h" // PCI_INTERRUPT_LINE #include "boot.h" // add_bcv_hd @@ -462,13 +462,13 @@ static void ahci_init(void) { // Scan PCI bus for ATA adapters - int bdf, max; - foreachbdf(bdf, max) { - if (pci_config_readw(bdf, PCI_CLASS_DEVICE) != PCI_CLASS_STORAGE_SATA) + struct pci_device *pci; + foreachpci(pci) { + if (pci->class != PCI_CLASS_STORAGE_SATA) continue; - if (pci_config_readb(bdf, PCI_CLASS_PROG) != 1 /* AHCI rev 1 */) + if (pci->prog_if != 1 /* AHCI rev 1 */) continue; - ahci_init_controller(bdf); + ahci_init_controller(pci->bdf); } } -- 1.7.4.4

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[PATCH 07/10] Convert virtio detection to use struct pci_device.
by Kevin O'Connor 21 Jun '11

21 Jun '11

--- src/virtio-blk.c | 13 ++++++------- 1 files changed, 6 insertions(+), 7 deletions(-) diff --git a/src/virtio-blk.c b/src/virtio-blk.c index ad80c24..4e3ef06 100644 --- a/src/virtio-blk.c +++ b/src/virtio-blk.c @@ -8,7 +8,7 @@ // This file may be distributed under the terms of the GNU LGPLv3 license. #include "util.h" // dprintf -#include "pci.h" // foreachbdf +#include "pci.h" // foreachpci #include "config.h" // CONFIG_* #include "biosvar.h" // GET_GLOBAL #include "pci_ids.h" // PCI_DEVICE_ID_VIRTIO_BLK @@ -173,12 +173,11 @@ virtio_blk_setup(void) dprintf(3, "init virtio-blk\n"); - int bdf, max; - u32 id = PCI_VENDOR_ID_REDHAT_QUMRANET | (PCI_DEVICE_ID_VIRTIO_BLK << 16); - foreachbdf(bdf, max) { - u32 v = pci_config_readl(bdf, PCI_VENDOR_ID); - if (v != id) + struct pci_device *pci; + foreachpci(pci) { + if (pci->vendor != PCI_VENDOR_ID_REDHAT_QUMRANET + || pci->device != PCI_DEVICE_ID_VIRTIO_BLK) continue; - init_virtio_blk(bdf); + init_virtio_blk(pci->bdf); } } -- 1.7.4.4

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[PATCH 06/10] Convert mptable code to use struct pci_device.
by Kevin O'Connor 21 Jun '11

21 Jun '11

--- src/mptable.c | 10 ++++++---- 1 files changed, 6 insertions(+), 4 deletions(-) diff --git a/src/mptable.c b/src/mptable.c index d7cab03..3100c9a 100644 --- a/src/mptable.c +++ b/src/mptable.c @@ -68,9 +68,10 @@ mptable_init(void) // PCI buses struct mpt_bus *buses = (void*)cpu, *bus = buses; - int bdf, max, lastbus = -1; - foreachbdf(bdf, max) { - int curbus = pci_bdf_to_bus(bdf); + int lastbus = -1; + struct pci_device *pci; + foreachpci(pci) { + int curbus = pci_bdf_to_bus(pci->bdf); if (curbus == lastbus) continue; lastbus = curbus; @@ -106,7 +107,8 @@ mptable_init(void) int dev = -1; unsigned short mask = 0, pinmask = 0; - foreachbdf(bdf, max) { + foreachpci(pci) { + u16 bdf = pci->bdf; int pin = pci_config_readb(bdf, PCI_INTERRUPT_PIN); int irq = pci_config_readb(bdf, PCI_INTERRUPT_LINE); if (pin == 0) -- 1.7.4.4

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[PATCH 05/10] Convert ATA detection code to use struct pci_device.
by Kevin O'Connor 21 Jun '11

21 Jun '11

--- src/ata.c | 19 +++++++++---------- 1 files changed, 9 insertions(+), 10 deletions(-) diff --git a/src/ata.c b/src/ata.c index 2630431..e07aabe 100644 --- a/src/ata.c +++ b/src/ata.c @@ -11,7 +11,7 @@ #include "cmos.h" // inb_cmos #include "pic.h" // enable_hwirq #include "biosvar.h" // GET_EBDA -#include "pci.h" // foreachbdf +#include "pci.h" // foreachpci #include "pci_ids.h" // PCI_CLASS_STORAGE_OTHER #include "pci_regs.h" // PCI_INTERRUPT_LINE #include "boot.h" // boot_add_hd @@ -1032,21 +1032,20 @@ static const struct pci_device_id pci_ata_tbl[] = { static void ata_init(void) { - // Scan PCI bus for ATA adapters - int pcicount=0; - int bdf, max; - foreachbdf(bdf, max) { - pcicount++; - pci_init_device(pci_ata_tbl, bdf, NULL); - } - - if (!CONFIG_COREBOOT && !pcicount) { + if (!CONFIG_COREBOOT && !PCIDevices) { // No PCI devices found - probably a QEMU "-M isapc" machine. // Try using ISA ports for ATA controllers. init_controller(-1, IRQ_ATA1 , PORT_ATA1_CMD_BASE, PORT_ATA1_CTRL_BASE, 0); init_controller(-1, IRQ_ATA2 , PORT_ATA2_CMD_BASE, PORT_ATA2_CTRL_BASE, 0); + return; + } + + // Scan PCI bus for ATA adapters + struct pci_device *pci; + foreachpci(pci) { + pci_init_device(pci_ata_tbl, pci->bdf, NULL); } } -- 1.7.4.4

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[PATCH 04/10] Convert option rom scan to use struct pci_device.
by Kevin O'Connor 21 Jun '11

21 Jun '11

--- src/optionroms.c | 86 ++++++++++++++++++++++++++++++++++------------------- src/pci.c | 55 ---------------------------------- src/pci.h | 11 ------- 3 files changed, 55 insertions(+), 97 deletions(-) diff --git a/src/optionroms.c b/src/optionroms.c index a612f3c..b2415cc 100644 --- a/src/optionroms.c +++ b/src/optionroms.c @@ -9,7 +9,7 @@ #include "farptr.h" // FLATPTR_TO_SEG #include "config.h" // CONFIG_* #include "util.h" // dprintf -#include "pci.h" // foreachbdf +#include "pci.h" // foreachpci #include "pci_regs.h" // PCI_ROM_ADDRESS #include "pci_ids.h" // PCI_CLASS_DISPLAY_VGA #include "boot.h" // IPL @@ -163,10 +163,10 @@ get_pnp_next(struct rom_header *rom, struct pnp_data *pnp) static struct pci_data * get_pci_rom(struct rom_header *rom) { - struct pci_data *pci = (void*)((u32)rom + rom->pcioffset); - if (pci->signature != PCI_ROM_SIGNATURE) + struct pci_data *pd = (void*)((u32)rom + rom->pcioffset); + if (pd->signature != PCI_ROM_SIGNATURE) return NULL; - return pci; + return pd; } // Return start of code in 0xc0000-0xf0000 space. @@ -238,11 +238,11 @@ getRomPriority(u64 *sources, struct rom_header *rom, int instance) // Check if an option rom is at a hardcoded location or in CBFS. static struct rom_header * -lookup_hardcode(u32 vendev) +lookup_hardcode(struct pci_device *pci) { char fname[17]; snprintf(fname, sizeof(fname), "pci%04x,%04x.rom" - , pci_vd_to_ven(vendev), pci_vd_to_dev(vendev)); + , pci->vendor, pci->device); int ret = romfile_copy(romfile_find(fname), (void*)RomEnd , max_rom() - RomEnd); if (ret <= 0) @@ -273,16 +273,35 @@ run_file_roms(const char *prefix, int isvga, u64 *sources) * PCI roms ****************************************************************/ +// Verify device is a vga device with legacy address decoding enabled. +static int +is_pci_vga(struct pci_device *pci) +{ + if (pci->class != PCI_CLASS_DISPLAY_VGA) + return 0; + u16 cmd = pci_config_readw(pci->bdf, PCI_COMMAND); + if (!(cmd & PCI_COMMAND_IO && cmd & PCI_COMMAND_MEMORY)) + return 0; + while (pci->parent) { + pci = pci->parent; + u32 ctrl = pci_config_readb(pci->bdf, PCI_BRIDGE_CONTROL); + if (!(ctrl & PCI_BRIDGE_CTL_VGA)) + return 0; + } + return 1; +} + // Map the option rom of a given PCI device. static struct rom_header * -map_pcirom(u16 bdf, u32 vendev) +map_pcirom(struct pci_device *pci) { + u16 bdf = pci->bdf; dprintf(6, "Attempting to map option rom on dev %02x:%02x.%x\n" , pci_bdf_to_bus(bdf), pci_bdf_to_dev(bdf), pci_bdf_to_fn(bdf)); - u8 htype = pci_config_readb(bdf, PCI_HEADER_TYPE); - if ((htype & 0x7f) != PCI_HEADER_TYPE_NORMAL) { - dprintf(6, "Skipping non-normal pci device (type=%x)\n", htype); + if ((pci->header_type & 0x7f) != PCI_HEADER_TYPE_NORMAL) { + dprintf(6, "Skipping non-normal pci device (type=%x)\n" + , pci->header_type); return NULL; } @@ -309,29 +328,29 @@ map_pcirom(u16 bdf, u32 vendev) for (;;) { dprintf(5, "Inspecting possible rom at %p (vd=%04x:%04x" " bdf=%02x:%02x.%x)\n" - , rom, pci_vd_to_ven(vendev), pci_vd_to_dev(vendev) + , rom, pci->vendor, pci->device , pci_bdf_to_bus(bdf), pci_bdf_to_dev(bdf), pci_bdf_to_fn(bdf)); if (rom->signature != OPTION_ROM_SIGNATURE) { dprintf(6, "No option rom signature (got %x)\n", rom->signature); goto fail; } - struct pci_data *pci = get_pci_rom(rom); - if (! pci) { + struct pci_data *pd = get_pci_rom(rom); + if (! pd) { dprintf(6, "No valid pci signature found\n"); goto fail; } - u32 vd = pci_vd(pci->vendor, pci->device); - if (vd == vendev && pci->type == PCIROM_CODETYPE_X86) + if (pd->vendor == pci->vendor && pd->device == pci->device + && pd->type == PCIROM_CODETYPE_X86) // A match break; - dprintf(6, "Didn't match dev/ven (got %08x) or type (got %d)\n" - , vd, pci->type); - if (pci->indicator & 0x80) { + dprintf(6, "Didn't match dev/ven (got %04x:%04x) or type (got %d)\n" + , pd->vendor, pd->device, pd->type); + if (pd->indicator & 0x80) { dprintf(6, "No more images left\n"); goto fail; } - rom = (void*)((u32)rom + pci->ilen * 512); + rom = (void*)((u32)rom + pd->ilen * 512); } rom = copy_rom(rom); @@ -345,15 +364,15 @@ fail: // Attempt to map and initialize the option rom on a given PCI device. static int -init_pcirom(u16 bdf, int isvga, u64 *sources) +init_pcirom(struct pci_device *pci, int isvga, u64 *sources) { - u32 vendev = pci_config_readl(bdf, PCI_VENDOR_ID); + u16 bdf = pci->bdf; dprintf(4, "Attempting to init PCI bdf %02x:%02x.%x (vd %04x:%04x)\n" , pci_bdf_to_bus(bdf), pci_bdf_to_dev(bdf), pci_bdf_to_fn(bdf) - , pci_vd_to_ven(vendev), pci_vd_to_dev(vendev)); - struct rom_header *rom = lookup_hardcode(vendev); + , pci->vendor, pci->device); + struct rom_header *rom = lookup_hardcode(pci); if (! rom) - rom = map_pcirom(bdf, vendev); + rom = map_pcirom(pci); if (! rom) // No ROM present. return -1; @@ -389,13 +408,13 @@ optionrom_setup(void) } } else { // Find and deploy PCI roms. - int bdf, max; - foreachbdf(bdf, max) { - u16 v = pci_config_readw(bdf, PCI_CLASS_DEVICE); + struct pci_device *pci; + foreachpci(pci) { + u16 v = pci->class; if (v == 0x0000 || v == 0xffff || v == PCI_CLASS_DISPLAY_VGA || (CONFIG_ATA && v == PCI_CLASS_STORAGE_IDE)) continue; - init_pcirom(bdf, 0, sources); + init_pcirom(pci, 0, sources); } // Find and deploy CBFS roms not associated with a device. @@ -458,9 +477,14 @@ vga_setup(void) memset((void*)RomEnd, 0, _max_rom() - RomEnd); // Find and deploy PCI VGA rom. - int bdf = VGAbdf = pci_find_vga(); - if (bdf >= 0) - init_pcirom(bdf, 1, NULL); + struct pci_device *pci; + foreachpci(pci) { + if (!is_pci_vga(pci)) + continue; + VGAbdf = pci->bdf; + init_pcirom(pci, 1, NULL); + break; + } // Find and deploy CBFS vga-style roms not associated with a device. run_file_roms("vgaroms/", 1, NULL); diff --git a/src/pci.c b/src/pci.c index f0953e9..9a696b9 100644 --- a/src/pci.c +++ b/src/pci.c @@ -163,61 +163,6 @@ pci_probe(void) } } -// Find a vga device with legacy address decoding enabled. -int -pci_find_vga(void) -{ - int bdf = 0x0000, max = 0x0100; - for (;;) { - if (bdf >= max) { - if (CONFIG_PCI_ROOT1 && bdf <= (CONFIG_PCI_ROOT1 << 8)) - bdf = CONFIG_PCI_ROOT1 << 8; - else if (CONFIG_PCI_ROOT2 && bdf <= (CONFIG_PCI_ROOT2 << 8)) - bdf = CONFIG_PCI_ROOT2 << 8; - else - return -1; - max = bdf + 0x0100; - } - - u16 cls = pci_config_readw(bdf, PCI_CLASS_DEVICE); - if (cls == 0x0000 || cls == 0xffff) { - // Device not present. - if (pci_bdf_to_fn(bdf) == 0) - bdf += 8; - else - bdf += 1; - continue; - } - if (cls == PCI_CLASS_DISPLAY_VGA) { - u16 cmd = pci_config_readw(bdf, PCI_COMMAND); - if (cmd & PCI_COMMAND_IO && cmd & PCI_COMMAND_MEMORY) - // Found active vga card - return bdf; - } - - // Check if device is a bridge. - u8 hdr = pci_config_readb(bdf, PCI_HEADER_TYPE); - u8 ht = hdr & 0x7f; - if (ht == PCI_HEADER_TYPE_BRIDGE || ht == PCI_HEADER_TYPE_CARDBUS) { - u32 ctrl = pci_config_readb(bdf, PCI_BRIDGE_CONTROL); - if (ctrl & PCI_BRIDGE_CTL_VGA) { - // Found a VGA enabled bridge. - u32 pbus = pci_config_readl(bdf, PCI_PRIMARY_BUS); - bdf = (pbus & 0xff00); - max = bdf + 0x100; - continue; - } - } - - if (pci_bdf_to_fn(bdf) == 0 && (hdr & 0x80) == 0) - // Last found device wasn't a multi-function device - skip to - // the next device. - bdf += 8; - else - bdf += 1; - } -} - // Search for a device with the specified vendor and device ids. int pci_find_device(u16 vendid, u16 devid) diff --git a/src/pci.h b/src/pci.h index f1d84ed..a214bb1 100644 --- a/src/pci.h +++ b/src/pci.h @@ -25,16 +25,6 @@ static inline u16 pci_bus_devfn_to_bdf(int bus, u16 devfn) { return (bus << 8) | devfn; } -static inline u32 pci_vd(u16 vendor, u16 device) { - return (device << 16) | vendor; -} -static inline u16 pci_vd_to_ven(u32 vd) { - return vd & 0xffff; -} -static inline u16 pci_vd_to_dev(u32 vd) { - return vd >> 16; -} - void pci_config_writel(u16 bdf, u32 addr, u32 val); void pci_config_writew(u16 bdf, u32 addr, u16 val); void pci_config_writeb(u16 bdf, u32 addr, u8 val); @@ -43,7 +33,6 @@ u16 pci_config_readw(u16 bdf, u32 addr); u8 pci_config_readb(u16 bdf, u32 addr); void pci_config_maskw(u16 bdf, u32 addr, u16 off, u16 on); -int pci_find_vga(void); int pci_find_device(u16 vendid, u16 devid); int pci_find_class(u16 classid); -- 1.7.4.4

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[PATCH 03/10] Remove support for compiling in OPTIONROM_VENDEV_1/2.
by Kevin O'Connor 21 Jun '11

21 Jun '11

Passing in rom locations via absolute memory addresses hasn't been needed since coreboot adopted CBFS support (which as several years ago). --- src/config.h | 7 ------- src/optionroms.c | 8 -------- 2 files changed, 0 insertions(+), 15 deletions(-) diff --git a/src/config.h b/src/config.h index 5b40488..e6e07c9 100644 --- a/src/config.h +++ b/src/config.h @@ -14,13 +14,6 @@ #define CONFIG_APPNAME6 "BOCHS " #define CONFIG_APPNAME4 "BXPC" -// When option roms are not pre-deployed, SeaBIOS can copy an optionrom -// from flash for up to 2 devices. -#define OPTIONROM_VENDEV_1 0x00000000 -#define OPTIONROM_MEM_1 0x00000000 -#define OPTIONROM_VENDEV_2 0x00000000 -#define OPTIONROM_MEM_2 0x00000000 - // Maximum number of map entries in the e820 map #define CONFIG_MAX_E820 32 // Space to reserve in f-segment for dynamic allocations diff --git a/src/optionroms.c b/src/optionroms.c index ff74c4f..a612f3c 100644 --- a/src/optionroms.c +++ b/src/optionroms.c @@ -240,14 +240,6 @@ getRomPriority(u64 *sources, struct rom_header *rom, int instance) static struct rom_header * lookup_hardcode(u32 vendev) { - if (OPTIONROM_VENDEV_1 - && ((OPTIONROM_VENDEV_1 >> 16) - | ((OPTIONROM_VENDEV_1 & 0xffff)) << 16) == vendev) - return copy_rom((void*)OPTIONROM_MEM_1); - if (OPTIONROM_VENDEV_2 - && ((OPTIONROM_VENDEV_2 >> 16) - | ((OPTIONROM_VENDEV_2 & 0xffff)) << 16) == vendev) - return copy_rom((void*)OPTIONROM_MEM_2); char fname[17]; snprintf(fname, sizeof(fname), "pci%04x,%04x.rom" , pci_vd_to_ven(vendev), pci_vd_to_dev(vendev)); -- 1.7.4.4

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[PATCH 02/10] Find all pci devices at startup and cache them for future use.
by Kevin O'Connor 21 Jun '11

21 Jun '11

This adds 'struct pci_device' and pci_probe() which will locate and store all found PCI devices in the system at startup. --- src/pci.c | 60 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ src/pci.h | 20 ++++++++++++++++++++ src/post.c | 1 + 3 files changed, 81 insertions(+), 0 deletions(-) diff --git a/src/pci.c b/src/pci.c index c95baca..f0953e9 100644 --- a/src/pci.c +++ b/src/pci.c @@ -103,6 +103,66 @@ pci_next(int bdf, int *pmax) return bdf; } +struct pci_device *PCIDevices; +int MaxPCIBus; + +void +pci_probe(void) +{ + int rootbuses = 0; + struct pci_device *busdevs[256]; + memset(busdevs, 0, sizeof(busdevs)); + + struct pci_device **pprev = &PCIDevices; + u8 lastbus = 0; + int bdf, max; + foreachbdf(bdf, max) { + // Create new pci_device struct and add to list. + struct pci_device *dev = malloc_tmp(sizeof(*dev)); + if (!dev) { + warn_noalloc(); + return; + } + memset(dev, 0, sizeof(*dev)); + *pprev = dev; + pprev = &dev->next; + + // Find parent device. + u8 bus = pci_bdf_to_bus(bdf), rootbus; + struct pci_device *parent = busdevs[bus]; + if (!parent) { + if (bus != lastbus) + rootbuses++; + lastbus = bus; + rootbus = rootbuses; + } else { + rootbus = parent->rootbus; + } + if (bus > MaxPCIBus) + MaxPCIBus = bus; + + // Populate pci_device info. + dev->bdf = bdf; + dev->parent = parent; + dev->rootbus = rootbus; + u32 vendev = pci_config_readl(bdf, PCI_VENDOR_ID); + dev->vendor = vendev & 0xffff; + dev->device = vendev >> 16; + u32 classrev = pci_config_readl(bdf, PCI_CLASS_REVISION); + dev->class = classrev >> 16; + dev->prog_if = classrev >> 8; + dev->revision = classrev & 0xff; + dev->header_type = pci_config_readb(bdf, PCI_HEADER_TYPE); + u8 v = dev->header_type & 0x7f; + if (v == PCI_HEADER_TYPE_BRIDGE || v == PCI_HEADER_TYPE_CARDBUS) { + u8 secbus = pci_config_readb(bdf, PCI_SECONDARY_BUS); + dev->secondary_bus = secbus; + if (secbus > bus && !busdevs[secbus]) + busdevs[secbus] = dev; + } + } +} + // Find a vga device with legacy address decoding enabled. int pci_find_vga(void) diff --git a/src/pci.h b/src/pci.h index 6e9cbf0..f1d84ed 100644 --- a/src/pci.h +++ b/src/pci.h @@ -47,6 +47,26 @@ int pci_find_vga(void); int pci_find_device(u16 vendid, u16 devid); int pci_find_class(u16 classid); +struct pci_device { + u16 bdf; + u8 rootbus; + struct pci_device *next; + struct pci_device *parent; + + // Configuration space device information + u16 vendor, device; + u16 class; + u8 prog_if, revision; + u8 header_type; + u8 secondary_bus; +}; +extern struct pci_device *PCIDevices; +extern int MaxPCIBus; +void pci_probe(void); + +#define foreachpci(PCI) \ + for (PCI=PCIDevices; PCI; PCI=PCI->next) + #define PP_ROOT (1<<17) #define PP_PCIBRIDGE (1<<18) extern int *PCIpaths; diff --git a/src/post.c b/src/post.c index 70d98a6..d8f4acf 100644 --- a/src/post.c +++ b/src/post.c @@ -224,6 +224,7 @@ maininit(void) // Initialize pci pci_setup(); + pci_probe(); pci_path_setup(); smm_init(); -- 1.7.4.4

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[PATCH 00/10] Add PCI device cache
by Kevin O'Connor 21 Jun '11

21 Jun '11

This patch series adds code to probe the PCI devices during startup and cache the results for future scans. Doing so has a few advantages: storing the list of pci devices reduces PCI config accesses which can reduce boot time, the lack of a cache results in complex code to do bus tracking (vga / pcipath), and it's likely PCI init on emulators could take advantage of this structure during PCI setup. This is the start of conversion to the 'struct pci_device' system - other users could also be converted. In particular, the pci_setup() code has not been converted. -Kevin Kevin O'Connor (10): Rename foreachpci macro to foreachbdf. Find all pci devices at startup and cache them for future use. Remove support for compiling in OPTIONROM_VENDEV_1/2. Convert option rom scan to use struct pci_device. Convert ATA detection code to use struct pci_device. Convert mptable code to use struct pci_device. Convert virtio detection to use struct pci_device. Convert AHCI detection code to use struct pci_device. Convert USB detection code to use struct pci_device. Replace PCIPaths code with struct pci_device. src/ahci.c | 10 ++-- src/ata.c | 17 +++---- src/boot.c | 39 +++++++++------ src/config.h | 7 --- src/mptable.c | 10 ++-- src/optionroms.c | 92 +++++++++++++++++++++--------------- src/pci.c | 137 ++++++++++++++++++++++-------------------------------- src/pci.h | 41 +++++++++------- src/pcibios.c | 6 +- src/pciinit.c | 8 ++-- src/post.c | 2 +- src/usb.c | 39 +++++++--------- src/virtio-blk.c | 11 ++-- 13 files changed, 207 insertions(+), 212 deletions(-) -- 1.7.4.4

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[PATCH 0/2] Support white-listing of AHCI controllers in legacy ATA mode
by Kevin O'Connor 19 Jun '11

19 Jun '11

This patch series enables the ATA code to support using select AHCI controllers in legacy ATA mode when SeaBIOS isn't compiled with the AHCI driver. I've only registered the device id of the controller on my e350m1 board, but it's easy to add more device ids. Kevin O'Connor (2): Convert ATA pci scan to use pci_device_id table. Add support for white-listing AHCI controllers as ATA compatible. src/ata.c | 120 ++++++++++++++++++++++++++++++++++++------------------------ 1 files changed, 72 insertions(+), 48 deletions(-) -- 1.7.4.4

1 2

[PATCH] Remove dev-i440fx.c/h - move code closer to its callers.
by Kevin O'Connor 19 Jun '11

19 Jun '11

It's easier to understand the code when it is in the same file as its callers. --- Makefile | 2 +- src/acpi.c | 15 ++++++- src/dev-i440fx.c | 116 ------------------------------------------------------ src/dev-i440fx.h | 14 ------ src/pciinit.c | 43 +++++++++++++++++++- src/shadow.c | 29 +++++++++---- src/smm.c | 36 +++++++++++++++- src/util.h | 7 --- 8 files changed, 109 insertions(+), 153 deletions(-) delete mode 100644 src/dev-i440fx.c delete mode 100644 src/dev-i440fx.h diff --git a/Makefile b/Makefile index 05bcee3..a96c89d 100644 --- a/Makefile +++ b/Makefile @@ -19,7 +19,7 @@ SRCBOTH=misc.c pmm.c stacks.c output.c util.c block.c floppy.c ata.c mouse.c \ SRC16=$(SRCBOTH) system.c disk.c font.c SRC32FLAT=$(SRCBOTH) post.c shadow.c memmap.c coreboot.c boot.c \ acpi.c smm.c mptable.c smbios.c pciinit.c optionroms.c mtrr.c \ - lzmadecode.c bootsplash.c jpeg.c usb-hub.c paravirt.c dev-i440fx.c \ + lzmadecode.c bootsplash.c jpeg.c usb-hub.c paravirt.c \ pci_region.c biostables.c xen.c SRC32SEG=util.c output.c pci.c pcibios.c apm.c stacks.c diff --git a/src/acpi.c b/src/acpi.c index 6428d9c..584e557 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -12,7 +12,6 @@ #include "pci_ids.h" // PCI_VENDOR_ID_INTEL #include "pci_regs.h" // PCI_INTERRUPT_LINE #include "paravirt.h" -#include "dev-i440fx.h" // piix4_fadt_init /****************************************************/ /* ACPI tables init */ @@ -213,6 +212,20 @@ build_header(struct acpi_table_header *h, u32 sig, int len, u8 rev) h->checksum -= checksum(h, len); } +#define PIIX4_ACPI_ENABLE 0xf1 +#define PIIX4_ACPI_DISABLE 0xf0 +#define PIIX4_GPE0_BLK 0xafe0 +#define PIIX4_GPE0_BLK_LEN 4 + +static void piix4_fadt_init(u16 bdf, void *arg) +{ + struct fadt_descriptor_rev1 *fadt = arg; + fadt->acpi_enable = PIIX4_ACPI_ENABLE; + fadt->acpi_disable = PIIX4_ACPI_DISABLE; + fadt->gpe0_blk = cpu_to_le32(PIIX4_GPE0_BLK); + fadt->gpe0_blk_len = PIIX4_GPE0_BLK_LEN; +} + static const struct pci_device_id fadt_init_tbl[] = { /* PIIX4 Power Management device (for ACPI) */ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3, diff --git a/src/dev-i440fx.c b/src/dev-i440fx.c deleted file mode 100644 index 346f6d0..0000000 --- a/src/dev-i440fx.c +++ /dev/null @@ -1,116 +0,0 @@ -// initialization function which are specific to i440fx chipset -// -// Copyright (C) 2008 Kevin O'Connor <kevin(a)koconnor.net> -// Copyright (C) 2006 Fabrice Bellard -// -// Copyright (C) 2010 Isaku Yamahata <yamahata at valinux co jp> -// Split out from pciinit.c -// -// This file may be distributed under the terms of the GNU LGPLv3 license. -// - -#include "config.h" // CONFIG_DEBUG_LEVEL -#include "util.h" // dprintf -#include "ioport.h" // outb -#include "pci.h" // pci_config_writeb -#include "pci_ids.h" -#include "pci_regs.h" // PCI_INTERRUPT_LINE -#include "acpi.h" -#include "dev-i440fx.h" - -#define I440FX_PAM0 0x59 - -void i440fx_bios_make_writable(u16 bdf, void *arg) -{ - make_bios_writable_intel(bdf, I440FX_PAM0); -} - -void i440fx_bios_make_readonly(u16 bdf, void *arg) -{ - make_bios_readonly_intel(bdf, I440FX_PAM0); -} - -/* PIIX3/PIIX4 PCI to ISA bridge */ -void piix_isa_bridge_init(u16 bdf, void *arg) -{ - int i, irq; - u8 elcr[2]; - - elcr[0] = 0x00; - elcr[1] = 0x00; - for (i = 0; i < 4; i++) { - irq = pci_irqs[i]; - /* set to trigger level */ - elcr[irq >> 3] |= (1 << (irq & 7)); - /* activate irq remapping in PIIX */ - pci_config_writeb(bdf, 0x60 + i, irq); - } - outb(elcr[0], 0x4d0); - outb(elcr[1], 0x4d1); - dprintf(1, "PIIX3/PIIX4 init: elcr=%02x %02x\n", elcr[0], elcr[1]); -} - -/* PIIX3/PIIX4 IDE */ -void piix_ide_init(u16 bdf, void *arg) -{ - pci_config_writew(bdf, 0x40, 0x8000); // enable IDE0 - pci_config_writew(bdf, 0x42, 0x8000); // enable IDE1 - pci_bios_allocate_regions(bdf, NULL); -} - -/* PIIX4 Power Management device (for ACPI) */ -void piix4_pm_init(u16 bdf, void *arg) -{ - // acpi sci is hardwired to 9 - pci_config_writeb(bdf, PCI_INTERRUPT_LINE, 9); - - pci_config_writel(bdf, 0x40, PORT_ACPI_PM_BASE | 1); - pci_config_writeb(bdf, 0x80, 0x01); /* enable PM io space */ - pci_config_writel(bdf, 0x90, PORT_SMB_BASE | 1); - pci_config_writeb(bdf, 0xd2, 0x09); /* enable SMBus io space */ -} - -#define PIIX4_ACPI_ENABLE 0xf1 -#define PIIX4_ACPI_DISABLE 0xf0 -#define PIIX4_GPE0_BLK 0xafe0 -#define PIIX4_GPE0_BLK_LEN 4 - -void piix4_fadt_init(u16 bdf, void *arg) -{ - struct fadt_descriptor_rev1 *fadt = arg; - fadt->acpi_enable = PIIX4_ACPI_ENABLE; - fadt->acpi_disable = PIIX4_ACPI_DISABLE; - fadt->gpe0_blk = cpu_to_le32(PIIX4_GPE0_BLK); - fadt->gpe0_blk_len = PIIX4_GPE0_BLK_LEN; -} - -#define I440FX_SMRAM 0x72 -#define PIIX_DEVACTB 0x58 -#define PIIX_APMC_EN (1 << 25) - -// This code is hardcoded for PIIX4 Power Management device. -void piix4_apmc_smm_init(u16 bdf, void *arg) -{ - int i440_bdf = pci_find_device(PCI_VENDOR_ID_INTEL - , PCI_DEVICE_ID_INTEL_82441); - if (i440_bdf < 0) - return; - - /* check if SMM init is already done */ - u32 value = pci_config_readl(bdf, PIIX_DEVACTB); - if (value & PIIX_APMC_EN) - return; - - /* enable the SMM memory window */ - pci_config_writeb(i440_bdf, I440FX_SMRAM, 0x02 | 0x48); - - smm_save_and_copy(); - - /* enable SMI generation when writing to the APMC register */ - pci_config_writel(bdf, PIIX_DEVACTB, value | PIIX_APMC_EN); - - smm_relocate_and_restore(); - - /* close the SMM memory window and enable normal SMM */ - pci_config_writeb(i440_bdf, I440FX_SMRAM, 0x02 | 0x08); -} diff --git a/src/dev-i440fx.h b/src/dev-i440fx.h deleted file mode 100644 index ab5a4d1..0000000 --- a/src/dev-i440fx.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef __I440FX_H -#define __I440FX_H - -#include "types.h" // u16 - -void i440fx_bios_make_writable(u16 bdf, void *arg); -void i440fx_bios_make_readonly(u16 bdf, void *arg); -void piix_isa_bridge_init(u16 bdf, void *arg); -void piix_ide_init(u16 bdf, void *arg); -void piix4_pm_init(u16 bdf, void *arg); -void piix4_fadt_init(u16 bdf, void *arg); -void piix4_apmc_smm_init(u16 bdf, void *arg); - -#endif // __I440FX_H diff --git a/src/pciinit.c b/src/pciinit.c index 0bd9b72..ca0d182 100644 --- a/src/pciinit.c +++ b/src/pciinit.c @@ -10,7 +10,6 @@ #include "biosvar.h" // GET_EBDA #include "pci_ids.h" // PCI_VENDOR_ID_INTEL #include "pci_regs.h" // PCI_COMMAND -#include "dev-i440fx.h" #include "xen.h" // usingXen #define PCI_ROM_SLOT 6 @@ -115,7 +114,7 @@ static int pci_bios_allocate_region(u16 bdf, int region_num) return is_64bit; } -void pci_bios_allocate_regions(u16 bdf, void *arg) +static void pci_bios_allocate_regions(u16 bdf, void *arg) { int i; for (i = 0; i < PCI_NUM_REGIONS; i++) { @@ -135,6 +134,26 @@ static int pci_slot_get_pirq(u16 bdf, int irq_num) return (irq_num + slot_addend) & 3; } +/* PIIX3/PIIX4 PCI to ISA bridge */ +static void piix_isa_bridge_init(u16 bdf, void *arg) +{ + int i, irq; + u8 elcr[2]; + + elcr[0] = 0x00; + elcr[1] = 0x00; + for (i = 0; i < 4; i++) { + irq = pci_irqs[i]; + /* set to trigger level */ + elcr[irq >> 3] |= (1 << (irq & 7)); + /* activate irq remapping in PIIX */ + pci_config_writeb(bdf, 0x60 + i, irq); + } + outb(elcr[0], 0x4d0); + outb(elcr[1], 0x4d1); + dprintf(1, "PIIX3/PIIX4 init: elcr=%02x %02x\n", elcr[0], elcr[1]); +} + static const struct pci_device_id pci_isa_bridge_tbl[] = { /* PIIX3/PIIX4 PCI to ISA bridge */ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371SB_0, @@ -245,6 +264,14 @@ static void storage_ide_init(u16 bdf, void *arg) pci_set_io_region_addr(bdf, 3, PORT_ATA2_CTRL_BASE); } +/* PIIX3/PIIX4 IDE */ +static void piix_ide_init(u16 bdf, void *arg) +{ + pci_config_writew(bdf, 0x40, 0x8000); // enable IDE0 + pci_config_writew(bdf, 0x42, 0x8000); // enable IDE1 + pci_bios_allocate_regions(bdf, NULL); +} + static void pic_ibm_init(u16 bdf, void *arg) { /* PIC, IBM, MPIC & MPIC2 */ @@ -286,6 +313,18 @@ static const struct pci_device_id pci_class_tbl[] = { PCI_DEVICE_END, }; +/* PIIX4 Power Management device (for ACPI) */ +static void piix4_pm_init(u16 bdf, void *arg) +{ + // acpi sci is hardwired to 9 + pci_config_writeb(bdf, PCI_INTERRUPT_LINE, 9); + + pci_config_writel(bdf, 0x40, PORT_ACPI_PM_BASE | 1); + pci_config_writeb(bdf, 0x80, 0x01); /* enable PM io space */ + pci_config_writel(bdf, 0x90, PORT_SMB_BASE | 1); + pci_config_writeb(bdf, 0xd2, 0x09); /* enable SMBus io space */ +} + static const struct pci_device_id pci_device_tbl[] = { /* PIIX4 Power Management device (for ACPI) */ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3, diff --git a/src/shadow.c b/src/shadow.c index cb39ddf..169decf 100644 --- a/src/shadow.c +++ b/src/shadow.c @@ -9,12 +9,13 @@ #include "pci.h" // pci_config_writeb #include "config.h" // CONFIG_* #include "pci_ids.h" // PCI_VENDOR_ID_INTEL -#include "dev-i440fx.h" #include "xen.h" // usingXen // On the emulators, the bios at 0xf0000 is also at 0xffff0000 #define BIOS_SRC_OFFSET 0xfff00000 +#define I440FX_PAM0 0x59 + // Enable shadowing and copy bios. static void __make_bios_writable_intel(u16 bdf, u32 pam0) @@ -52,7 +53,7 @@ __make_bios_writable_intel(u16 bdf, u32 pam0) , code32flat_end - code32flat_start); } -void +static void make_bios_writable_intel(u16 bdf, u32 pam0) { int reg = pci_config_readb(bdf, pam0); @@ -70,7 +71,7 @@ make_bios_writable_intel(u16 bdf, u32 pam0) __make_bios_writable_intel(bdf, pam0); } -void +static void make_bios_readonly_intel(u16 bdf, u32 pam0) { // Flush any pending writes before locking memory. @@ -93,12 +94,28 @@ make_bios_readonly_intel(u16 bdf, u32 pam0) pci_config_writeb(bdf, pam0, 0x10); } +static void i440fx_bios_make_writable(u16 bdf, void *arg) +{ + make_bios_writable_intel(bdf, I440FX_PAM0); +} + +static void i440fx_bios_make_readonly(u16 bdf, void *arg) +{ + make_bios_readonly_intel(bdf, I440FX_PAM0); +} + static const struct pci_device_id dram_controller_make_writable_tbl[] = { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441, i440fx_bios_make_writable), PCI_DEVICE_END }; +static const struct pci_device_id dram_controller_make_readonly_tbl[] = { + PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441, + i440fx_bios_make_readonly), + PCI_DEVICE_END +}; + // Make the 0xc0000-0x100000 area read/writable. void make_bios_writable(void) @@ -118,12 +135,6 @@ make_bios_writable(void) } } -static const struct pci_device_id dram_controller_make_readonly_tbl[] = { - PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441, - i440fx_bios_make_readonly), - PCI_DEVICE_END -}; - // Make the BIOS code segment area (0xf0000) read-only. void make_bios_readonly(void) diff --git a/src/smm.c b/src/smm.c index 7e52892..9db02d7 100644 --- a/src/smm.c +++ b/src/smm.c @@ -10,7 +10,6 @@ #include "config.h" // CONFIG_* #include "ioport.h" // outb #include "pci_ids.h" // PCI_VENDOR_ID_INTEL -#include "dev-i440fx.h" ASM32FLAT( ".global smm_relocation_start\n" @@ -73,7 +72,7 @@ ASM32FLAT( extern u8 smm_relocation_start, smm_relocation_end; extern u8 smm_code_start, smm_code_end; -void +static void smm_save_and_copy(void) { /* save original memory content */ @@ -84,7 +83,7 @@ smm_save_and_copy(void) &smm_relocation_end - &smm_relocation_start); } -void +static void smm_relocate_and_restore(void) { /* init APM status port */ @@ -106,6 +105,37 @@ smm_relocate_and_restore(void) wbinvd(); } +#define I440FX_SMRAM 0x72 +#define PIIX_DEVACTB 0x58 +#define PIIX_APMC_EN (1 << 25) + +// This code is hardcoded for PIIX4 Power Management device. +static void piix4_apmc_smm_init(u16 bdf, void *arg) +{ + int i440_bdf = pci_find_device(PCI_VENDOR_ID_INTEL + , PCI_DEVICE_ID_INTEL_82441); + if (i440_bdf < 0) + return; + + /* check if SMM init is already done */ + u32 value = pci_config_readl(bdf, PIIX_DEVACTB); + if (value & PIIX_APMC_EN) + return; + + /* enable the SMM memory window */ + pci_config_writeb(i440_bdf, I440FX_SMRAM, 0x02 | 0x48); + + smm_save_and_copy(); + + /* enable SMI generation when writing to the APMC register */ + pci_config_writel(bdf, PIIX_DEVACTB, value | PIIX_APMC_EN); + + smm_relocate_and_restore(); + + /* close the SMM memory window and enable normal SMM */ + pci_config_writeb(i440_bdf, I440FX_SMRAM, 0x02 | 0x08); +} + static const struct pci_device_id smm_init_tbl[] = { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3, piix4_apmc_smm_init), diff --git a/src/util.h b/src/util.h index 00433e2..7034d43 100644 --- a/src/util.h +++ b/src/util.h @@ -342,14 +342,8 @@ void bios32_setup(void); // shadow.c void make_bios_writable(void); void make_bios_readonly(void); -void make_bios_writable_intel(u16 bdf, u32 pam0); -void make_bios_readonly_intel(u16 bdf, u32 pam0); void qemu_prep_reset(void); -// smm.c -void smm_save_and_copy(void); -void smm_relocate_and_restore(void); - // pci_region.c // region allocator. pci region allocates the requested region // sequentially with overflow check. @@ -381,7 +375,6 @@ u32 pci_region_size(const struct pci_region *r); // pciinit.c extern const u8 pci_irqs[4]; -void pci_bios_allocate_regions(u16 bdf, void *arg); void pci_setup(void); // smm.c -- 1.7.4.4

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