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[PATCH 2/3] bochsvga: Implement vbe 15h function
by Hiroshi Miura 19 Sep '12

19 Sep '12

This patch adds the ability for the Bochs VGA ROM to return information about a HD wide monitor. It is constructed from defitions at run time. Inspired by this patch I digged out from the vgabios mailing list: http://old.nabble.com/VBE-BIOS-support-for-monitor-information-(EDID)-td229… Signed-off-by: Hiroshi Miura <miurahr(a)linux.com> --- Makefile | 3 +- vgasrc/bochsedid.c | 147 ++++++++++++++++++++++++++++++++++++++++++++++++++++ vgasrc/bochsedid.h | 136 ++++++++++++++++++++++++++++++++++++++++++++++++ vgasrc/vgahw.h | 5 ++ 4 files changed, 290 insertions(+), 1 deletion(-) create mode 100644 vgasrc/bochsedid.c create mode 100644 vgasrc/bochsedid.h diff --git a/Makefile b/Makefile index 45ea48a..d3e22b9 100644 --- a/Makefile +++ b/Makefile @@ -189,7 +189,8 @@ $(OUT)bios.bin.elf $(OUT)bios.bin: $(OUT)rom.o tools/checkrom.py SRCVGA=src/output.c src/util.c src/pci.c \ vgasrc/vgabios.c vgasrc/vgafb.c vgasrc/vgafonts.c vgasrc/vbe.c \ vgasrc/stdvga.c vgasrc/stdvgamodes.c vgasrc/stdvgaio.c \ - vgasrc/clext.c vgasrc/bochsvga.c vgasrc/geodevga.c + vgasrc/clext.c vgasrc/bochsvga.c vgasrc/geodevga.c \ + vgasrc/bochsedid.c CFLAGS16VGA = $(CFLAGS16INC) -Isrc diff --git a/vgasrc/bochsedid.c b/vgasrc/bochsedid.c new file mode 100644 index 0000000..5a40593 --- /dev/null +++ b/vgasrc/bochsedid.c @@ -0,0 +1,147 @@ +// VESA VBE EDID capability for virtual display +// +// Copyright (C) 2012 Hiroshi Miura <miurahr(a)linux.com> +// +// This file may be distributed under the terms of the GNU LGPLv3 license. + +#include "vbe.h" // VBE_CAPABILITY_8BIT_DAC +#include "biosvar.h" // GET_GLOBAL +#include "util.h" // dprintf +#include "config.h" // CONFIG_* +#include "bochsedid.h" + +int bochs_get_ddc_capabilities(u16 unit) +{ + if (unit != 0) + return -1; + + return (1 << 8) | VBE_DDC1_PROTOCOL_SUPPORTED; +} + +u8 most_chromaticity[8] VAR16 = {0xA6,0x55,0x48,0x9B,0x26,0x12,0x50,0x54}; +unsigned char vgabios_name[] VAR16 = "Sea VGABIOS"; +struct edid_detailed_timing edid_dtd_1280x1024 VAR16 = { + 0x2a30, 0x00, 0x98, 0x51, 0x00, 0x2A, + 0x40, 0x30, 0x70, 0x13, 0x00, 0x2C, 0xE1, 0x10, + 0x00, 0x00, 0x1E}; +struct edid_detailed_timing edid_dtd_1152x864 VAR16 = { + 0x2a30, 0x80, 0xC0, 0x41, 0x60, 0x24, + 0x30, 0x40, 0x80, 0x13, 0x00, 0x2C, 0xE1, 0x10, + 0x00, 0x00, 0x1E}; +struct edid_detailed_timing edid_dtd_1600x1200 VAR16 = { + 0x3c8c, 0x40, 0x30, 0x62, 0xB0, 0x32, + 0x40, 0x40, 0xC0, 0x13, 0x00, 0x2C, 0xE1, 0x10, + 0x00, 0x00, 0x1E}; +struct edid_detailed_timing edid_dtd_1920x1200 VAR16 = { + 0x4B7D, 0xB0, 0xA0, 0x72, 0xB0, 0x2D, + 0x40, 0x88, 0xC8, 0x55, 0x75, 0x21, + 0x00, 0x00, 0x1C}; +struct edid_monitor_range_limit edid_range_limit VAR16 = { + {0x00,0x00,0x00,0xfD,0x00}, + 50,150, /* Vertical 50Hz - 150Hz */ + 31,135, /* Horiz 31kHz - 135kHz */ + 20, /* clock 200MHz */ + 0, /* no ext */ + 0x0A,0x20,0x20, + 0x2020, + 0x20,0x20 /* padding */ + }; + +int bochs_read_edid_block0(u16 unit, u16 block, u16 seg, void *data, u8 next) +{ + struct edid_info *info = data; + int i; + + memset_far(seg, info, 0, sizeof(*info)); + /* header */ + SET_FARVAR(seg, info->header[0], 0); + for (i = 1; i < 7; i++) { + SET_FARVAR(seg, info->header[i], 0xFF); + } + SET_FARVAR(seg, info->header[7], 0); + /* Vendor/Product/Serial/Date */ + SET_FARVAR(seg, info->vendor, 0x2104); + SET_FARVAR(seg, info->product,0xCDAB); + SET_FARVAR(seg, info->serial, 0x00000000); + /* date/version */ + SET_FARVAR(seg, info->week,36); + SET_FARVAR(seg, info->year,22); /* 2012 */ + SET_FARVAR(seg, info->major_version,1); + SET_FARVAR(seg, info->minor_version,3); /* 1.3 */ + /* video prameters */ + SET_FARVAR(seg, info->video_setup,0x0F); + /* Video signal interface (analogue, 0.700 : 0.300 : 1.000 V p-p, + Video Setup: Blank Level = Black Level, Separate Sync H & V Signals are + supported, Composite Sync Signal on Horizontal is supported, Composite + Sync Signal on Green Video is supported, Serration on the Vertical Sync + is supported) */ + SET_FARVAR(seg, info->screen_width,0x21); + SET_FARVAR(seg, info->screen_height,0x19); /* 330 mm * 250 mm */ + SET_FARVAR(seg, info->gamma,0x78); /* 2.2 */ + SET_FARVAR(seg, info->feature_flag,0x0F); /* no DMPS states, RGB, display is continuous frequency, prefered mode */ + SET_FARVAR(seg, info->least_chromaticity[0],0x78); + SET_FARVAR(seg, info->least_chromaticity[1],0xF5); + memcpy_far(seg, info->most_chromaticity, get_global_seg(), most_chromaticity, + sizeof (most_chromaticity)); + + SET_FARVAR(seg, info->established_timing[0], 0xFF); + SET_FARVAR(seg, info->established_timing[1], 0xEF); + SET_FARVAR(seg, info->established_timing[2], 0x80); + /* 720x400@70Hz, 720x400@88Hz, 640x480@60Hz, 640x480@67Hz, 640x480@72Hz, 640x480@75Hz, + 800x600@56Hz, 800x600@60Hz, 800x600@72Hz, 800x600@75Hz, 832x624@75Hz, 1152x870@75Hz, + not 1024x768@87Hz(I), 1024x768@60Hz, 1024x768@70Hz, 1024x768@75Hz, 1280x1024@75Hz */ + /* standard timings */ + SET_FARVAR(seg, info->standard_timing[0], EDID_STD_640x480_85Hz); + SET_FARVAR(seg, info->standard_timing[1], EDID_STD_800x600_85Hz); + SET_FARVAR(seg, info->standard_timing[2], EDID_STD_1024x768_85Hz); + SET_FARVAR(seg, info->standard_timing[3], EDID_STD_1280x720_70Hz); + SET_FARVAR(seg, info->standard_timing[4], EDID_STD_1280x960_60Hz); + SET_FARVAR(seg, info->standard_timing[5], EDID_STD_1440x900_60Hz); + SET_FARVAR(seg, info->standard_timing[6], EDID_STD_1600x1200_60Hz); + SET_FARVAR(seg, info->standard_timing[7], EDID_STD_NOP); + /* detailed timing blocks */ + memcpy_far(seg, &(info->desc[0].dtd), get_global_seg(), &edid_dtd_1600x1200, + sizeof (edid_dtd_1600x1200)); + /* monitor range */ + memcpy_far(seg, &(info->desc[1].mrld), get_global_seg(), &edid_range_limit, + sizeof(edid_range_limit)); + /* serial */ + for (i = 0; i < 5; i++) { + SET_FARVAR(seg, info->desc[2].mtxtd.header[i], 0); + } + SET_FARVAR(seg, info->desc[2].mtxtd.header[3], 0xFF); + for (i = 0; i < 10; i++) { + SET_FARVAR(seg, info->desc[2].mtxtd.text[i], i+0x30); + } + SET_FARVAR(seg, info->desc[2].mtxtd.text[10], 0x0A); + SET_FARVAR(seg, info->desc[2].mtxtd.text[11], 0x20); + SET_FARVAR(seg, info->desc[2].mtxtd.text[12], 0x20); + /* monitor name */ + for (i = 0; i < 5; i++) { + SET_FARVAR(seg, info->desc[3].mtxtd.header[i], 0); + } + SET_FARVAR(seg, info->desc[3].mtxtd.header[3], 0xFC); + memcpy_far(seg, info->desc[3].mtxtd.text, get_global_seg(), vgabios_name, 12); + SET_FARVAR(seg, info->desc[3].mtxtd.text[12], 0x0A); + /* ext */ + SET_FARVAR(seg, info->extensions, next); + + /* checksum */ + u8 sum = -checksum_far(get_global_seg(), info, sizeof(info)); + SET_FARVAR(seg, info->checksum, sum); + + return 0; +} + +int bochs_read_edid(u16 unit, u16 block, u16 seg, void *data) +{ + if (unit != 0) + return -1; + + switch (block) { + case 0: + return bochs_read_edid_block0(unit, block, seg, data, 0); + default: + return -1; + } +} diff --git a/vgasrc/bochsedid.h b/vgasrc/bochsedid.h new file mode 100644 index 0000000..0f925df --- /dev/null +++ b/vgasrc/bochsedid.h @@ -0,0 +1,136 @@ +#ifndef __BOCHEDID_H +#define __BOCHEDID_H + +/* EDID infomation definitions */ +/* Detailed Timing Descriptor */ +struct edid_detailed_timing { + u16 pixel_clock; + u8 horizontal_addressable_low; + u8 horizontal_blanking_low; + u8 horizontal_high; + u8 vertical_addressable_low; + u8 vertical_blanking_low; + u8 vertical_high; + u8 horizontal_front_porch_low; + u8 horizontal_sync_pulse_low; + u8 vertical_low4; + u8 horizontal_vertical_sync_hi; + u8 horizontal_video_image_low; + u8 vertical_video_image_low; + u8 video_image_high; + u8 horizontal_border; + u8 vertical_border; + u8 features; +} PACKED; + +/* Other Monitor Descriptors */ +/* + 0xFF: Monitor serial number (text) + 0xFE: Unspecified text (text) + 0xFC: Monitor name (text) + */ +struct edid_monitor_text { + u8 header[5]; + u8 text[13]; +} PACKED; + +/* Monitor Range Limits Descriptor */ +/* + 0xFD: Monitor range limits. 6- or 13-byte binary descriptor. + */ +struct edid_monitor_range_limit { + u8 header[5]; + u8 vertical_rate_min; + u8 vertical_rate_max; + u8 horizontal_rate_min; + u8 horizontal_rate_max; + u8 pixel_clock_max; + u8 extended_timing_type; + u8 reserved; + u8 start_frequency; + u8 gtf_c_val; + u16 gtf_m_val; + u8 gtf_k_val; + u8 gtf_j_val; +} PACKED; + +/* White point Descriptor */ +/* + 0xFB: Additional white point data. 2Ã 5-byte descriptors, padded with 0A 20 20. + 0xFA: Additional standard timing identifiers. 6Ã 2-byte descriptors, padded with 0A + */ +struct edid_wp_desc { + u8 index; + u8 least; + u8 x; + u8 y; + u8 gamma; +} PACKED; + +struct edid_white_point { + u8 header[5]; + struct edid_wp_desc desc[2]; + u8 padding[3]; +} PACKED; + +struct edid_additional_timing { + u8 header[5]; + u16 standard_timing[6]; + u8 padding; +} PACKED; + +union edid_descriptors { + struct edid_detailed_timing dtd; + struct edid_monitor_range_limit mrld; + struct edid_monitor_text mtxtd; + struct edid_white_point wpd; + struct edid_additional_timing astd; +} PACKED; + +struct edid_info { + u8 header[8]; + u16 vendor; + u16 product; + u32 serial; + u8 week; + u8 year; + u8 major_version; + u8 minor_version; + u8 video_setup; + u8 screen_width; + u8 screen_height; + u8 gamma; + u8 feature_flag; + u8 least_chromaticity[2]; + u8 most_chromaticity[8]; + u8 established_timing[3]; + u16 standard_timing[8]; + union edid_descriptors desc[4]; + u8 extensions; + u8 checksum; +} PACKED; + +/* EDID Standard Timing Description */ + +/* First byte: X resolution, divided by 8, less 31 (256â2288 pixels) */ +/* bit 7-6, X:Y pixel ratio: 00=16:10; 01=4:3; 10=5:4; 11=16:9 */ +/* bit 5-0, Vertical frequency, less 60 (60â123 Hz), nop 01 01 in Big Endian*/ +#define EDID_STD_640x480_85Hz 0x5931 +#define EDID_STD_800x600_85Hz 0x5945 +#define EDID_STD_1024x768_85Hz 0x5961 +#define EDID_STD_1152x864_70Hz 0x4A71 +#define EDID_STD_1280x720_70Hz 0xCA81 +#define EDID_STD_1280x800_70Hz 0x0A81 +#define EDID_STD_1280x960_60Hz 0x4081 +#define EDID_STD_1280x1024_60Hz 0x8081 +#define EDID_STD_1440x900_60Hz 0x0095 +#define EDID_STD_1600x1200_60Hz 0x40A9 +#define EDID_STD_1600x900_60Hz 0xC0A9 +#define EDID_STD_1680x1050_60Hz 0x00B3 +#define EDID_STD_1920x1080_60Hz 0xC0D1 +#define EDID_STD_1920x1200_60Hz 0x00D1 +#define EDID_STD_NOP 0x0101 + +int bochs_get_ddc_capabilities(u16 unit); +int bochs_read_edid(u16 unit, u16 block, u16 seg, void *data); +#endif /* bochedid.h */ diff --git a/vgasrc/vgahw.h b/vgasrc/vgahw.h index 01d2609..130462c 100644 --- a/vgasrc/vgahw.h +++ b/vgasrc/vgahw.h @@ -8,6 +8,7 @@ #include "bochsvga.h" // bochsvga_set_mode #include "stdvga.h" // stdvga_set_mode #include "geodevga.h" // geodevga_init +#include "bochsedid.h" static inline struct vgamode_s *vgahw_find_mode(int mode) { if (CONFIG_VGA_CIRRUS) @@ -130,10 +131,14 @@ static inline int vgahw_restore_state(u16 seg, void *data, int states) { } static inline int vgahw_get_ddc_capabilities(u16 unit) { + if (CONFIG_VGA_BOCHS) + return bochs_get_ddc_capabilities(unit); return stdvga_get_ddc_capabilities(unit); } static inline int vgahw_read_edid(u16 unit, u16 block, u16 seg, void *data) { + if (CONFIG_VGA_BOCHS) + return bochs_read_edid(unit, block, seg, data); return stdvga_read_edid(unit, block, seg, data); } -- 1.7.9.5

3 4

[PATCH 1/3] vgasrc: Add skeleton for VBE function 15h (VBE/DDC Standard)
by Hiroshi Miura 18 Sep '12

18 Sep '12

posted in Wed Mar 7 03:41:06 CET 2012 Signed-off-by: Julian Pidancet <julian.pidancet(a)gmail.com> Signed-off-by: Hiroshi Miura <miurahr(a)linux.com> --- src/vbe.h | 5 +++++ vgasrc/stdvga.c | 11 +++++++++++ vgasrc/stdvga.h | 2 ++ vgasrc/vbe.c | 34 ++++++++++++++++++++++++++++++++++ vgasrc/vgahw.h | 8 ++++++++ 5 files changed, 60 insertions(+) diff --git a/src/vbe.h b/src/vbe.h index 386613c..b5aedc6 100644 --- a/src/vbe.h +++ b/src/vbe.h @@ -154,4 +154,9 @@ struct vbe_crtc_info { #define VBE_DIRECTCOLOR_COLOR_RAMP_PROGRAMMABLE 0x01 #define VBE_DIRECTCOLOR_RESERVED_BITS_AVAILABLE 0x02 +/* Display Data Channel (DDC) */ +#define VBE_DDC1_PROTOCOL_SUPPORTED 0x01 +#define VBE_DDC2_PROTOCOL_SUPPORTED 0x02 +#define VBE_DDC_BLANK_DURING_TRANSFER 0x04 + #endif diff --git a/vgasrc/stdvga.c b/vgasrc/stdvga.c index ae6c0be..270cd65 100644 --- a/vgasrc/stdvga.c +++ b/vgasrc/stdvga.c @@ -499,3 +499,14 @@ stdvga_init(void) return 0; } + +int stdvga_get_ddc_capabilities(u16 unit) +{ + return -1; +} + +int stdvga_read_edid(u16 unit, u16 block, u16 seg, void *data) +{ + return -1; +} + diff --git a/vgasrc/stdvga.h b/vgasrc/stdvga.h index c9a9ba1..e3bd447 100644 --- a/vgasrc/stdvga.h +++ b/vgasrc/stdvga.h @@ -108,5 +108,7 @@ int stdvga_save_state(u16 seg, void *data, int states); int stdvga_restore_state(u16 seg, void *data, int states); void stdvga_enable_video_addressing(u8 disable); int stdvga_init(void); +int stdvga_get_ddc_capabilities(u16 unit); +int stdvga_read_edid(u16 unit, u16 block, u16 seg, void *data); #endif // stdvga.h diff --git a/vgasrc/vbe.c b/vgasrc/vbe.c index 227a244..ed7c6ee 100644 --- a/vgasrc/vbe.c +++ b/vgasrc/vbe.c @@ -384,6 +384,39 @@ vbe_104f10(struct bregs *regs) } static void +vbe_104f15(struct bregs *regs) +{ + int ret; + u16 seg = regs->es; + void *data = (void *)(regs->di+0); + u16 unit = regs->cx; + u16 block = regs->dx; + + switch (regs->bl) { + case 0x00: /* Report VBE/DDC Capabilities */ + ret = vgahw_get_ddc_capabilities(unit); + if (ret < 0) + goto fail; + regs->bh = ret >> 8; /* Approx. time in seconds, rounded up, to transfer + one EDID block (128 bytes) */ + regs->bl = ret & 0xff; /* DDC level supported */ + break; + case 0x01: /* Read EDID */ + ret = vgahw_read_edid(unit, block, seg, data); + if (ret < 0) + goto fail; + break; + default: + goto fail; + } + regs->ax = 0x004f; + return; + +fail: + regs->ax = 0x014f; +} + +static void vbe_104fXX(struct bregs *regs) { debug_stub(regs); @@ -410,6 +443,7 @@ handle_104f(struct bregs *regs) case 0x08: vbe_104f08(regs); break; case 0x0a: vbe_104f0a(regs); break; case 0x10: vbe_104f10(regs); break; + case 0x15: vbe_104f15(regs); break; default: vbe_104fXX(regs); break; } } diff --git a/vgasrc/vgahw.h b/vgasrc/vgahw.h index 044cd32..01d2609 100644 --- a/vgasrc/vgahw.h +++ b/vgasrc/vgahw.h @@ -129,4 +129,12 @@ static inline int vgahw_restore_state(u16 seg, void *data, int states) { return stdvga_restore_state(seg, data, states); } +static inline int vgahw_get_ddc_capabilities(u16 unit) { + return stdvga_get_ddc_capabilities(unit); +} + +static inline int vgahw_read_edid(u16 unit, u16 block, u16 seg, void *data) { + return stdvga_read_edid(unit, block, seg, data); +} + #endif // vgahw.h -- 1.7.9.5

2 1

Re: [SeaBIOS] GeodeVGA global variable access
by Christian Gmeiner 17 Sep '12

17 Sep '12

everything works - feel free to commit :) Will rework my patches (VESA support and Flat Panel Support) and hope to send them during this week. Finally I will look into EDID. --- Christian Gmeiner, MSc 2012/9/16 Christian Gmeiner <christian.gmeiner(a)gmail.com>: > looks... fine... will comile it tomorrow in the office > > --- > Christian Gmeiner, MSc > > > 2012/9/16 Kevin O'Connor <kevin(a)koconnor.net>: >> Hi Christian, >> >> I just noticed that a recent Geode patch introduced global variables >> that are accessed without GET_GLOBAL/SET_VGA macros. This will cause >> random memory corruption. Please see the patch below. >> >> -Kevin >> >> >> From ef7f73fa23e42953932920d39f729df82605b2a8 Mon Sep 17 00:00:00 2001 >> From: Kevin O'Connor <kevin(a)koconnor.net> >> Date: Sun, 16 Sep 2012 13:24:30 -0400 >> Subject: [PATCH] geodevga: Access global variables using GET_GLOBAL/SET_VGA >> macros. >> To: seabios(a)seabios.org >> >> The vgabios runs in 16bit mode so all global variables must be >> accessed via macros. >> >> Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> >> --- >> vgasrc/geodevga.c | 76 ++++++++++++++++++++++++++++--------------------------- >> 1 file changed, 39 insertions(+), 37 deletions(-) >> >> diff --git a/vgasrc/geodevga.c b/vgasrc/geodevga.c >> index ed41be6..cf1382d 100644 >> --- a/vgasrc/geodevga.c >> +++ b/vgasrc/geodevga.c >> @@ -86,55 +86,58 @@ static void geode_mem_mask(u32 addr, u32 off, u32 or) >> ); >> } >> >> -/**************************************************************** >> - * Helper functions >> - ****************************************************************/ >> - >> -struct geode { >> - u32 fb; >> - u32 dc; >> - u32 vp; >> -}; >> -struct geode geode VAR16; >> +static u32 GeodeFB VAR16; >> +static u32 GeodeDC VAR16; >> +static u32 GeodeVP VAR16; >> >> static u32 geode_dc_read(int reg) >> { >> - u32 val = geode_mem_read(geode.dc + reg); >> - dprintf(4, "%s(0x%08x) = 0x%08x\n", __func__, geode.dc + reg, val); >> + u32 val = geode_mem_read(GET_GLOBAL(GeodeDC) + reg); >> + dprintf(4, "%s(0x%08x) = 0x%08x\n" >> + , __func__, GET_GLOBAL(GeodeDC) + reg, val); >> return val; >> } >> >> static void geode_dc_write(int reg, u32 val) >> { >> - dprintf(4, "%s(0x%08x, 0x%08x)\n", __func__, geode.dc + reg, val); >> - geode_mem_mask(geode.dc + reg, ~0, val); >> + dprintf(4, "%s(0x%08x, 0x%08x)\n" >> + , __func__, GET_GLOBAL(GeodeDC) + reg, val); >> + geode_mem_mask(GET_GLOBAL(GeodeDC) + reg, ~0, val); >> } >> >> static void geode_dc_mask(int reg, u32 off, u32 on) >> { >> - dprintf(4, "%s(0x%08x, 0x%08x, 0x%08x)\n", __func__, geode.dc + reg, off, on); >> - geode_mem_mask(geode.dc + reg, off, on); >> + dprintf(4, "%s(0x%08x, 0x%08x, 0x%08x)\n" >> + , __func__, GET_GLOBAL(GeodeDC) + reg, off, on); >> + geode_mem_mask(GET_GLOBAL(GeodeDC) + reg, off, on); >> } >> >> static u32 geode_vp_read(int reg) >> { >> - u32 val = geode_mem_read(geode.vp + reg); >> - dprintf(4, "%s(0x%08x) = 0x%08x\n", __func__, geode.vp + reg, val); >> + u32 val = geode_mem_read(GET_GLOBAL(GeodeVP) + reg); >> + dprintf(4, "%s(0x%08x) = 0x%08x\n" >> + , __func__, GET_GLOBAL(GeodeVP) + reg, val); >> return val; >> } >> >> static void geode_vp_write(int reg, u32 val) >> { >> - dprintf(4, "%s(0x%08x, 0x%08x)\n", __func__, geode.vp + reg, val); >> - geode_mem_mask(geode.vp + reg, ~0, val); >> + dprintf(4, "%s(0x%08x, 0x%08x)\n" >> + , __func__, GET_GLOBAL(GeodeVP) + reg, val); >> + geode_mem_mask(GET_GLOBAL(GeodeVP) + reg, ~0, val); >> } >> >> static void geode_vp_mask(int reg, u32 off, u32 on) >> { >> - dprintf(4, "%s(0x%08x, 0x%08x, 0x%08x)\n", __func__, geode.vp + reg, off, on); >> - geode_mem_mask(geode.vp + reg, off, on); >> + dprintf(4, "%s(0x%08x, 0x%08x, 0x%08x)\n" >> + , __func__, GET_GLOBAL(GeodeVP) + reg, off, on); >> + geode_mem_mask(GET_GLOBAL(GeodeVP) + reg, off, on); >> } >> >> +/**************************************************************** >> + * Helper functions >> + ****************************************************************/ >> + >> static int legacyio_check(void) >> { >> int ret=0; >> @@ -199,10 +202,9 @@ static void dc_setup(void) >> geode_dc_write(DC_CURS_ST_OFFSET, 0x0); >> >> /* read fb-bar from pci, then point dc to the fb base */ >> - u32 dc_fb = geode_dc_read(DC_GLIU0_MEM_OFFSET); >> - if (geode.fb != dc_fb) { >> - geode_dc_write(DC_GLIU0_MEM_OFFSET, geode.fb); >> - } >> + u32 fb = GET_GLOBAL(GeodeFB); >> + if (geode_dc_read(DC_GLIU0_MEM_OFFSET) != fb) >> + geode_dc_write(DC_GLIU0_MEM_OFFSET, fb); >> >> geode_dc_mask(DC_DISPLAY_CFG, ~DC_CFG_MSK, DC_GDEN|DC_TRUP); >> geode_dc_write(DC_GENERAL_CFG, DC_VGAE); >> @@ -210,10 +212,10 @@ static void dc_setup(void) >> geode_dc_write(DC_UNLOCK, DC_LOCK_LOCK); >> >> u32 fb_size = framebuffer_size(); // in byte >> - dprintf(1, "%d KB of video memory at 0x%08x\n", fb_size / 1024, geode.fb); >> + dprintf(1, "%d KB of video memory at 0x%08x\n", fb_size / 1024, fb); >> >> /* update VBE variables */ >> - SET_VGA(VBE_framebuffer, geode.fb); >> + SET_VGA(VBE_framebuffer, fb); >> SET_VGA(VBE_total_memory, fb_size / 1024 / 64); // number of 64K blocks >> } >> >> @@ -335,16 +337,16 @@ int geodevga_init(void) >> if (GET_GLOBAL(VgaBDF) < 0) >> // Device should be at 00:01.1 >> SET_VGA(VgaBDF, pci_to_bdf(0, 1, 1)); >> - >> + >> // setup geode struct which is used for register access >> - geode.fb = pci_config_readl(GET_GLOBAL(VgaBDF), PCI_BASE_ADDRESS_0); >> - geode.dc = pci_config_readl(GET_GLOBAL(VgaBDF), PCI_BASE_ADDRESS_2); >> - geode.vp = pci_config_readl(GET_GLOBAL(VgaBDF), PCI_BASE_ADDRESS_3); >> - >> - dprintf(1, "fb addr: 0x%08x\n", geode.fb); >> - dprintf(1, "dc addr: 0x%08x\n", geode.dc); >> - dprintf(1, "vp addr: 0x%08x\n", geode.vp); >> - >> + SET_VGA(GeodeFB, pci_config_readl(GET_GLOBAL(VgaBDF), PCI_BASE_ADDRESS_0)); >> + SET_VGA(GeodeDC, pci_config_readl(GET_GLOBAL(VgaBDF), PCI_BASE_ADDRESS_2)); >> + SET_VGA(GeodeVP, pci_config_readl(GET_GLOBAL(VgaBDF), PCI_BASE_ADDRESS_3)); >> + >> + dprintf(1, "fb addr: 0x%08x\n", GET_GLOBAL(GeodeFB)); >> + dprintf(1, "dc addr: 0x%08x\n", GET_GLOBAL(GeodeDC)); >> + dprintf(1, "vp addr: 0x%08x\n", GET_GLOBAL(GeodeVP)); >> + >> vp_setup(); >> dc_setup(); >> >> -- >> 1.7.11.4 >>

1 0

Re: [SeaBIOS] (no subject)
by Gerd Hoffmann 17 Sep '12

17 Sep '12

On 09/13/12 22:12, Jason Baron wrote: > +void mch_mem_addr_init(struct pci_device *dev, void *arg) > +{ > + struct pci_mem_addr *addr = arg; > + u64 s, e; > + > +#if BUILD_MAX_HIGHMEM != 0xe0000000 > +# error "please adjust memory mapping area" > +#endif > + > + /* > + * BUILD_MAX_HIGHMEM == 0xe0000000 > + * [0xe000 0000, 0xf000 0000) for MCFG > + * 4GB - 512MB, 4GB - 256MB > + * [0xf000 0000, 0xfec0 0000) for DMI interface(subtractive decode) > + * 4GB - 256MB, 4GB - 20MB > + */ > + s = BUILD_MAX_HIGHMEM + 256 * 1024 * 1024; > + e = s + 128 * 1024 * 1024 - 1; > + *(addr->pcimem_start) = s; > + *(addr->pcimem_end) = e; > +} This must be adapted too to not hard-code things. cheers, Gerd

2 2

GeodeVGA global variable access
by Kevin O'Connor 16 Sep '12

16 Sep '12

Hi Christian, I just noticed that a recent Geode patch introduced global variables that are accessed without GET_GLOBAL/SET_VGA macros. This will cause random memory corruption. Please see the patch below. -Kevin >From ef7f73fa23e42953932920d39f729df82605b2a8 Mon Sep 17 00:00:00 2001 From: Kevin O'Connor <kevin(a)koconnor.net> Date: Sun, 16 Sep 2012 13:24:30 -0400 Subject: [PATCH] geodevga: Access global variables using GET_GLOBAL/SET_VGA macros. To: seabios(a)seabios.org The vgabios runs in 16bit mode so all global variables must be accessed via macros. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- vgasrc/geodevga.c | 76 ++++++++++++++++++++++++++++--------------------------- 1 file changed, 39 insertions(+), 37 deletions(-) diff --git a/vgasrc/geodevga.c b/vgasrc/geodevga.c index ed41be6..cf1382d 100644 --- a/vgasrc/geodevga.c +++ b/vgasrc/geodevga.c @@ -86,55 +86,58 @@ static void geode_mem_mask(u32 addr, u32 off, u32 or) ); } -/**************************************************************** - * Helper functions - ****************************************************************/ - -struct geode { - u32 fb; - u32 dc; - u32 vp; -}; -struct geode geode VAR16; +static u32 GeodeFB VAR16; +static u32 GeodeDC VAR16; +static u32 GeodeVP VAR16; static u32 geode_dc_read(int reg) { - u32 val = geode_mem_read(geode.dc + reg); - dprintf(4, "%s(0x%08x) = 0x%08x\n", __func__, geode.dc + reg, val); + u32 val = geode_mem_read(GET_GLOBAL(GeodeDC) + reg); + dprintf(4, "%s(0x%08x) = 0x%08x\n" + , __func__, GET_GLOBAL(GeodeDC) + reg, val); return val; } static void geode_dc_write(int reg, u32 val) { - dprintf(4, "%s(0x%08x, 0x%08x)\n", __func__, geode.dc + reg, val); - geode_mem_mask(geode.dc + reg, ~0, val); + dprintf(4, "%s(0x%08x, 0x%08x)\n" + , __func__, GET_GLOBAL(GeodeDC) + reg, val); + geode_mem_mask(GET_GLOBAL(GeodeDC) + reg, ~0, val); } static void geode_dc_mask(int reg, u32 off, u32 on) { - dprintf(4, "%s(0x%08x, 0x%08x, 0x%08x)\n", __func__, geode.dc + reg, off, on); - geode_mem_mask(geode.dc + reg, off, on); + dprintf(4, "%s(0x%08x, 0x%08x, 0x%08x)\n" + , __func__, GET_GLOBAL(GeodeDC) + reg, off, on); + geode_mem_mask(GET_GLOBAL(GeodeDC) + reg, off, on); } static u32 geode_vp_read(int reg) { - u32 val = geode_mem_read(geode.vp + reg); - dprintf(4, "%s(0x%08x) = 0x%08x\n", __func__, geode.vp + reg, val); + u32 val = geode_mem_read(GET_GLOBAL(GeodeVP) + reg); + dprintf(4, "%s(0x%08x) = 0x%08x\n" + , __func__, GET_GLOBAL(GeodeVP) + reg, val); return val; } static void geode_vp_write(int reg, u32 val) { - dprintf(4, "%s(0x%08x, 0x%08x)\n", __func__, geode.vp + reg, val); - geode_mem_mask(geode.vp + reg, ~0, val); + dprintf(4, "%s(0x%08x, 0x%08x)\n" + , __func__, GET_GLOBAL(GeodeVP) + reg, val); + geode_mem_mask(GET_GLOBAL(GeodeVP) + reg, ~0, val); } static void geode_vp_mask(int reg, u32 off, u32 on) { - dprintf(4, "%s(0x%08x, 0x%08x, 0x%08x)\n", __func__, geode.vp + reg, off, on); - geode_mem_mask(geode.vp + reg, off, on); + dprintf(4, "%s(0x%08x, 0x%08x, 0x%08x)\n" + , __func__, GET_GLOBAL(GeodeVP) + reg, off, on); + geode_mem_mask(GET_GLOBAL(GeodeVP) + reg, off, on); } +/**************************************************************** + * Helper functions + ****************************************************************/ + static int legacyio_check(void) { int ret=0; @@ -199,10 +202,9 @@ static void dc_setup(void) geode_dc_write(DC_CURS_ST_OFFSET, 0x0); /* read fb-bar from pci, then point dc to the fb base */ - u32 dc_fb = geode_dc_read(DC_GLIU0_MEM_OFFSET); - if (geode.fb != dc_fb) { - geode_dc_write(DC_GLIU0_MEM_OFFSET, geode.fb); - } + u32 fb = GET_GLOBAL(GeodeFB); + if (geode_dc_read(DC_GLIU0_MEM_OFFSET) != fb) + geode_dc_write(DC_GLIU0_MEM_OFFSET, fb); geode_dc_mask(DC_DISPLAY_CFG, ~DC_CFG_MSK, DC_GDEN|DC_TRUP); geode_dc_write(DC_GENERAL_CFG, DC_VGAE); @@ -210,10 +212,10 @@ static void dc_setup(void) geode_dc_write(DC_UNLOCK, DC_LOCK_LOCK); u32 fb_size = framebuffer_size(); // in byte - dprintf(1, "%d KB of video memory at 0x%08x\n", fb_size / 1024, geode.fb); + dprintf(1, "%d KB of video memory at 0x%08x\n", fb_size / 1024, fb); /* update VBE variables */ - SET_VGA(VBE_framebuffer, geode.fb); + SET_VGA(VBE_framebuffer, fb); SET_VGA(VBE_total_memory, fb_size / 1024 / 64); // number of 64K blocks } @@ -335,16 +337,16 @@ int geodevga_init(void) if (GET_GLOBAL(VgaBDF) < 0) // Device should be at 00:01.1 SET_VGA(VgaBDF, pci_to_bdf(0, 1, 1)); - + // setup geode struct which is used for register access - geode.fb = pci_config_readl(GET_GLOBAL(VgaBDF), PCI_BASE_ADDRESS_0); - geode.dc = pci_config_readl(GET_GLOBAL(VgaBDF), PCI_BASE_ADDRESS_2); - geode.vp = pci_config_readl(GET_GLOBAL(VgaBDF), PCI_BASE_ADDRESS_3); - - dprintf(1, "fb addr: 0x%08x\n", geode.fb); - dprintf(1, "dc addr: 0x%08x\n", geode.dc); - dprintf(1, "vp addr: 0x%08x\n", geode.vp); - + SET_VGA(GeodeFB, pci_config_readl(GET_GLOBAL(VgaBDF), PCI_BASE_ADDRESS_0)); + SET_VGA(GeodeDC, pci_config_readl(GET_GLOBAL(VgaBDF), PCI_BASE_ADDRESS_2)); + SET_VGA(GeodeVP, pci_config_readl(GET_GLOBAL(VgaBDF), PCI_BASE_ADDRESS_3)); + + dprintf(1, "fb addr: 0x%08x\n", GET_GLOBAL(GeodeFB)); + dprintf(1, "dc addr: 0x%08x\n", GET_GLOBAL(GeodeDC)); + dprintf(1, "vp addr: 0x%08x\n", GET_GLOBAL(GeodeVP)); + vp_setup(); dc_setup(); -- 1.7.11.4

2 1

Re: [SeaBIOS] Geode register functions
by Kevin O'Connor 16 Sep '12

16 Sep '12

On Sun, Sep 16, 2012 at 06:40:56PM +0200, Christian Gmeiner wrote: > 2012/9/15 Kevin O'Connor <kevin(a)koconnor.net>: > > On Sat, Sep 15, 2012 at 04:03:13PM +0200, Christian Gmeiner wrote: > >> 2012/9/11 Kevin O'Connor <kevin(a)koconnor.net>: > >> > On Mon, Sep 03, 2012 at 12:37:53PM -0400, Kevin O'Connor wrote: > >> >> It would be nice if the geode code could use the same style register > >> >> access functions that the stdvga code uses. I put together a patch > >> >> (totally untested) below. Is this okay? > >> >> > >> > FYI - I pushed this patch. > >> > >> something is wrong with this patch... or even logical :/ > > > > Indeed - the u64_u32 union was confusingly named. Does the patch > > below fix it for you? > > > > Yes works - hope you will commit this patch soon. Committed. -Kevin

1 0

Re: [SeaBIOS] Geode register functions
by Kevin O'Connor 16 Sep '12

16 Sep '12

On Sat, Sep 15, 2012 at 04:03:13PM +0200, Christian Gmeiner wrote: > 2012/9/11 Kevin O'Connor <kevin(a)koconnor.net>: > > On Mon, Sep 03, 2012 at 12:37:53PM -0400, Kevin O'Connor wrote: > >> It would be nice if the geode code could use the same style register > >> access functions that the stdvga code uses. I put together a patch > >> (totally untested) below. Is this okay? > >> > > FYI - I pushed this patch. > > something is wrong with this patch... or even logical :/ Indeed - the u64_u32 union was confusingly named. Does the patch below fix it for you? -Kevin >From 30e6af0dcd8d967c083311f3a105a68ac5e158e7 Mon Sep 17 00:00:00 2001 From: Kevin O'Connor <kevin(a)koconnor.net> Date: Sat, 15 Sep 2012 12:17:37 -0400 Subject: [PATCH] Fix 'union u64_u32_u' member names. To: seabios(a)seabios.org Use 'lo' to mean the low bits and 'hi' to mean the high bits of a 64bit value. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/byteorder.h | 2 +- src/farptr.h | 4 ++-- src/types.h | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/byteorder.h b/src/byteorder.h index 94e3a3b..5a8a64a 100644 --- a/src/byteorder.h +++ b/src/byteorder.h @@ -17,8 +17,8 @@ static inline u32 __swab32(u32 val) { static inline u64 __swab64(u64 val) { union u64_u32_u i, o; i.val = val; - o.hi = __swab32(i.lo); o.lo = __swab32(i.hi); + o.hi = __swab32(i.lo); return o.val; } diff --git a/src/farptr.h b/src/farptr.h index 3a85c6b..5b6c5c1 100644 --- a/src/farptr.h +++ b/src/farptr.h @@ -26,8 +26,8 @@ extern u16 __segment_FS, __segment_GS; #define READ64_SEG(prefix, SEG, value, var) do { \ union u64_u32_u __value; \ union u64_u32_u *__r64_ptr = (union u64_u32_u *)&(var); \ - READ32_SEG(prefix, SEG, __value.hi, __r64_ptr->hi); \ READ32_SEG(prefix, SEG, __value.lo, __r64_ptr->lo); \ + READ32_SEG(prefix, SEG, __value.hi, __r64_ptr->hi); \ *(u64*)&(value) = __value.val; \ } while (0) #define WRITE8_SEG(prefix, SEG, var, value) \ @@ -44,8 +44,8 @@ extern u16 __segment_FS, __segment_GS; union u64_u32_u *__w64_ptr = (union u64_u32_u *)&(var); \ typeof(var) __value_tmp = (value); \ __value.val = *(u64*)&__value_tmp; \ - WRITE32_SEG(prefix, SEG, __w64_ptr->hi, __value.hi); \ WRITE32_SEG(prefix, SEG, __w64_ptr->lo, __value.lo); \ + WRITE32_SEG(prefix, SEG, __w64_ptr->hi, __value.hi); \ } while (0) // Macros for automatically choosing the appropriate memory size diff --git a/src/types.h b/src/types.h index b10f3b3..24b078e 100644 --- a/src/types.h +++ b/src/types.h @@ -17,7 +17,7 @@ typedef signed long long s64; typedef u32 size_t; union u64_u32_u { - struct { u32 hi, lo; }; + struct { u32 lo, hi; }; u64 val; }; -- 1.7.11.4

2 1

[PATCH 3/3] bochsvga: validate EDID resolution in init
by Hiroshi Miura 16 Sep '12

16 Sep '12

As same as bochsvga that init code disables modes that is larger than max_{x|y}res, bochsedid also disables STD_EDID that is larger than max_{x|y}res. The int15h returns largest and smaller edid mode than MAX_XRES, MAX_YRES. Signed-off-by: Hiroshi Miura <miurahr(a)linux.com> --- vgasrc/bochsedid.c | 74 ++++++++++++++++++++++++++++++++++++++++++++-------- vgasrc/bochsedid.h | 6 +++++ vgasrc/bochsvga.c | 6 ++++- 3 files changed, 74 insertions(+), 12 deletions(-) diff --git a/vgasrc/bochsedid.c b/vgasrc/bochsedid.c index 5a40593..022a850 100644 --- a/vgasrc/bochsedid.c +++ b/vgasrc/bochsedid.c @@ -20,6 +20,26 @@ int bochs_get_ddc_capabilities(u16 unit) u8 most_chromaticity[8] VAR16 = {0xA6,0x55,0x48,0x9B,0x26,0x12,0x50,0x54}; unsigned char vgabios_name[] VAR16 = "Sea VGABIOS"; +static struct bochs_edid_mode { + u16 mode; + u16 width; + u16 height; + u8 ratio; +} bochs_edid_modes[] VAR16 = { +{EDID_STD_1920x1200_60Hz,1920,1200, EDID_STD_RATIO_16_10}, +{EDID_STD_1920x1080_60Hz,1920,1080, EDID_STD_RATIO_16_9}, +{EDID_STD_1680x1050_60Hz,1680,1050, EDID_STD_RATIO_16_10}, +{EDID_STD_1600x1200_60Hz,1600,1200, EDID_STD_RATIO_4_3}, +{EDID_STD_1600x900_60Hz, 1600, 900, EDID_STD_RATIO_16_9}, +{EDID_STD_1440x900_60Hz, 1440, 900, EDID_STD_RATIO_16_10}, +{EDID_STD_1280x1024_60Hz,1280,1024, EDID_STD_RATIO_5_4}, +{EDID_STD_1280x960_60Hz, 1280, 960, EDID_STD_RATIO_4_3}, +{EDID_STD_1152x864_70Hz, 1152, 864, EDID_STD_RATIO_4_3}, +{EDID_STD_1024x768_85Hz, 1024, 768, EDID_STD_RATIO_4_3}, +{EDID_STD_800x600_85Hz, 800, 600, EDID_STD_RATIO_4_3}, +{EDID_STD_640x480_85Hz, 640, 480, EDID_STD_RATIO_4_3} +}; + struct edid_detailed_timing edid_dtd_1280x1024 VAR16 = { 0x2a30, 0x00, 0x98, 0x51, 0x00, 0x2A, 0x40, 0x30, 0x70, 0x13, 0x00, 0x2C, 0xE1, 0x10, @@ -47,6 +67,22 @@ struct edid_monitor_range_limit edid_range_limit VAR16 = { 0x20,0x20 /* padding */ }; +u16 max_xres VAR16, max_yres VAR16; + +void bochs_validate_edid_resolutions(u16 xres, u16 yres) { + struct bochs_edid_mode *m = bochs_edid_modes; + for (; m < &bochs_edid_modes[ARRAY_SIZE(bochs_edid_modes)]; m++){ + u16 width = GET_GLOBAL(m->width); + u16 height = GET_GLOBAL(m->height); + if (width > xres || height > yres) { + dprintf(1, "Removing edid mode %x\n", GET_GLOBAL(m->mode)); + SET_VGA(m->mode, EDID_STD_NOP); + } + } + SET_VGA(max_xres, xres); + SET_VGA(max_yres, yres); +} + int bochs_read_edid_block0(u16 unit, u16 block, u16 seg, void *data, u8 next) { struct edid_info *info = data; @@ -90,18 +126,33 @@ int bochs_read_edid_block0(u16 unit, u16 block, u16 seg, void *data, u8 next) /* 720x400@70Hz, 720x400@88Hz, 640x480@60Hz, 640x480@67Hz, 640x480@72Hz, 640x480@75Hz, 800x600@56Hz, 800x600@60Hz, 800x600@72Hz, 800x600@75Hz, 832x624@75Hz, 1152x870@75Hz, not 1024x768@87Hz(I), 1024x768@60Hz, 1024x768@70Hz, 1024x768@75Hz, 1280x1024@75Hz */ + /* standard timings */ - SET_FARVAR(seg, info->standard_timing[0], EDID_STD_640x480_85Hz); - SET_FARVAR(seg, info->standard_timing[1], EDID_STD_800x600_85Hz); - SET_FARVAR(seg, info->standard_timing[2], EDID_STD_1024x768_85Hz); - SET_FARVAR(seg, info->standard_timing[3], EDID_STD_1280x720_70Hz); - SET_FARVAR(seg, info->standard_timing[4], EDID_STD_1280x960_60Hz); - SET_FARVAR(seg, info->standard_timing[5], EDID_STD_1440x900_60Hz); - SET_FARVAR(seg, info->standard_timing[6], EDID_STD_1600x1200_60Hz); - SET_FARVAR(seg, info->standard_timing[7], EDID_STD_NOP); - /* detailed timing blocks */ - memcpy_far(seg, &(info->desc[0].dtd), get_global_seg(), &edid_dtd_1600x1200, - sizeof (edid_dtd_1600x1200)); + struct bochs_edid_mode *m = bochs_edid_modes; + for (i = 0; (i < 8) && (m < &bochs_edid_modes[ARRAY_SIZE(bochs_edid_modes)]); m++){ + if (GET_GLOBAL(m->mode) != EDID_STD_NOP) { + SET_FARVAR(seg, info->standard_timing[i], GET_GLOBAL(m->mode)); + i++; + } + } + for (; i < 8; i++) { /* if rest, fill with NOP */ + SET_FARVAR(seg, info->standard_timing[i], EDID_STD_NOP); + } + /* detailed timing block */ + /* select one that is largest and lower than max_xres */ + if (GET_GLOBAL(max_xres) < 1280) { + memcpy_far(seg, &(info->desc[0].dtd), get_global_seg(), &edid_dtd_1152x864, + sizeof (struct edid_detailed_timing)); + } else if (GET_GLOBAL(max_xres) < 1600) { + memcpy_far(seg, &(info->desc[0].dtd), get_global_seg(), &edid_dtd_1280x1024, + sizeof (struct edid_detailed_timing)); + } else if (GET_GLOBAL(max_xres) >= 1600 && GET_GLOBAL(max_xres) < 1920) { + memcpy_far(seg, &(info->desc[0].dtd), get_global_seg(), &edid_dtd_1600x1200, + sizeof (struct edid_detailed_timing)); + } else { + memcpy_far(seg, &(info->desc[0].dtd), get_global_seg(), &edid_dtd_1920x1200, + sizeof (struct edid_detailed_timing)); + } /* monitor range */ memcpy_far(seg, &(info->desc[1].mrld), get_global_seg(), &edid_range_limit, sizeof(edid_range_limit)); @@ -145,3 +196,4 @@ int bochs_read_edid(u16 unit, u16 block, u16 seg, void *data) return -1; } } + diff --git a/vgasrc/bochsedid.h b/vgasrc/bochsedid.h index 0f925df..8f82316 100644 --- a/vgasrc/bochsedid.h +++ b/vgasrc/bochsedid.h @@ -131,6 +131,12 @@ struct edid_info { #define EDID_STD_1920x1200_60Hz 0x00D1 #define EDID_STD_NOP 0x0101 +#define EDID_STD_RATIO_16_10 (1) +#define EDID_STD_RATIO_4_3 (1 << 1) +#define EDID_STD_RATIO_5_4 (1 << 2) +#define EDID_STD_RATIO_16_9 (1 << 3) + +void bochs_validate_edid_resolutions(u16 xres, u16 yres); int bochs_get_ddc_capabilities(u16 unit); int bochs_read_edid(u16 unit, u16 block, u16 seg, void *data); #endif /* bochedid.h */ diff --git a/vgasrc/bochsvga.c b/vgasrc/bochsvga.c index 2a8aeb1..9fcbdae 100644 --- a/vgasrc/bochsvga.c +++ b/vgasrc/bochsvga.c @@ -369,12 +369,14 @@ bochsvga_init(void) dprintf(1, "VBE DISPI: lfb_addr=%x, size %d MB\n", lfb_addr, totalmem >> 20); - // Validate modes + // Validate modes and edid resolutions u16 en = dispi_read(VBE_DISPI_INDEX_ENABLE); dispi_write(VBE_DISPI_INDEX_ENABLE, en | VBE_DISPI_GETCAPS); u16 max_xres = dispi_read(VBE_DISPI_INDEX_XRES); + u16 max_yres = dispi_read(VBE_DISPI_INDEX_YRES); u16 max_bpp = dispi_read(VBE_DISPI_INDEX_BPP); dispi_write(VBE_DISPI_INDEX_ENABLE, en); + /* modes */ struct bochsvga_mode *m = bochsvga_modes; for (; m < &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)]; m++) { u16 width = GET_GLOBAL(m->info.width); @@ -388,6 +390,8 @@ bochsvga_init(void) SET_VGA(m->mode, 0xffff); } } + /* edid resolutions */ + bochs_validate_edid_resolutions(max_xres, max_yres); return 0; } -- 1.7.9.5

1 0

[PATCH 0/3] EDID support for vgabios (take3)
by Hiroshi Miura 16 Sep '12

16 Sep '12

Rework of EDID support in bochs vgabios (take3) Now remove selection of preferred mode. There only validate modes against MAX_XRES, YRES as same as bochsvga_init doing. Hiroshi Miura (3): vgasrc: Add skeleton for VBE function 15h (VBE/DDC Standard) bochsvga: Implement vbe 15h function bochsvga: validate EDID resolution in init Makefile | 3 +- src/vbe.h | 5 ++ vgasrc/bochsedid.c | 199 ++++++++++++++++++++++++++++++++++++++++++++++++++++ vgasrc/bochsedid.h | 142 +++++++++++++++++++++++++++++++++++++ vgasrc/bochsvga.c | 6 +- vgasrc/stdvga.c | 11 +++ vgasrc/stdvga.h | 2 + vgasrc/vbe.c | 34 +++++++++ vgasrc/vgahw.h | 13 ++++ 9 files changed, 413 insertions(+), 2 deletions(-) create mode 100644 vgasrc/bochsedid.c create mode 100644 vgasrc/bochsedid.h -- 1.7.9.5

1 0

Geode register functions
by Kevin O'Connor 15 Sep '12

15 Sep '12

Hi Christian, It would be nice if the geode code could use the same style register access functions that the stdvga code uses. I put together a patch (totally untested) below. Is this okay? -Kevin >From f47461f455207b7384bb828831a084bd7811f19e Mon Sep 17 00:00:00 2001 Message-Id: <f47461f455207b7384bb828831a084bd7811f19e.1346690012.git.kevin(a)koconnor.net> In-Reply-To: <cover.1346690012.git.kevin(a)koconnor.net> References: <cover.1346690012.git.kevin(a)koconnor.net> From: Kevin O'Connor <kevin(a)koconnor.net> Date: Mon, 3 Sep 2012 12:32:01 -0400 Subject: [PATCH] Geode vga: Use standard format read/write_mask register functions. To: seabios(a)seabios.org Rework the Geode code to use the same style register accessors as the standard vga code. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- vgasrc/geodevga.c | 116 +++++++++++++++++++++++++++++------------------------- 1 file changed, 62 insertions(+), 54 deletions(-) diff --git a/vgasrc/geodevga.c b/vgasrc/geodevga.c index 35382d5..ed41be6 100644 --- a/vgasrc/geodevga.c +++ b/vgasrc/geodevga.c @@ -20,7 +20,7 @@ * MSR and High Mem access through VSA Virtual Register ****************************************************************/ -static union u64_u32_u geode_msrRead(u32 msrAddr) +static u64 geode_msr_read(u32 msrAddr) { union u64_u32_u val; asm __volatile__ ( @@ -33,11 +33,14 @@ static union u64_u32_u geode_msrRead(u32 msrAddr) : "c"(msrAddr) : "cc" ); - return val; + return val.val; } -static void geode_msrWrite(u32 msrAddr,u32 andhi, u32 andlo, u32 orhi, u32 orlo) +static void geode_msr_mask(u32 msrAddr, u64 off, u64 on) { + union u64_u32_u uand, uor; + uand.val = ~off; + uor.val = on; asm __volatile__ ( "push %%eax \n" "movw $0x0AC1C, %%dx \n" @@ -47,12 +50,12 @@ static void geode_msrWrite(u32 msrAddr,u32 andhi, u32 andlo, u32 orhi, u32 orlo) "pop %%eax \n" "outw %%ax, %%dx \n" : - : "c"(msrAddr), "S" (andhi), "D" (andlo), "b" (orhi), "a" (orlo) + : "c"(msrAddr), "S" (uand.hi), "D" (uand.lo), "b" (uor.hi), "a" (uor.lo) : "%edx","cc" ); } -static u32 geode_memRead(u32 addr) +static u32 geode_mem_read(u32 addr) { u32 val; asm __volatile__ ( @@ -69,7 +72,7 @@ static u32 geode_memRead(u32 addr) return val; } -static void geode_memWrite(u32 addr, u32 and, u32 or ) +static void geode_mem_mask(u32 addr, u32 off, u32 or) { asm __volatile__ ( "movw $0x0AC1C, %%dx \n" @@ -78,7 +81,7 @@ static void geode_memWrite(u32 addr, u32 and, u32 or ) "addb $2, %%dl \n" "outw %%ax, %%dx \n" : - : "b"(addr), "S" (and), "D" (or) + : "b"(addr), "S" (~off), "D" (or) : "%eax","cc" ); } @@ -94,50 +97,62 @@ struct geode { }; struct geode geode VAR16; -static u32 read_dc(int reg) +static u32 geode_dc_read(int reg) { - u32 val = geode_memRead(geode.dc + reg); + u32 val = geode_mem_read(geode.dc + reg); dprintf(4, "%s(0x%08x) = 0x%08x\n", __func__, geode.dc + reg, val); return val; } -static u32 read_vp(int reg) +static void geode_dc_write(int reg, u32 val) +{ + dprintf(4, "%s(0x%08x, 0x%08x)\n", __func__, geode.dc + reg, val); + geode_mem_mask(geode.dc + reg, ~0, val); +} + +static void geode_dc_mask(int reg, u32 off, u32 on) { - u32 val = geode_memRead(geode.vp + reg); + dprintf(4, "%s(0x%08x, 0x%08x, 0x%08x)\n", __func__, geode.dc + reg, off, on); + geode_mem_mask(geode.dc + reg, off, on); +} + +static u32 geode_vp_read(int reg) +{ + u32 val = geode_mem_read(geode.vp + reg); dprintf(4, "%s(0x%08x) = 0x%08x\n", __func__, geode.vp + reg, val); return val; } -static void write_dc(int reg, u32 val) +static void geode_vp_write(int reg, u32 val) { - dprintf(4, "%s(0x%08x, 0x%08x)\n", __func__, geode.dc + reg, val); - geode_memWrite(geode.dc + reg, 0x0, val); + dprintf(4, "%s(0x%08x, 0x%08x)\n", __func__, geode.vp + reg, val); + geode_mem_mask(geode.vp + reg, ~0, val); } -static void write_vp(int reg, u32 val) +static void geode_vp_mask(int reg, u32 off, u32 on) { - dprintf(4, "%s(0x%08x, 0x%08x)\n", __func__, geode.vp + reg, val); - geode_memWrite(geode.vp + reg, 0x0, val); + dprintf(4, "%s(0x%08x, 0x%08x, 0x%08x)\n", __func__, geode.vp + reg, off, on); + geode_mem_mask(geode.vp + reg, off, on); } static int legacyio_check(void) { int ret=0; - union u64_u32_u val; + u64 val; if (CONFIG_VGA_GEODEGX2) - val=geode_msrRead(GLIU0_P2D_BM_4); + val = geode_msr_read(GLIU0_P2D_BM_4); else - val=geode_msrRead(MSR_GLIU0_BASE4); - if (val.lo != 0x0A0fffe0) + val = geode_msr_read(MSR_GLIU0_BASE4); + if ((val & 0xffffffff) != 0x0A0fffe0) ret|=1; - val=geode_msrRead(GLIU0_IOD_BM_0); - if (val.lo != 0x3c0ffff0) + val = geode_msr_read(GLIU0_IOD_BM_0); + if ((val & 0xffffffff) != 0x3c0ffff0) ret|=2; - val=geode_msrRead(GLIU0_IOD_BM_1); - if (val.lo != 0x3d0ffff0) + val = geode_msr_read(GLIU0_IOD_BM_1); + if ((val & 0xffffffff) != 0x3d0ffff0) ret|=4; return ret; @@ -145,9 +160,6 @@ static int legacyio_check(void) static u32 framebuffer_size(void) { - u32 val; - union u64_u32_u msr; - /* We use the P2D_R0 msr to read out the number of pages. * One page has a size of 4k * @@ -156,12 +168,12 @@ static u32 framebuffer_size(void) * 19:0 PMIX Physical Memory Address Min * */ - msr = geode_msrRead(GLIU0_P2D_RO); + u64 msr = geode_msr_read(GLIU0_P2D_RO); - u32 pmax = ((msr.hi & 0xff) << 12) | ((msr.lo & 0xfff00000) >> 20); - u32 pmin = (msr.lo & 0x000fffff); - - val = pmax - pmin; + u32 pmax = (msr >> 20) & 0x000fffff; + u32 pmin = msr & 0x000fffff; + + u32 val = pmax - pmin; val += 1; /* The page size is 4k */ @@ -177,27 +189,25 @@ static u32 framebuffer_size(void) */ static void dc_setup(void) { - u32 dc_fb; - dprintf(2, "DC_SETUP\n"); - write_dc(DC_UNLOCK, DC_LOCK_UNLOCK); + geode_dc_write(DC_UNLOCK, DC_LOCK_UNLOCK); /* zero memory config */ - write_dc(DC_FB_ST_OFFSET, 0x0); - write_dc(DC_CB_ST_OFFSET, 0x0); - write_dc(DC_CURS_ST_OFFSET, 0x0); + geode_dc_write(DC_FB_ST_OFFSET, 0x0); + geode_dc_write(DC_CB_ST_OFFSET, 0x0); + geode_dc_write(DC_CURS_ST_OFFSET, 0x0); /* read fb-bar from pci, then point dc to the fb base */ - dc_fb = read_dc(DC_GLIU0_MEM_OFFSET); + u32 dc_fb = geode_dc_read(DC_GLIU0_MEM_OFFSET); if (geode.fb != dc_fb) { - write_dc(DC_GLIU0_MEM_OFFSET, geode.fb); + geode_dc_write(DC_GLIU0_MEM_OFFSET, geode.fb); } - geode_memWrite(geode.dc + DC_DISPLAY_CFG, DC_CFG_MSK, DC_GDEN+DC_TRUP); - write_dc(DC_GENERAL_CFG, DC_VGAE); + geode_dc_mask(DC_DISPLAY_CFG, ~DC_CFG_MSK, DC_GDEN|DC_TRUP); + geode_dc_write(DC_GENERAL_CFG, DC_VGAE); - write_dc(DC_UNLOCK, DC_LOCK_LOCK); + geode_dc_write(DC_UNLOCK, DC_LOCK_LOCK); u32 fb_size = framebuffer_size(); // in byte dprintf(1, "%d KB of video memory at 0x%08x\n", fb_size / 1024, geode.fb); @@ -215,30 +225,28 @@ static void dc_setup(void) */ static void vp_setup(void) { - u32 reg; - dprintf(2,"VP_SETUP\n"); /* set output to crt and RGB/YUV */ if (CONFIG_VGA_GEODEGX2) - geode_msrWrite(VP_MSR_CONFIG_GX2, ~0, ~0xf8, 0, 0); + geode_msr_mask(VP_MSR_CONFIG_GX2, 0xf8, 0); else - geode_msrWrite(VP_MSR_CONFIG_LX, ~0, ~0xf8, 0, 0); + geode_msr_mask(VP_MSR_CONFIG_LX, 0xf8, 0); /* Set mmio registers * there may be some timing issues here, the reads seem * to slow things down enough work reliably */ - reg = read_vp(VP_MISC); + u32 reg = geode_vp_read(VP_MISC); dprintf(1,"VP_SETUP VP_MISC=0x%08x\n",reg); - write_vp(VP_MISC, VP_BYP_BOTH); - reg = read_vp(VP_MISC); + geode_vp_write(VP_MISC, VP_BYP_BOTH); + reg = geode_vp_read(VP_MISC); dprintf(1,"VP_SETUP VP_MISC=0x%08x\n",reg); - reg = read_vp(VP_DCFG); + reg = geode_vp_read(VP_DCFG); dprintf(1,"VP_SETUP VP_DCFG=0x%08x\n",reg); - geode_memWrite(geode.vp + VP_DCFG, ~0,VP_CRT_EN+VP_HSYNC_EN+VP_VSYNC_EN+VP_DAC_BL_EN+VP_CRT_SKEW); - reg = read_vp(VP_DCFG); + geode_vp_mask(VP_DCFG, 0, VP_CRT_EN|VP_HSYNC_EN|VP_VSYNC_EN|VP_DAC_BL_EN|VP_CRT_SKEW); + reg = geode_vp_read(VP_DCFG); dprintf(1,"VP_SETUP VP_DCFG=0x%08x\n",reg); } -- 1.7.11.4

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