SeaBIOS

seabios@seabios.org

4 participants
3801 discussions

[PATCH 0/4] Unify and fix USB command timeouts.
by Kevin O'Connor 23 Jun '14

23 Jun '14

The SeaBIOS USB drivers all have different timeouts for USB commands. The USB specification does specify maximum command times (section 9.2.6). In particular, it states that all commands are expected to complete within 5 seconds. This series unifies the command timeouts across the drivers. Generally, the timeout is increased to 5 seconds for all commands. This fixes an issue reported by some users of USB flash drives on XHCI controllers (the xhci controller had a 1 second bulk timeout). The control command timeouts are also increased to 5 seconds except for the set_address command. This is reduced to 150ms (spec caps device to 50ms) to prevent 5 second hangs should a port report a device that isn't actually there. Once the driver starts talking to a device it would be very unusual to timeout on a command, so there shouldn't be any problem with a limit of five seconds. -Kevin Kevin O'Connor (4): xhci: Update the times for usb command timeouts. ehci: Update usb command timeouts to use usb_xfer_time() uhci: Update usb command timeouts to use usb_xfer_time() ohci: Update usb command timeouts to use usb_xfer_time() src/hw/usb-ehci.c | 11 ++++++----- src/hw/usb-ohci.c | 7 +++---- src/hw/usb-uhci.c | 13 ++++++------- src/hw/usb-xhci.c | 4 ++-- src/hw/usb.c | 13 +++++++++++++ src/hw/usb.h | 5 +++++ 6 files changed, 35 insertions(+), 18 deletions(-) -- 1.9.3

2 8

Re: [SeaBIOS] [PATCH 1/4] xhci: Update the times for usb command timeouts.
by Kevin O'Connor 22 Jun '14

22 Jun '14

On Sat, Jun 21, 2014 at 08:46:05PM +0200, Idwer Vollering wrote: > 2014-06-21 20:22 GMT+02:00 Kevin O'Connor <kevin(a)koconnor.net>: > > On Sat, Jun 21, 2014 at 01:15:25PM -0500, Matt DeVillier wrote: > >> On 6/21/2014 1:08 PM, Kevin O'Connor wrote: > (cut) > > I'm experiencing similar trouble booting off native XHCI hardware: > > SeaBIOS (version rel-1.7.5-20-g67fd42c-dirty-20140617_200600-ubuntu) > init usb > XHCI init on dev 00:10.0: regs @ 0xf0248000, 4 ports, 32 slots, 32 byte contexts > XHCI extcap 0x1 @ f0248500 > XHCI protocol USB 3.00, 2 ports (offset 1), def 0 > XHCI protocol USB 2.00, 2 ports (offset 3), def 0 > configure_xhci: resetting > xhci_hub_detect port #1: 0x000002a0, powered, pls 5, speed 0 [ - ] > xhci_hub_detect port #2: 0x000002a0, powered, pls 5, speed 0 [ - ] > xhci_hub_detect port #3: 0x000002a0, powered, pls 5, speed 0 [ - ] > xhci_hub_detect port #4: 0x000202e1, powered, pls 7, speed 0 [ - ] > xhci_hub_reset port #4: 0x000202e1, powered, pls 7, speed 0 [ - ] > XHCI port #4: 0x00200e03, powered, enabled, pls 0, speed 3 [High] > set_address 0x000ef720 > xhci_alloc_pipe: usbdev 0xbf0d37f0, ring 0xbf11fb00, slotid 0, epid 1 > xhci_cmd_enable_slot: > xhci_process_events: status change port #4 > xhci_process_events: status change port #2 > xhci_process_events: status change port #4 > xhci_alloc_pipe: enable slot: got slotid 1 > xhci_cmd_address_device: slotid 1 > WARNING - Timeout at xhci_event_wait:394! So, this looks different from Matt's report. What appears to be happening in the above is that the device shows up originally as a high speed device (see "[High]" above). However, when the set_address command is sent to it, it appears that the device effectively disconnects and then reconnects as a super speed device (see "change port #2" and "change port #4" above - port 2==port 4 - see ("offset 1" / "offset 3" above)). You can try increasing the xchi_event_wait timeout which fixes Matt's issue, but I think we tried this on your hardware before with no luck. SeaBIOS isn't coded to support new devices being attached dynamically, and this is really the limitation here. It's not so much an XHCI issue as it is a dynamic connection thing (SeaBIOS checks port 2, finds nothing, goes on to check port 4, finds a device there, that device goes away, a new device shows up on port 2, but SeaBIOS has already checked port 2 and wont check it again). It's possible to make this work in SeaBIOS, but it would require some restructuring of the USB code. Can you check if this happens to all super speed devices on your controller or just this device? Is the device bootable with the factory BIOS? I'm not sure if it's worthwhile to add lots of code if this is just limited to a single quirky device. -Kevin

2 1

Re: [SeaBIOS] [PATCH 1/4] xhci: Update the times for usb command timeouts.
by Kevin O'Connor 21 Jun '14

21 Jun '14

2 1

Re: [SeaBIOS] [PATCH 1/4] xhci: Update the times for usb command timeouts.
by Kevin O'Connor 21 Jun '14

21 Jun '14

On Sat, Jun 21, 2014 at 01:15:25PM -0500, Matt DeVillier wrote: > On 6/21/2014 1:08 PM, Kevin O'Connor wrote: > > On Sat, Jun 21, 2014 at 12:20:21PM -0500, Matt DeVillier wrote: > >> I still have issues with various USB sticks not being detected at > >> boot due to the xhci_event_wait() call in xhci_cmd_submit() which > >> still has a timeout of 1000ms (vs 5000 for the ones affected by this > >> patch). Manually setting it to 5000 fixes the issues with all the > >> USB flash devices I've tested (which had a problem at 1000ms) > > Thanks Matt. Can you post the SeaBIOS log with one of these devices? > > Can do - what would you like the logging level set to? Currently > have it set to 3, which produces the following: > > xhci_hub_reset port #2: 0x00020ae1, powered, pls 7, speed 2 [Low] > XHCI port #2: 0x00200a03, powered, enabled, pls 0, speed 2 [Low] > set_address 0x000ef720 > xhci_alloc_pipe: usbdev 0x7f7378d0, ring 0x7f781b00, slotid 0, epid 1 > xhci_cmd_enable_slot: > xhci_process_events: status change port #2 > xhci_process_events: status change port #3 > xhci_process_events: status change port #4 > xhci_process_events: status change port #2 > xhci_alloc_pipe: enable slot: got slotid 1 > xhci_cmd_address_device: slotid 1 > xhci_update_pipe: usbdev 0x7f7378d0, ring 0x7f781b00, slotid 1, epid 1 > config_usb: 0x7f781c20 > device rev=0110 cls=00 sub=00 proto=00 size=8 > xhci_update_pipe: usbdev 0x7f7378d0, ring 0x7f781b00, slotid 1, epid 1 > WARNING - Timeout at xhci_event_wait:394! > xhci_control: control xfer failed (cc -1) The above is fine. Can you also post 'lsusb -t' and 'lsusb -v' output for the device? I'll take a look later tonight. -Kevin

2 1

[Qemu-devel] [PATCH] hw/pci: reserve IO and mem for pci express downstream ports with no devices attached
by Marcel Apfelbaum 19 Jun '14

19 Jun '14

commit c6e298e1f12e0f4ca02b6da5e42919ae055f6830 hw/pci: reserve IO and mem for pci-2-pci bridges with no devices attached introduced support for hot-plugging devices behind pci-2-pci bridges. Extend hotplug support also for pci express downstream ports. Signed-off-by: Marcel Apfelbaum <marcel.a(a)redhat.com> --- src/fw/pciinit.c | 23 +++++++++++++++++++++-- src/hw/pci_regs.h | 2 ++ 2 files changed, 23 insertions(+), 2 deletions(-) diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c index 0ad548f..edb3fe9 100644 --- a/src/fw/pciinit.c +++ b/src/fw/pciinit.c @@ -636,6 +636,25 @@ pci_region_create_entry(struct pci_bus *bus, struct pci_device *dev, return entry; } +static int pci_bus_hotplug_support(struct pci_bus *bus) +{ + u8 shpc_cap = pci_find_capability(bus->bus_dev, PCI_CAP_ID_SHPC); + u8 pcie_cap = pci_find_capability(bus->bus_dev, PCI_CAP_ID_EXP); + int downstream_port = 0; + int slot_implemented = 0; + + if (pcie_cap) { + u16 pcie_flags = pci_config_readw(bus->bus_dev->bdf, + pcie_cap + PCI_EXP_FLAGS); + u16 port_type = ((pcie_flags & PCI_EXP_FLAGS_TYPE) >> + PCI_EXP_FLAGS_TYPE_SHIFT) & 0xf; + downstream_port = (port_type == PCI_EXP_TYPE_DOWNSTREAM) || + (port_type == PCI_EXP_TYPE_ROOT_PORT); + slot_implemented = !!(pcie_flags & PCI_EXP_FLAGS_SLOT); + } + return shpc_cap || (downstream_port && slot_implemented); +} + static int pci_bios_check_devices(struct pci_bus *busses) { dprintf(1, "PCI: check devices\n"); @@ -678,7 +697,7 @@ static int pci_bios_check_devices(struct pci_bus *busses) continue; struct pci_bus *parent = &busses[pci_bdf_to_bus(s->bus_dev->bdf)]; int type; - u8 shpc_cap = pci_find_capability(s->bus_dev, PCI_CAP_ID_SHPC); + int hotplug_support = pci_bus_hotplug_support(s); for (type = 0; type < PCI_REGION_TYPE_COUNT; type++) { u64 align = (type == PCI_REGION_TYPE_IO) ? PCI_BRIDGE_IO_MIN : PCI_BRIDGE_MEM_MIN; @@ -687,7 +706,7 @@ static int pci_bios_check_devices(struct pci_bus *busses) if (pci_region_align(&s->r[type]) > align) align = pci_region_align(&s->r[type]); u64 sum = pci_region_sum(&s->r[type]); - if (!sum && shpc_cap) + if (!sum && hotplug_support) sum = align; /* reserve min size for hot-plug */ u64 size = ALIGN(sum, align); int is64 = pci_bios_bridge_region_is64(&s->r[type], diff --git a/src/hw/pci_regs.h b/src/hw/pci_regs.h index e5effd4..6a71569 100644 --- a/src/hw/pci_regs.h +++ b/src/hw/pci_regs.h @@ -426,6 +426,8 @@ #define PCI_EXP_DEVCTL2 40 /* Device Control 2 */ #define PCI_EXP_DEVCTL2_ARI 0x20 /* Alternative Routing-ID */ +#define PCI_EXP_FLAGS_TYPE_SHIFT 4 + /* Extended Capabilities (PCI-X 2.0 and Express) */ #define PCI_EXT_CAP_ID(header) (header & 0x0000ffff) #define PCI_EXT_CAP_VER(header) ((header >> 16) & 0xf) -- 1.8.3.1

2 3

[PATCH v2] hw/pci: reserve IO and mem for pci express downstream ports with no devices attached
by Marcel Apfelbaum 19 Jun '14

19 Jun '14

commit c6e298e1f12e0f4ca02b6da5e42919ae055f6830 hw/pci: reserve IO and mem for pci-2-pci bridges with no devices attached introduced support for hot-plugging devices behind pci-2-pci bridges. Extend hotplug support also for pci express downstream ports. Signed-off-by: Marcel Apfelbaum <marcel.a(a)redhat.com> --- Wrong prefix on first patch src/fw/pciinit.c | 23 +++++++++++++++++++++-- src/hw/pci_regs.h | 2 ++ 2 files changed, 23 insertions(+), 2 deletions(-) diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c index 0ad548f..edb3fe9 100644 --- a/src/fw/pciinit.c +++ b/src/fw/pciinit.c @@ -636,6 +636,25 @@ pci_region_create_entry(struct pci_bus *bus, struct pci_device *dev, return entry; } +static int pci_bus_hotplug_support(struct pci_bus *bus) +{ + u8 shpc_cap = pci_find_capability(bus->bus_dev, PCI_CAP_ID_SHPC); + u8 pcie_cap = pci_find_capability(bus->bus_dev, PCI_CAP_ID_EXP); + int downstream_port = 0; + int slot_implemented = 0; + + if (pcie_cap) { + u16 pcie_flags = pci_config_readw(bus->bus_dev->bdf, + pcie_cap + PCI_EXP_FLAGS); + u16 port_type = ((pcie_flags & PCI_EXP_FLAGS_TYPE) >> + PCI_EXP_FLAGS_TYPE_SHIFT) & 0xf; + downstream_port = (port_type == PCI_EXP_TYPE_DOWNSTREAM) || + (port_type == PCI_EXP_TYPE_ROOT_PORT); + slot_implemented = !!(pcie_flags & PCI_EXP_FLAGS_SLOT); + } + return shpc_cap || (downstream_port && slot_implemented); +} + static int pci_bios_check_devices(struct pci_bus *busses) { dprintf(1, "PCI: check devices\n"); @@ -678,7 +697,7 @@ static int pci_bios_check_devices(struct pci_bus *busses) continue; struct pci_bus *parent = &busses[pci_bdf_to_bus(s->bus_dev->bdf)]; int type; - u8 shpc_cap = pci_find_capability(s->bus_dev, PCI_CAP_ID_SHPC); + int hotplug_support = pci_bus_hotplug_support(s); for (type = 0; type < PCI_REGION_TYPE_COUNT; type++) { u64 align = (type == PCI_REGION_TYPE_IO) ? PCI_BRIDGE_IO_MIN : PCI_BRIDGE_MEM_MIN; @@ -687,7 +706,7 @@ static int pci_bios_check_devices(struct pci_bus *busses) if (pci_region_align(&s->r[type]) > align) align = pci_region_align(&s->r[type]); u64 sum = pci_region_sum(&s->r[type]); - if (!sum && shpc_cap) + if (!sum && hotplug_support) sum = align; /* reserve min size for hot-plug */ u64 size = ALIGN(sum, align); int is64 = pci_bios_bridge_region_is64(&s->r[type], diff --git a/src/hw/pci_regs.h b/src/hw/pci_regs.h index e5effd4..6a71569 100644 --- a/src/hw/pci_regs.h +++ b/src/hw/pci_regs.h @@ -426,6 +426,8 @@ #define PCI_EXP_DEVCTL2 40 /* Device Control 2 */ #define PCI_EXP_DEVCTL2_ARI 0x20 /* Alternative Routing-ID */ +#define PCI_EXP_FLAGS_TYPE_SHIFT 4 + /* Extended Capabilities (PCI-X 2.0 and Express) */ #define PCI_EXT_CAP_ID(header) (header & 0x0000ffff) #define PCI_EXT_CAP_VER(header) ((header >> 16) & 0xf) -- 1.8.3.1

1 0

[PATCH 00/10] build: Allow 32bit sections to be at fixed locations
by Kevin O'Connor 18 Jun '14

18 Jun '14

This series updates the build (and layoutrom.py in particular) to be more flexible in section layouts. Prior to this series, only code compiled in the 16bit mode pass could be placed at a fixed address in the f-segment. After this change, the build can more easily place sections from any compile pass. Most of the series consists of minor cleanups to layoutrom.py to make the above happen. Patch 4 is an unrelated minor feature enhancement. Otherwise, patches 7 and 10 are where the real changes occur. -Kevin Kevin O'Connor (10): build: Remove unused function getSectionsStart() from layoutrom.py. build: Extract section visiting logic in layoutrom.py. build: Refactor layoutrom.py gc() function. build: Use customized entry point for each type of build. build: Refactor findInit() function. build: Rework getRelocs() to use a hash instead of categories in layoutrom.py build: Keep segmented sections separate until final link step. build: Use fileid instead of category to write sections in layoutrom.py. build: Only export needed fields in LayoutInfo in layoutrom.py. build: Get fixed address variables from 32bit compile pass (not 16bit) Makefile | 13 +- scripts/layoutrom.py | 426 ++++++++++++++++++++++++--------------------------- src/entryfuncs.S | 6 - src/font.c | 2 +- src/misc.c | 18 +-- src/romlayout.S | 4 +- src/types.h | 8 +- 7 files changed, 224 insertions(+), 253 deletions(-) -- 1.9.3

1 11

Re: [SeaBIOS] [PATCH] Add SD card support
by Dave Frodin 13 Jun '14

13 Jun '14

Kevin, Marc suggested that I reword what are intent was/is. We view the SD patch as a starting point and that we would like to work with the community on getting it into seabios. I think that we could use help from yourself and David Woodhouse, who has expressed an interest in it, to improve and further develop the code. Thanks, Dave Frodin On Wed, Jun 11, 2014 at 1:37 PM, Dave Frodin <dave.frodin(a)se-eng.com> wrote: > Kevin, > Our intent at this time was to just get it out for others to see/use. > I'll try attaching the files. > > Thanks, > Dave > > > > On Tue, Jun 10, 2014 at 6:19 PM, Kevin O'Connor <kevin(a)koconnor.net> > wrote: > >> On Thu, Jun 05, 2014 at 10:36:07AM -0600, Dave Frodin wrote: >> > Paul, >> > >> > I'm resending the patch, supposedly as plain text. >> > Let me know if you still see a problem. >> > >> > Thanks, >> > Dave >> >> Thanks for posting this Dave. >> >> Is the intention to publish this, or to get this into SeaBIOS master? >> I think the patch will need a bit of work before it could be committed >> to upstream. >> >> [...] >> > + //@NOTE: This step appears to be unnecessary for booting from >> > the sd card as the pchs info does not get used... >> >> BTW, the patch still got corrupted. You might try gzipping it and >> then attaching the gzipped patch. >> >> -Kevin >> > >

1 0

Re: [SeaBIOS] [PATCH] Add SD card support
by Kevin O'Connor 11 Jun '14

11 Jun '14

On Thu, Jun 05, 2014 at 10:36:07AM -0600, Dave Frodin wrote: > Paul, > > I'm resending the patch, supposedly as plain text. > Let me know if you still see a problem. > > Thanks, > Dave Thanks for posting this Dave. Is the intention to publish this, or to get this into SeaBIOS master? I think the patch will need a bit of work before it could be committed to upstream. [...] > + //@NOTE: This step appears to be unnecessary for booting from > the sd card as the pchs info does not get used... BTW, the patch still got corrupted. You might try gzipping it and then attaching the gzipped patch. -Kevin

2 1

[PATCH] Abstract reset call (and possible 16bit mode switch) into reset() function.
by Kevin O'Connor 11 Jun '14

11 Jun '14

Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/boot.c | 5 +---- src/kbd.c | 2 +- src/stacks.c | 10 ++++++++++ src/stacks.h | 1 + src/util.h | 3 --- 5 files changed, 13 insertions(+), 8 deletions(-) diff --git a/src/boot.c b/src/boot.c index 9be8b2a..5837ad0 100644 --- a/src/boot.c +++ b/src/boot.c @@ -689,10 +689,7 @@ boot_fail(void) yield_toirq(); } printf("Rebooting.\n"); - struct bregs br; - memset(&br, 0, sizeof(br)); - br.code = SEGOFF(SEG_BIOS, (u32)reset_vector); - farcall16big(&br); + reset(); } // Determine next boot method and attempt a boot using it. diff --git a/src/kbd.c b/src/kbd.c index 33a95a3..3677a12 100644 --- a/src/kbd.c +++ b/src/kbd.c @@ -502,7 +502,7 @@ __process_key(u8 scancode) == (KF0_CTRLACTIVE|KF0_ALTACTIVE))) { // Ctrl+alt+del - reset machine. SET_BDA(soft_reset_flag, 0x1234); - reset_vector(); + reset(); } if (scancode >= ARRAY_SIZE(scan_to_scanascii)) { dprintf(1, "KBD: int09h_handler(): unknown scancode read: 0x%02x!\n" diff --git a/src/stacks.c b/src/stacks.c index beccc0f..df719fd 100644 --- a/src/stacks.c +++ b/src/stacks.c @@ -238,6 +238,16 @@ __call16_int(struct bregs *callregs, u16 offset) farcall16(callregs); } +// Reset the machine +void +reset(void) +{ + extern void reset_vector(void) __noreturn; + if (!MODESEGMENT) + call16(0, 0, reset_vector); + reset_vector(); +} + /**************************************************************** * Threads diff --git a/src/stacks.h b/src/stacks.h index d8584f2..22fb943 100644 --- a/src/stacks.h +++ b/src/stacks.h @@ -17,6 +17,7 @@ inline void __call16_int(struct bregs *callregs, u16 offset); extern void irq_trampoline_ ##nr (); \ __call16_int((callregs), (u32)&irq_trampoline_ ##nr ); \ } while (0) +void reset(void); extern struct thread_info MainThread; struct thread_info *getCurThread(void); void yield(void); diff --git a/src/util.h b/src/util.h index 8b078e8..ed90e03 100644 --- a/src/util.h +++ b/src/util.h @@ -217,9 +217,6 @@ void reloc_preinit(void *f, void *arg); // resume.c extern int HaveRunPost; -// romlayout.S -void reset_vector(void) __noreturn; - // serial.c void serial_setup(void); void lpt_setup(void); -- 1.9.3

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

SeaBIOS