SeaBIOS

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[PATCH] pmm: Fix entry point to support non-zero %ss
by Kevin O'Connor 30 Sep '14

30 Sep '14

If the pmm entry point was called with a non-zero stack segment, the pointer to the arguments on the stack would not be valid once the code transitioned to 32bit mode. Fix by adding the stack segment offset into the args pointer. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/romlayout.S | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/romlayout.S b/src/romlayout.S index a3ba965..028d1e8 100644 --- a/src/romlayout.S +++ b/src/romlayout.S @@ -321,10 +321,11 @@ entry_pmm: pushl %edx pushw %es pushw %ds - movw %ss, %cx // Move %ss to %ds + movl %ss, %ecx // Move %ss to %ds movw %cx, %ds + shll $4, %ecx movl $_cfunc32flat_handle_pmm, %eax // Setup: call32(handle_pmm, args, -1) - leal 28(%esp), %edx // %edx points to start of args + leal 28(%esp, %ecx), %edx // %edx points to start of args movl $-1, %ecx calll call32 movw %ax, 12(%esp) // Modify %ax:%dx to return %eax -- 1.9.3

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[PATCH] Revert "Use the extra stack for 16bit USB and PS2 keyboard/mouse commands."
by Kevin O'Connor 30 Sep '14

30 Sep '14

It's not valid to pass a pointer to a stack variable through the stack_hop() call (because the call changes the stack segment). This bug was probably not noticed before because by default (CONFIG_ENTRY_EXTRASTACK) SeaBIOS uses the extra stack on all 16bit entry points, and the internal stack_hop() with that config option is effectively a no-op. This reverts commit d488a7683d90bf8fae7ceb8c3ad9e95fbbd92079. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/kbd.c | 6 +++--- src/mouse.c | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/src/kbd.c b/src/kbd.c index 3677a12..a5a1ad9 100644 --- a/src/kbd.c +++ b/src/kbd.c @@ -11,7 +11,7 @@ #include "hw/ps2port.h" // ps2_kbd_command #include "hw/usb-hid.h" // usb_kbd_command #include "output.h" // debug_enter -#include "stacks.h" // stack_hop +#include "stacks.h" // yield #include "string.h" // memset #include "util.h" // kbd_init @@ -117,8 +117,8 @@ static int kbd_command(int command, u8 *param) { if (usb_kbd_active()) - return stack_hop(command, (u32)param, usb_kbd_command); - return stack_hop(command, (u32)param, ps2_kbd_command); + return usb_kbd_command(command, param); + return ps2_kbd_command(command, param); } // read keyboard input diff --git a/src/mouse.c b/src/mouse.c index 83e499d..6d1f5b7 100644 --- a/src/mouse.c +++ b/src/mouse.c @@ -10,7 +10,7 @@ #include "hw/ps2port.h" // ps2_mouse_command #include "hw/usb-hid.h" // usb_mouse_command #include "output.h" // dprintf -#include "stacks.h" // stack_hop +#include "stacks.h" // stack_hop_back #include "util.h" // mouse_init void @@ -27,8 +27,8 @@ static int mouse_command(int command, u8 *param) { if (usb_mouse_active()) - return stack_hop(command, (u32)param, usb_mouse_command); - return stack_hop(command, (u32)param, ps2_mouse_command); + return usb_mouse_command(command, param); + return ps2_mouse_command(command, param); } #define RET_SUCCESS 0x00 -- 1.9.3

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cbvga
by Marc Jones 30 Sep '14

30 Sep '14

I'm trying to use the cbvga after a coreboot has initialized graphics. It looks like everything is fine, but I don't get any seabios text on the screen. It seems that int10 isn't working. Grub is able to display fine. Does anyone know if Grub uses int10 or direct b8000 accress? Scan for VGA option rom Running option rom at c000:0003 Start SeaVGABIOS (version ?-20140929_231635-megaman) enter vga_post: a=00000000 b=0000ffff c=00000000 d=0000ffff ds=0000 es=f000 ss=0000 si=00000000 di=000087b0 bp=00000000 sp=00006e62 cs=f000 ip=d413 f=0000 coreboot vga init Found FB @ c0000000 1024x768 with 16 bpp (2048 stride) set VGA mode 140 Attempting to allocate VGA stack via pmm call to f000:d46a pmm call arg1=0 VGA stack allocated at ef590 Turning on vga text mode console set VGA mode 3 SeaBIOS (version ?-20140929_231635-megaman) Marc -- http://se-eng.com

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[PATCH] ehci: Fix bug in hub port assignment
by Kevin O'Connor 16 Sep '14

16 Sep '14

The usbdev->port field is zero indexed, while the USB spec expects the port values to start at one. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- This problem was causing intermittent detection failures with low speed devices on my c720. It seems that most hubs don't care about this field, as the code has never been correct but it hasn't shown up as a problem prior to now. (And even on the c720, it would still work much of the time.) This patch is also available for testing at: https://github.com/KevinOConnor/seabios/tree/testing --- src/hw/usb-ehci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/hw/usb-ehci.c b/src/hw/usb-ehci.c index 20e387b..f5ee5bf 100644 --- a/src/hw/usb-ehci.c +++ b/src/hw/usb-ehci.c @@ -366,7 +366,7 @@ ehci_desc2pipe(struct ehci_pipe *pipe, struct usbdevice_s *usbdev struct ehci_pipe *hpipe = container_of( hubdev->defpipe, struct ehci_pipe, pipe); if (hpipe->pipe.speed == USB_HIGHSPEED) - pipe->qh.info2 |= ((usbdev->port << QH_HUBPORT_SHIFT) + pipe->qh.info2 |= (((usbdev->port+1) << QH_HUBPORT_SHIFT) | (hpipe->pipe.devaddr << QH_HUBADDR_SHIFT)); else pipe->qh.info2 = hpipe->qh.info2; -- 1.9.3

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Re: [SeaBIOS] Release ratonale
by Kevin O'Connor 14 Sep '14

14 Sep '14

On Sat, Sep 13, 2014 at 06:12:24PM -0400, Leonardo Passos wrote: > Dear all, > > I am using Seabios for a personal project and I need to try different > versions of it. > After cloning the project code, I see many releases when issuing git tag, > but which ones are stable? Clearly, 1.7.5-rc1 isn't, but what about the > others? > > Stated otherwise, what is the rationale of release numbering in Seabios? The history of major seabios releases is documented at: http://seabios.org/Releases All of the tags in git (with the exception of the -rcX "release candidate" tags) were considered stable at the time they were tagged. The tags/releases with 4 digits (eg, rel-1.7.2.2) were incremental stable branch releases. That is, they were bug fix only releases. As far as I know, this is the same release numbering scheme that qemu and the Linux kernel currently use. If you're looking for the most recent stable release, it's rel-1.7.5 (as documented on the wiki above). The code being developed for the next major release is on the master branch. I'm not sure what info you are looking for, but I hope that helps. -Kevin

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Release ratonale
by Leonardo Passos 14 Sep '14

14 Sep '14

Dear all, I am using Seabios for a personal project and I need to try different versions of it. After cloning the project code, I see many releases when issuing git tag, but which ones are stable? Clearly, 1.7.5-rc1 isn't, but what about the others? Stated otherwise, what is the rationale of release numbering in Seabios? Regards, Leonardo.

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Qemu vgabioses
by Denis 'GNUtoo' Carikli 13 Sep '14

13 Sep '14

Hi, Here is a patch for discussing how to best make qemu vgabioses selectable for all targets, while not making it confusing for users. Denis.

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[PATCH 0/7] Rework USB device detect timing
by Kevin O'Connor 11 Sep '14

11 Sep '14

This series reworks the timing of USB detection. Previously, the USB controllers would wait for the port power to stabilize and then immiediately check for device presence. Unfortunately, the USB specification (USB2 spec) allows for devices to wait up to 100ms from the time that power is stable to the time they assert their presence. This series changes the controllers to behave more like the existing usb-hub code - each port will repeatedly re-check for device presence for 100ms after power is stable. This may also help with USB3 device detection. In particular there were reports of devices that start off identifying as USB2 and then later change to a USB3 type device. The additional polling may catch these cases. This series could cause a slight increase in overall boot time (due to the additional 100ms polling). However, when SeaBIOS' threads are enabled, I think only a few unusual corner cases would cause higher boot times. The series is a fairly significant change to the initial USB timing behaviour. I ran tests on a bunch of USB devices and did not see any regressions. More testing would be appreciated. The series is also at: https://github.com/KevinOConnor/seabios/tree/testing -Kevin Kevin O'Connor (7): ehci: Move port power up from ehci_hub_detect() to check_ehci_ports(). usb-hub: Enable power to all ports prior to calling usb_enumerate(). xhci: Change xhci_hub_detect() to use connect status instead of link state. uhci: Repeatedly poll for device detect for 100ms. ohci: Repeatedly poll for device detect for 100ms. ehci: Stall uhci/ohci init only until default port routing is done. usb: Perform device detect polling on all usb controllers. src/hw/usb-ehci.c | 58 +++++++++++++++++++++++++------------------------------ src/hw/usb-hub.c | 46 +++++++++++++++---------------------------- src/hw/usb-ohci.c | 8 +------- src/hw/usb-uhci.c | 7 +++---- src/hw/usb-xhci.c | 16 +++++---------- src/hw/usb.c | 21 ++++++++++++++------ src/hw/usb.h | 2 +- 7 files changed, 67 insertions(+), 91 deletions(-) -- 1.9.3

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[RFC PATCH 1/1] TPM: Support Physical Presence Interface Spec
by Stefan Berger 11 Sep '14

11 Sep '14

From: Stefan Berger <stefanb(a)linux.vnet.ibm.com> To (try to) avoid SeaBIOS from having to implement a menu for managing the various states of a TPM device, implement the TCG Physical Presence Interface Specification that allows a root user on Linux (for example) to set the opcode for a sequence of TPM operations that the BIOS is supposed to execute upon reboot of the physical or virtual machine. A sequence of operation may for example involve giving up ownership of the TPM and activating and enabling the device. The sequences of operations are defined in table 2 in the specs to be found at the following link: http://www.trustedcomputinggroup.org/resources/tcg_physical_presence_interf… As an example, in recent versions of Linux the opcode (5) can be set as follows: cd /sys/devices/pnp0/00\:04/ppi echo 5 > ppi This ACPI implementation writes the opcode into the TPM's NVRAM at index 0x5001 0000 (to be adapted), which SeaBIOS can then read and react to. An alernative would be to have ACPI write the byte into a memory area that SeaBIOS would have to be able to find upon reboot. More than a single byte of persistent memory will be needed once SeaBIOS supports this since it must store a status byte about the last operation, the opcode that was acted on, and the return code that the TPM gave (see ACPI function 5). Only a subset of the defined opcodes will be supported. Tentatively opcodes 1-11, 14 will be supported. Signed-off-by: Stefan Berger <stefanb(a)linux.vnet.ibm.com> --- hw/i386/ssdt-tpm.dsl | 208 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 208 insertions(+) diff --git a/hw/i386/ssdt-tpm.dsl b/hw/i386/ssdt-tpm.dsl index 75d9691..678b212 100644 --- a/hw/i386/ssdt-tpm.dsl +++ b/hw/i386/ssdt-tpm.dsl @@ -12,6 +12,14 @@ * You should have received a copy of the GNU General Public License along * with this program; if not, see <http://www.gnu.org/licenses/>. */ + +/* + * Note: This implementation follows the TCG specification + * 'TCG Physical Presence Interface Specification' of which the latest + * version can be found here: + * http://www.trustedcomputinggroup.org/resources/tcg_physical_presence_interf… + */ + #include "hw/acpi/tpm.h" ACPI_EXTRACT_ALL_CODE ssdt_tpm_aml @@ -38,6 +46,206 @@ DefinitionBlock ( Method (_STA, 0, NotSerialized) { Return (0x0F) } + // Last accepted opcode + NAME(OP, Zero) + OperationRegion (TTIS, SystemMemory, + TPM_TIS_ADDR_BASE, TPM_TIS_ADDR_SIZE) + + // Define TIS registers + Field(TTIS, AnyAcc, NoLock, Preserve) { + Offset (0x00), + TACC, 8, // Access register + Offset (0x18), + TSTS, 8, // Status register + Offset (0x24), + TDAT, 8, // Data register + Offset (0xf90), + TDBG, 32 // QEMU TIS Debug + } + // TPM_NV_WriteValue for writing 1 byte to a NVRAM index + Name (NVWR, Package() { + 0x00, 0xc1, + 0x00, 0x00, 0x00, 0x17, // total length + 0x00, 0x00, 0x00, 0xcd, // opcode + 0x50, 0x01, 0x00, 0x00, // index + 0x00, 0x00, 0x00, 0x00, // offset + 0x00, 0x00, 0x00, 0x01, // payload length + 0x00 + }) + // Buffer to read TPM responses into + Name (BUFF, Buffer(0xa){}) + // Last TPM return code from writing to TPM NVRAM + Name (WRET, 0) + + // Write into NVRAM of TPM + Method ( _WNV, 1, NotSerialized) { + // Any early return will indicate a failed execution + Store(0xffffffff, WRET) + + // Request access to locty 0 + Store(0x02, TACC) + + // Make sure we are active + Store(TACC, Local0) + If (LNotEqual(And(Local0, 0xa0), 0xa0)) { + return (16) // EBUSY + } + + // Set the Command Ready Flag + Store(0x40, TSTS) + + // Make sure we are ready + Store(TSTS, Local0) + If (LNotEqual(And(Local0, 0x40), 0x40)) { + return (14) // EFAULT + } + + // Write the user-requested op-code into the NVRAM command + Store(Arg0, Index(NVWR, 0x16)) + + // Write the TPM_NV_WriteValue into the data buffer + Store(0x0, Local0) + While (LLess(Local0, SizeOf(NVWR))) { + Store(DerefOf(Index(NVWR, Local0)), TDAT) + Increment(Local0) + } + + // Go: have TPM process the command + Store(0x20, TSTS) + + // Wait for response to be ready + Store(0, Local0) + While (LLess(local0, 0x30)) { + Store(TSTS, Local1) + if (LEqual(And(Local1, 0x10), 0x10)) { + break + } + Sleep(10) + Increment(Local0) + } + + // Read the result into BUFF + Store(0, Local0) + While (LLess(Local0, SizeOf(BUFF))) { + Store(TDAT, Index(BUFF, Local0)) + Increment(Local0) + } + + // Extract return code from response + Mid(BUFF, 6, 4, WRET) + + Return (0) + } + Method (_DSM, 4, NotSerialized) { + If (LEqual (Arg0, ToUUID("3DDDFAA6-361B-4EB4-A424-8D10089D1653"))) { + + // only supporting API revision 1 + If (LNotEqual (Arg1, 1)) { + Return (Buffer (1) {0}) + } + + Store(ToInteger(Arg2), Local0) + // standard DSM query function + If (LEqual (Local0, 0)) { + Return (Buffer () {0xFF, 0x01}) + } + + // interface version + If (LEqual (Local0, 1)) { + Return ("1.2") + } + + // submit TPM operation + If (LEqual (Local0, 2)) { + // get opcode from package + Store(DerefOf(Index(Arg3, 0)), Local0) + // check for supported opcode + // supported opcodes: 1-11, 14 + If (LOr(LAnd(LGreaterEqual(Local0, 1), LLessEqual(Local0, 11)), LEqual(Local0, 14))) { + // Write the OP into TPM NVRAM + Store(_WNV ( Local0 ), Local1) + if (LNotEqual(Local1, 0)) { + return (Local1) + } + // Check for error during NVRAM write + if (LEqual(WRET, 0)) { + Store(Local0, OP) + Return (0) + } else { + Return (1) + } + } else { + Return (1) + } + } + + // get pending TPM operation + If (LEqual (Local0, 3)) { + NAME(PEOP, Package(2) { 0, 0 }) + + // Check for error during NVRAM write + if (LEqual(WRET, 0)) { + Store ( 0, Index(PEOP, 0)) + } else { + Store ( 1, Index(PEOP, 0)) + } + Store ( OP, Index(PEOP, 1)) + + Return (PEOP) + } + + // action to transition to pre-OS env. + If (LEqual (Local0, 4)) { + return (2) // Requiring reboot + } + + // get pre-OS TPM operation response + If (LEqual (Local0, 5)) { + // missing BIOS support + Name (OPRE, Package(3) { 1, 0, 0}) + return (OPRE) + } + + // preferred user language + If (LEqual (Local0, 6)) { + return (3) // Not implemented + } + + // submit TPM operation v2 + If (LEqual (Local0, 7)) { + Store(DerefOf(Index(Arg3, 0)), Local0) + // supported opcodes: 1-11, 14 + If (LOr(LAnd(LGreaterEqual(Local0, 1), LLessEqual(Local0, 11)), LEqual(Local0, 14))) { + // Write the OP into TPM NVRAM + Store(_WNV ( Local0 ), Local1) + if (LNotEqual(Local1, 0)) { + return (Local1) + } + // Check for error during NVRAM write + if (LEqual(WRET, 0)) { + // Remember opcode locally + Store(Local0, OP) + Return (0) + } else { + Return (1) + } + } else { + Return (1) + } + } + + // get user confirmation status + If (LEqual (Local0, 8)) { + Store(DerefOf(Index(Arg3,0)), Local0) + If (LLessEqual(Local0, 22)) { + Return (4) // allowed, no user required + } else { + Return (0) // not implemented + } + } + } + return (Buffer() { 0x0 }) + } } } } -- 1.9.3

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[PATCH 0/4] xhci code cleanups and some reorganization
by Kevin O'Connor 10 Sep '14

10 Sep '14

This series cleans up the xhci code (by removing some of the old 16bit assumptions), and rearranges things a little to make the code layout more similar to the other usb controller drivers. This is in preparation for the next USB series which reworks some of the USB timing. This series (along with the next) is also at: https://github.com/KevinOConnor/seabios/tree/testing -Kevin Kevin O'Connor (4): xhci: Remove 16bit code wrappers. xhci: Use high memory instead of low memory for internal storage. xhci: Move root hub and setup code to top of file. xhci: Add xhci_check_ports() and xhci_free_pipes() functions. src/hw/usb-xhci.c | 924 +++++++++++++++++++++++++++--------------------------- 1 file changed, 462 insertions(+), 462 deletions(-) -- 1.9.3

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