SeaBIOS

seabios@seabios.org

3783 discussions

[RFC 0/3] NVDIMM booting support
by Marc Marí 22 Sep '15

22 Sep '15

Implement support for booting from a PMEM region compatible with NVDIMM and NFIT specifications. The current implementation is still slow. When running a Linux guest on top of QEMU in x86: Using actual -kernel option: QEMU startup time: .080 BIOS startup time: .060 Kernel setup time: .590 Total time: .730 Using -kernel option and fw_cfg DMA patch: QEMU startup time: .080 BIOS startup time: .039 Kernel setup time: .002 Total time: .121 Using this patch series and adding the vmlinuz as a NVDIMM device: QEMU startup time: .080 BIOS startup time: .065 Kernel setup time: .015 Total time: .160 This patch series is not ready for merging. There are things missing and questions to be answered: - Is it necessary to retrieve any other data from the NVDIMM? - Is there any other nicer (and faster) option for the page table? - Make NVDIMM a compile-time option, as the other devices. - Add some kind of wrapper to the boot files instead of a direct vmlinux. - Add NVDIMM boot priority support. - Add support for intitrd and cmdline. Maybe in another NVDIMM, or in the same, or through fw_cfg. - Reorder code to change to long mode less times. Any other proposals for improvements are appreciated Marc Marí (3): Basic NVDIMM PMEM support Transitions to and from 64 bits Add NVDIMM booting support Makefile | 3 +- src/boot.c | 18 ++++++++ src/config.h | 2 + src/fw/biostables.c | 80 ++++++++++++++++++++++++++++++++ src/hw/nvdimm.c | 128 ++++++++++++++++++++++++++++++++++++++++++++++++++++ src/hw/nvdimm.h | 12 +++++ src/misc.c | 4 ++ src/post.c | 2 + src/romlayout.S | 126 +++++++++++++++++++++++++++++++++++++++++++++++++++ src/stacks.c | 77 +++++++++++++++++++++++++++++++ src/stacks.h | 2 + src/std/acpi.h | 40 ++++++++++++++++ src/util.h | 3 ++ src/x86.h | 1 + 14 files changed, 497 insertions(+), 1 deletion(-) create mode 100644 src/hw/nvdimm.c create mode 100644 src/hw/nvdimm.h -- 2.4.3

5 18

QEMU fw_cfg DMA interface
by Marc Marí 20 Sep '15

20 Sep '15

Implementation of the FW CFG DMA interface. When running a Linux guest on top of QEMU, using the -kernel options, this is the timing improvement for x86: QEMU commit 16a1b6e and SeaBIOS commit e4d2b8c QEMU startup time: .080 BIOS startup time: .060 Kernel setup time: .586 Total time: .726 QEMU with this patch series and SeaBIOS with this patch series QEMU startup time: .080 BIOS startup time: .039 Kernel setup time: .002 Total time: .121 QEMU startup time is the time between the start and the first kvm_entry. BIOS startup time is the time between the first kvm_entry and the start of function do_boot, in SeaBIOS. Kernel setup time is the time between the start of the function do_boot in SeaBIOS and the jump to the Linux kernel. As you can see, both the BIOS (because of ACPI tables and other configurations) and the Linux kernel boot (because of the copy to memory) are greatly improved with this new interface. Also, this new interface is an addon to the old interface. Both interfaces are compatible and interchangeable. Changes from v1: - Take into account order of fields in the FWCfgDmaAccess structure - Check and change endianness of FWCfgDmaAccess fields - Change order of fields in the FWCfgDmaAccess structure - Add FW_CFG_DMA_CTL_SKIP feature for control field - Split FW_CFG_SIZE in QEMU - Make FW_CFG_ID a bitmap of features - Add 64 bit address support for the transfer. Trigger when writing the low address, and address is 0 by default and at the end of each transfer. - Align ports and addresses. - Preserve old fw_cfg_comb_valid behaviour in QEMU - Update documentation to reflect all these changes Changes from v2: - Make IOports fw_cfg DMA region a different IO region. - Reuse everything for MMIO and IOport DMA regions - Make transfer status only based on control field - Use DMA helpers instead of direct map/unmap - Change ARM fw_cfg DMA address space - Change Linux boot process to match linuxboot.S - Add select capabilities in the FWCfgDmaAccess struct - Update documentation to reflect all these changes

3 8

[PATCH 0/5] Simplify 16bit/32bit trampoline code
by Kevin O'Connor 19 Sep '15

19 Sep '15

This series simplifies some of the existing trampoline code. -Kevin Kevin O'Connor (5): Unify smm/sloppy variants of call32_prep/post and call16_helper Rename Call32Data to Call16Data Unify inline assembler in variants of call16 functions Unify call32_sloppy() and call32() Use transition32_nmi_off from call32() and call16_back() src/romlayout.S | 10 +- src/stacks.c | 282 +++++++++++++++++++++----------------------------------- 2 files changed, 106 insertions(+), 186 deletions(-) -- 2.4.3

1 6

Version of master behind stable branch versions
by Paul Menzel 15 Sep '15

15 Sep '15

Dear SeaBIOS folks, building SeaBIOS from master, the version string shows 1.8.0-…, which is more current than the rel-1.8.0-148-g75cb2b9 release. This is confusing. Should the stable branches be merged back into the master branch to get a less confusing behavior? Or is there a different way to handle this? Thanks, Paul

2 1

[PATCH] build: use -fstack-check=no when available
by Mike Frysinger 14 Sep '15

14 Sep '15

From: Magnus Granberg <zorry(a)gentoo.org> Some compilers default this option to on which leads to build failures: src/stacks.c: In function 'call16_back': src/stacks.c:139:5: error: 'asm' operand has impossible constraints asm volatile( ^ URL: https://bugs.gentoo.org/559980 Reported-by: Alon Bar-Lev <alonbl(a)gentoo.org> Signed-off-by: Magnus Granberg <zorry(a)gentoo.org> Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> --- Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/Makefile b/Makefile index e287530..3a0d2e8 100644 --- a/Makefile +++ b/Makefile @@ -63,6 +63,7 @@ COMMONCFLAGS := -I$(OUT) -Isrc -Os -MD -g \ COMMONCFLAGS += $(call cc-option,$(CC),-nopie,) COMMONCFLAGS += $(call cc-option,$(CC),-fno-stack-protector,) COMMONCFLAGS += $(call cc-option,$(CC),-fno-stack-protector-all,) +COMMONCFLAGS += $(call cc-option,$(CC),-fstack-check=no,) COMMA := , CFLAGS32FLAT := $(COMMONCFLAGS) -DMODE16=0 -DMODESEGMENT=0 -- 2.5.1

2 3

[PATCH] Simplify transition16/32 assembler code
by Kevin O'Connor 09 Sep '15

09 Sep '15

Backup and restore %eax only around code that needs to use %eax. Signed-off-by: Kevin O'Connor <kevin(a)koconnor.net> --- src/romlayout.S | 89 ++++++++++++++++++++++++++------------------------------- 1 file changed, 40 insertions(+), 49 deletions(-) diff --git a/src/romlayout.S b/src/romlayout.S index 7938e22..d78737b 100644 --- a/src/romlayout.S +++ b/src/romlayout.S @@ -22,18 +22,13 @@ // %edx = return location (in 32bit mode) // Clobbers: ecx, flags, segment registers, cr0, idt/gdt DECLFUNC transition32 -transition32_nmi_off: - // transition32 when NMI and A20 are already initialized - movl %eax, %ecx - jmp 1f transition32: - movl %eax, %ecx - // Disable irqs (and clear direction flag) cli cld // Disable nmi + movl %eax, %ecx movl $CMOS_RESET_CODE|NMI_DISABLE_BIT, %eax outb %al, $PORT_CMOS_INDEX inb $PORT_CMOS_DATA, %al @@ -42,29 +37,30 @@ transition32: inb $PORT_A20, %al orb $A20_ENABLE_BIT, %al outb %al, $PORT_A20 + movl %ecx, %eax +transition32_nmi_off: // Set segment descriptors -1: lidtw %cs:pmode_IDT_info + lidtw %cs:pmode_IDT_info lgdtw %cs:rombios32_gdt_48 // Enable protected mode - movl %cr0, %eax - orl $CR0_PE, %eax - movl %eax, %cr0 + movl %cr0, %ecx + orl $CR0_PE, %ecx + movl %ecx, %cr0 // start 32bit protected mode code - ljmpl $SEG32_MODE32_CS, $(BUILD_BIOS_ADDR + 2f) + ljmpl $SEG32_MODE32_CS, $(BUILD_BIOS_ADDR + 1f) .code32 // init data segments -2: movl $SEG32_MODE32_DS, %eax - movw %ax, %ds - movw %ax, %es - movw %ax, %ss - movw %ax, %fs - movw %ax, %gs +1: movl $SEG32_MODE32_DS, %ecx + movw %cx, %ds + movw %cx, %es + movw %cx, %ss + movw %cx, %fs + movw %cx, %gs - movl %ecx, %eax jmpl *%edx .code16 @@ -75,61 +71,56 @@ transition32: .global transition16big .code32 transition16: - movl %eax, %ecx - - // restore data segment limits to 0xffff - movl $SEG32_MODE16_DS, %eax - movw %ax, %ds - movw %ax, %es - movw %ax, %ss - movw %ax, %fs - movw %ax, %gs - #if CONFIG_DISABLE_A20 // disable a20 + movl %eax, %ecx inb $PORT_A20, %al andb $~A20_ENABLE_BIT, %al outb %al, $PORT_A20 + movl %ecx, %eax #endif + // Reset data segment limits + movl $SEG32_MODE16_DS, %ecx + movw %cx, %ds + movw %cx, %es + movw %cx, %ss + movw %cx, %fs + movw %cx, %gs + // Jump to 16bit mode ljmpw $SEG32_MODE16_CS, $1f transition16big: - movl %eax, %ecx - - movl $SEG32_MODE16BIG_DS, %eax - movw %ax, %ds - movw %ax, %es - movw %ax, %ss - movw %ax, %fs - movw %ax, %gs + movl $SEG32_MODE16BIG_DS, %ecx + movw %cx, %ds + movw %cx, %es + movw %cx, %ss + movw %cx, %fs + movw %cx, %gs ljmpw $SEG32_MODE16BIG_CS, $1f .code16 -1: // Disable protected mode - movl %cr0, %eax - andl $~CR0_PE, %eax - movl %eax, %cr0 +1: movl %cr0, %ecx + andl $~CR0_PE, %ecx + movl %ecx, %cr0 // far jump to flush CPU queue after transition to real mode ljmpw $SEG_BIOS, $2f -2: // restore IDT to normal real-mode defaults - lidtw %cs:rmode_IDT_info +2: lidtw %cs:rmode_IDT_info // Clear segment registers - xorw %ax, %ax - movw %ax, %fs - movw %ax, %gs - movw %ax, %es - movw %ax, %ds - movw %ax, %ss // Assume stack is in segment 0 + xorw %cx, %cx + movw %cx, %fs + movw %cx, %gs + movw %cx, %es + movw %cx, %ds + movw %cx, %ss // Assume stack is in segment 0 - movl %ecx, %eax jmpl *%edx -- 2.4.3

1 0

"bootorder" documentation change
by Maxime de Roucy 08 Sep '15

08 Sep '15

Hello, I would like to submit the patch attached, regarding the bootorder documentation. -- Regards Maxime de Roucy

3 4

Unremovable USB3 device can not be detected after reboot
by Zheng Bao 06 Sep '15

06 Sep '15

Hi, All, My test environment. Main Board: AMD Bettong SeaBIOS: 1.8.0 USB3 device: USB MSC vendor='Seagate' product='FA GoFlex Pro' rev='0210' type=0 removable=0 The device can be detected at Seabios stage only when the board is power up first time. If I press the reset button, it can not be detected. I have to unplug, plug the power cable and power up again, the usb3 device can be detected. Removable USB flash disk doesnt have that problem. Zheng

3 10

Re: [SeaBIOS] : USB 3.0 port failed if a USB 3.0 device is attached when power up (Summary: not final fixed yet)
by Zheng Bao 05 Sep '15

05 Sep '15

http://review.coreboot.org/#/c/11376/Only this can be apply to Trinity. Zheng > Date: Wed, 2 Sep 2015 17:22:30 +0200 > From: vidwer(a)gmail.com > To: seabios(a)seabios.org > Subject: Re: [SeaBIOS] : USB 3.0 port failed if a USB 3.0 device is attached when power up (Summary: not final fixed yet) > > 2015-08-26 14:33 GMT+02:00 Zheng Bao <fishbaoz(a)hotmail.com>: > > Yes. Need test by our validation dept. > > Hello Zheng, > > Is there an estimated turnaround time for changes to be delivered? > > Would the following changesets apply to Trinity? > http://review.coreboot.org/#/c/11375/ > http://review.coreboot.org/#/c/11376/ > http://review.coreboot.org/#/c/11377/ > > Idwer > > > > > > >> Date: Wed, 26 Aug 2015 13:55:52 +0200 > >> From: vidwer(a)gmail.com > >> To: seabios(a)seabios.org > >> Subject: Re: [SeaBIOS] : USB 3.0 port failed if a USB 3.0 device is > >> attached when power up (Summary: not final fixed yet) > > > >> > >> 2015-08-26 10:02 GMT+02:00 Zheng Bao <fishbaoz(a)hotmail.com>: > >> > Changing the AMD register in Coreboot code can only solve the USB3 > >> > problem > >> > in OS. In SeaBIOS stage, the problem still exists. > >> > >> Will you submit a change to AGESA? > >> > >> > > >> > I will start a new thread to describe the problem. > >> > > >> > Zheng > >> > > >> > ________________________________ > >> > From: fishbaoz(a)hotmail.com > >> > To: vidwer(a)gmail.com; seabios(a)seabios.org > >> > Date: Wed, 26 Aug 2015 05:35:12 +0000 > >> > Subject: Re: [SeaBIOS] : USB 3.0 port failed if a USB 3.0 device is > >> > attached > >> > when power up > >> > > >> > Problem solved. It is about a internal register setting. > >> > Zheng > >> > > >> > > >> > ________________________________ > >> > From: fishbaoz(a)hotmail.com > >> > To: vidwer(a)gmail.com; seabios(a)seabios.org > >> > Date: Tue, 25 Aug 2015 12:06:34 +0000 > >> > Subject: Re: [SeaBIOS] : USB 3.0 port failed if a USB 3.0 device is > >> > attached > >> > when power up > >> > > >> > Message after power up. xhci is ok. > >> > ---------------------------- > >> > SeaBIOS (version rel-1.8.0-0-g4c59f5d-dirty-20150825_074224-supersrv) > >> > Found coreboot cbmem console @ bffde000 > >> > Found mainboard AMD Parmer > >> > Relocating init from 0x000e7b40 to 0xbff55050 (size 40688) > >> > Found CBFS header at 0xfffffc60 > >> > CPU Mhz=2497 > >> > Found 23 PCI devices (max PCI bus is 02) > >> > Copying SMBIOS entry point from 0xbffa7000 to 0x000f1a10 > >> > Copying ACPI RSDP from 0xbffb8000 to 0x000f19e0 > >> > Copying MPTABLE from 0xbffdc000/bffdc010 to 0x000f17b0 > >> > Copying PIR from 0xbffdd000 to 0x000f1780 > >> > Using pmtimer, ioport 0x818 > >> > Scan for VGA option rom > >> > Running option rom at c000:0003 > >> > Turning on vga text mode console > >> > SeaBIOS (version rel-1.8.0-0-g4c59f5d-dirty-20150825_074224-supersrv) > >> > /bff52000\ Start thread > >> > |bff52000| XHCI init on dev 00:10.0: regs @ 0xf0248000, 4 ports, 32 > >> > slots, > >> > 32 byte contexts > >> > |bff52000| XHCI extcap 0x1 @ f0248500 > >> > |bff52000| XHCI protocol USB 3.00, 2 ports (offset 1), def 0 > >> > |bff52000| XHCI protocol USB 2.00, 2 ports (offset 3), def 0 > >> > /bff51000\ Start thread > >> > |bff51000| configure_xhci: resetting > >> > Found 1 serial ports > >> > AHCI controller at 11.0, iobase f024d000, irq 0 > >> > AHCI: cap 0xf3309f05, ports_impl 0x3f > >> > /bff50000\ Start thread > >> > |bff50000| AHCI/0: probing > >> > |bff52000| EHCI init on dev 00:12.2 (regs=0xf024d820) > >> > /bff4f000\ Start thread > >> > /bff4d000\ Start thread > >> > |bff4d000| AHCI/1: probing > >> > |bff50000| AHCI/0: link down > >> > |bff52000| EHCI init on dev 00:13.2 (regs=0xf024d920) > >> > /bff4c000\ Start thread > >> > /bff4b000\ Start thread > >> > |bff4b000| AHCI/2: probing > >> > |bff4d000| AHCI/1: link down > >> > \bff50000/ End thread > >> > |bff52000| OHCI init on dev 00:12.0 (regs=0xf024a000) > >> > /bff50000\ Start thread > >> > /bff4a000\ Start thread > >> > /bff49000\ Start thread > >> > |bff49000| AHCI/3: probing > >> > |bff4b000| AHCI/2: link down > >> > \bff4d000/ End thread > >> > |bff52000| OHCI init on dev 00:13.0 (regs=0xf024b000) > >> > /bff4d000\ Start thread > >> > /bff48000\ Start thread > >> > /bff47000\ Start thread > >> > /bff45000\ Start thread > >> > |bff45000| AHCI/4: probing > >> > |bff49000| AHCI/3: link down > >> > \bff4b000/ End thread > >> > |bff52000| OHCI init on dev 00:14.5 (regs=0xf024c000) > >> > /bff4b000\ Start thread > >> > /bff44000\ Start thread > >> > /bff43000\ Start thread > >> > /bff42000\ Start thread > >> > |bff42000| AHCI/5: probing > >> > |bff45000| AHCI/4: link down > >> > \bff49000/ End thread > >> > \bff52000/ End thread > >> > /bff52000\ Start thread > >> > \bff52000/ End thread > >> > /bff52000\ Start thread > >> > |bff42000| AHCI/5: link down > >> > \bff45000/ End thread > >> > /bff49000\ Start thread > >> > /bff46000\ Start thread > >> > /bff45000\ Start thread > >> > \bff42000/ End thread > >> > /bff42000\ Start thread > >> > /bff41000\ Start thread > >> > /bff40000\ Start thread > >> > /bff3f000\ Start thread > >> > /bff3e000\ Start thread > >> > /bff3d000\ Start thread > >> > /bff3c000\ Start thread > >> > /bff3b000\ Start thread > >> > |bff3b000| XHCI port #2: 0x00021203, powered, enabled, pls 0, speed 4 > >> > [Super] > >> > /bff3a000\ Start thread > >> > /bff39000\ Start thread > >> > /bff38000\ Start thread > >> > /bff37000\ Start thread > >> > /bff36000\ Start thread > >> > /bff35000\ Start thread > >> > |bff3b000| xhci_alloc_pipe: usbdev 0xbff53350, ring 0xbff9e400, slotid > >> > 0, > >> > epid 1 > >> > |bff3b000| xhci_cmd_enable_slot: > >> > |bff3b000| xhci_trb_queue: ring 0xbff9ed00 [nidx 1, len 0] > >> > |bff3b000| xhci_process_events: status change port #2 > >> > |bff3b000| xhci_process_events: ring 0xbff9ed00 [trb 0xbff9ed00, evt > >> > 0xbff9ee00, type 33, eidx 1, cc 1] > >> > |bff3b000| xhci_alloc_pipe: enable slot: got slotid 1 > >> > |bff3b000| xhci_cmd_address_device: slotid 1 > >> > |bff3b000| xhci_trb_queue: ring 0xbff9ed00 [nidx 2, len 0] > >> > /bff34000\ Start thread > >> > /bff33000\ Start thread > >> > |bff3b000| xhci_process_events: ring 0xbff9ed00 [trb 0xbff9ed10, evt > >> > 0xbff9ee00, type 33, eidx 2, cc 1] > >> > |bff3b000| xhci_realloc_pipe: usbdev 0xbff53350, ring 0xbff9e400, slotid > >> > 1, > >> > epid 1 > >> > |bff3b000| xhci_trb_queue: ring 0xbff9e400 [nidx 1, len 8] > >> > |bff3b000| xhci_trb_queue: ring 0xbff9e400 [nidx 2, len 8] > >> > |bff3b000| xhci_trb_queue: ring 0xbff9e400 [nidx 3, len 0] > >> > |bff3b000| xhci_xfer_kick: ring 0xbff9e400, slotid 1, epid 1 > >> > |bff3b000| xhci_process_events: ring 0xbff9e400 [trb 0xbff9e420, evt > >> > 0xbff9e500, type 32, eidx 3, cc 1] > >> > |bff3b000| xhci_realloc_pipe: usbdev 0xbff53350, ring 0xbff9e400, slotid > >> > 1, > >> > epid 1 > >> > |bff3b000| xhci_trb_queue: ring 0xbff9e400 [nidx 4, len 8] > >> > |bff3b000| xhci_trb_queue: ring 0xbff9e400 [nidx 5, len 9] > >> > |bff3b000| xhci_trb_queue: ring 0xbff9e400 [nidx 6, len 0] > >> > |bff3b000| xhci_xfer_kick: ring 0xbff9e400, slotid 1, epid 1 > >> > |bff3b000| xhci_process_events: ring 0xbff9e400 [trb 0xbff9e450, evt > >> > 0xbff9e500, type 32, eidx 6, cc 1] > >> > |bff3b000| xhci_trb_queue: ring 0xbff9e400 [nidx 7, len 8] > >> > |bff3b000| xhci_trb_queue: ring 0xbff9e400 [nidx 8, len 44] > >> > |bff3b000| xhci_trb_queue: ring 0xbff9e400 [nidx 9, len 0] > >> > |bff3b000| xhci_xfer_kick: ring 0xbff9e400, slotid 1, epid 1 > >> > |bff3b000| xhci_process_events: ring 0xbff9e400 [trb 0xbff9e480, evt > >> > 0xbff9e500, type 32, eidx 9, cc 1] > >> > |bff3b000| xhci_trb_queue: ring 0xbff9e400 [nidx 10, len 8] > >> > |bff3b000| xhci_trb_queue: ring 0xbff9e400 [nidx 11, len 0] > >> > |bff3b000| xhci_xfer_kick: ring 0xbff9e400, slotid 1, epid 1 > >> > |bff3b000| xhci_process_events: ring 0xbff9e400 [trb 0xbff9e4a0, evt > >> > 0xbff9e500, type 32, eidx 11, cc 1] > >> > |bff3b000| xhci_alloc_pipe: usbdev 0xbff53350, ring 0x000eee00, slotid > >> > 0, > >> > epid 3 > >> > |bff3b000| xhci_cmd_configure_endpoint: slotid 1, add 0x9, del 0x0 > >> > |bff3b000| xhci_trb_queue: ring 0xbff9ed00 [nidx 3, len 0] > >> > |bff3a000| usb_hid_setup 0xbff4e920 > >> > |bff3b000| xhci_process_events: ring 0xbff9ed00 [trb 0xbff9ed20, evt > >> > 0xbff9ee00, type 33, eidx 3, cc 1] > >> > |bff3b000| xhci_alloc_pipe: usbdev 0xbff53350, ring 0x000eec00, slotid > >> > 0, > >> > epid 4 > >> > |bff3b000| xhci_cmd_configure_endpoint: slotid 1, add 0x11, del 0x0 > >> > |bff3b000| xhci_trb_queue: ring 0xbff9ed00 [nidx 4, len 0] > >> > |bff3b000| xhci_process_events: ring 0xbff9ed00 [trb 0xbff9ed30, evt > >> > 0xbff9ee00, type 33, eidx 4, cc 1] > >> > |bff3b000| xhci_trb_queue: ring 0xbff9e400 [nidx 12, len 8] > >> > |bff3b000| xhci_trb_queue: ring 0xbff9e400 [nidx 13, len 1] > >> > |bff3b000| xhci_trb_queue: ring 0xbff9e400 [nidx 14, len 0] > >> > |bff3b000| xhci_xfer_kick: ring 0xbff9e400, slotid 1, epid 1 > >> > |bff3a000| USB keyboard initialized > >> > \bff3a000/ End thread > >> > |bff3b000| xhci_process_events: ring 0xbff9e400 [trb 0xbff9e4d0, evt > >> > 0xbff9e500, type 32, eidx 14, cc 1] > >> > |bff3b000| Searching bootorder for: > >> > /pci@i0cf8/usb@10/storage@2/*@0/*@0,0 > >> > |bff3b000| Searching bootorder for: /pci@i0cf8/usb@10/usb-*@2 > >> > |bff3b000| xhci_trb_queue: ring 0x000eec00 [nidx 1, len 31] > >> > |bff3b000| xhci_xfer_kick: ring 0x000eec00, slotid 1, epid 4 > >> > |bff3b000| xhci_process_events: ring 0x000eec00 [trb 0x000eec00, evt > >> > 0x000eed00, type 32, eidx 1, cc 1] > >> > |bff3b000| xhci_trb_queue: ring 0x000eee00 [nidx 1, len 36] > >> > |bff3b000| xhci_xfer_kick: ring 0x000eee00, slotid 1, epid 3 > >> > |bff3b000| xhci_process_events: ring 0x000eee00 [trb 0x000eee00, evt > >> > 0x000eef00, type 32, eidx 1, cc 1] > >> > |bff3b000| xhci_trb_queue: ring 0x000eee00 [nidx 2, len 13] > >> > |bff3b000| xhci_xfer_kick: ring 0x000eee00, slotid 1, epid 3 > >> > |bff3b000| xhci_process_events: ring 0x000eee00 [trb 0x000eee10, evt > >> > 0x000eef00, type 32, eidx 2, cc 1] > >> > |bff3b000| USB MSC vendor='Seagate' product='FA GoFlex Pro' rev='0210' > >> > type=0 removable=0 > >> > |bff3b000| xhci_trb_queue: ring 0x000eec00 [nidx 2, len 31] > >> > |bff3b000| xhci_xfer_kick: ring 0x000eec00, slotid 1, epid 4 > >> > |bff3b000| xhci_process_events: ring 0x000eec00 [trb 0x000eec10, evt > >> > 0x000eed00, type 32, eidx 2, cc 1] > >> > |bff3b000| xhci_trb_queue: ring 0x000eee00 [nidx 3, len 13] > >> > |bff3b000| xhci_xfer_kick: ring 0x000eee00, slotid 1, epid 3 > >> > |bff3b000| xhci_process_events: ring 0x000eee00 [trb 0x000eee20, evt > >> > 0x000eef00, type 32, eidx 3, cc 1] > >> > |bff3b000| xhci_trb_queue: ring 0x000eec00 [nidx 3, len 31] > >> > |bff3b000| xhci_xfer_kick: ring 0x000eec00, slotid 1, epid 4 > >> > |bff3b000| xhci_process_events: ring 0x000eec00 [trb 0x000eec20, evt > >> > 0x000eed00, type 32, eidx 3, cc 1] > >> > |bff3b000| xhci_trb_queue: ring 0x000eee00 [nidx 4, len 8] > >> > |bff3b000| xhci_xfer_kick: ring 0x000eee00, slotid 1, epid 3 > >> > |bff3b000| xhci_process_events: ring 0x000eee00 [trb 0x000eee30, evt > >> > 0x000eef00, type 32, eidx 4, cc 1] > >> > |bff3b000| xhci_trb_queue: ring 0x000eee00 [nidx 5, len 13] > >> > |bff3b000| xhci_xfer_kick: ring 0x000eee00, slotid 1, epid 3 > >> > |bff3b000| xhci_process_events: ring 0x000eee00 [trb 0x000eee40, evt > >> > 0x000eef00, type 32, eidx 5, cc 1] > >> > |bff3b000| USB MSC blksize=512 sectors=976773167 > >> > \bff3b000/ End thread > >> > \bff45000/ End thread > >> > \bff52000/ End thread > >> > \bff43000/ End thread > >> > \bff47000/ End thread > >> > \bff4a000/ End thread > >> > \bff4f000/ End thread > >> > \bff41000/ End thread > >> > \bff46000/ End thread > >> > \bff44000/ End thread > >> > \bff48000/ End thread > >> > \bff4c000/ End thread > >> > \bff39000/ End thread > >> > \bff3c000/ End thread > >> > \bff3f000/ End thread > >> > \bff42000/ End thread > >> > \bff49000/ End thread > >> > \bff50000/ End thread > >> > \bff35000/ End thread > >> > \bff38000/ End thread > >> > \bff3e000/ End thread > >> > \bff33000/ End thread > >> > \bff36000/ End thread > >> > \bff3d000/ End thread > >> > \bff40000/ End thread > >> > \bff51000/ End thread > >> > \bff4d000/ End thread > >> > \bff34000/ End thread > >> > \bff37000/ End thread > >> > \bff4b000/ End thread > >> > All threads complete. > >> > Scan for option roms > >> > Searching bootorder for: /pci@i0cf8/*@1,1 > >> > > >> > Press F12 for boot menu. > >> > > >> > > >> > Messge after cold reset. xhci is not ok. > >> > ------------------------------------------------- > >> > SeaBIOS (version rel-1.8.0-0-g4c59f5d-dirty-20150825_074224-supersrv) > >> > Found coreboot cbmem console @ bffde000 > >> > Found mainboard AMD Parmer > >> > Relocating init from 0x000e7b40 to 0xbff55050 (size 40688) > >> > Found CBFS header at 0xfffffc60 > >> > CPU Mhz=2498 > >> > Found 23 PCI devices (max PCI bus is 02) > >> > Copying SMBIOS entry point from 0xbffa7000 to 0x000f1a10 > >> > Copying ACPI RSDP from 0xbffb8000 to 0x000f19e0 > >> > Copying MPTABLE from 0xbffdc000/bffdc010 to 0x000f17b0 > >> > Copying PIR from 0xbffdd000 to 0x000f1780 > >> > Using pmtimer, ioport 0x818 > >> > Scan for VGA option rom > >> > Running option rom at c000:0003 > >> > Turning on vga text mode console > >> > SeaBIOS (version rel-1.8.0-0-g4c59f5d-dirty-20150825_074224-supersrv) > >> > /bff52000\ Start thread > >> > |bff52000| XHCI init on dev 00:10.0: regs @ 0xf0248000, 4 ports, 32 > >> > slots, > >> > 32 byte contexts > >> > |bff52000| XHCI extcap 0x1 @ f0248500 > >> > |bff52000| XHCI protocol USB 3.00, 2 ports (offset 1), def 0 > >> > |bff52000| XHCI protocol USB 2.00, 2 ports (offset 3), def 0 > >> > /bff51000\ Start thread > >> > |bff51000| configure_xhci: resetting > >> > Found 1 serial ports > >> > AHCI controller at 11.0, iobase f024d000, irq 0 > >> > AHCI: cap 0xf3309f05, ports_impl 0x3f > >> > /bff50000\ Start thread > >> > |bff50000| AHCI/0: probing > >> > |bff52000| EHCI init on dev 00:12.2 (regs=0xf024d820) > >> > /bff4f000\ Start thread > >> > /bff4d000\ Start thread > >> > |bff4d000| AHCI/1: probing > >> > |bff50000| AHCI/0: link down > >> > |bff52000| EHCI init on dev 00:13.2 (regs=0xf024d920) > >> > /bff4c000\ Start thread > >> > /bff4b000\ Start thread > >> > |bff4b000| AHCI/2: probing > >> > |bff4d000| AHCI/1: link down > >> > \bff50000/ End thread > >> > |bff52000| OHCI init on dev 00:12.0 (regs=0xf024a000) > >> > /bff50000\ Start thread > >> > /bff4a000\ Start thread > >> > /bff49000\ Start thread > >> > /bff47000\ Start thread > >> > |bff47000| AHCI/3: probing > >> > |bff4b000| AHCI/2: link down > >> > \bff4d000/ End thread > >> > |bff52000| OHCI init on dev 00:13.0 (regs=0xf024b000) > >> > /bff4d000\ Start thread > >> > /bff46000\ Start thread > >> > /bff45000\ Start thread > >> > /bff44000\ Start thread > >> > /bff43000\ Start thread > >> > |bff43000| AHCI/4: probing > >> > |bff47000| AHCI/3: link down > >> > \bff4b000/ End thread > >> > |bff52000| OHCI init on dev 00:14.5 (regs=0xf024c000) > >> > /bff4b000\ Start thread > >> > /bff42000\ Start thread > >> > /bff41000\ Start thread > >> > /bff40000\ Start thread > >> > /bff3f000\ Start thread > >> > |bff3f000| AHCI/5: probing > >> > |bff43000| AHCI/4: link down > >> > \bff47000/ End thread > >> > \bff52000/ End thread > >> > /bff52000\ Start thread > >> > \bff52000/ End thread > >> > /bff52000\ Start thread > >> > /bff47000\ Start thread > >> > |bff47000| xhci_hub_reset port #4: 0x000202e1, powered, pls 7, speed 0 [ > >> > - ] > >> > |bff3f000| AHCI/5: link down > >> > \bff43000/ End thread > >> > /bff43000\ Start thread > >> > /bff3e000\ Start thread > >> > /bff3d000\ Start thread > >> > \bff3f000/ End thread > >> > /bff48000\ Start thread > >> > /bff3f000\ Start thread > >> > /bff3c000\ Start thread > >> > /bff3b000\ Start thread > >> > /bff3a000\ Start thread > >> > /bff39000\ Start thread > >> > /bff38000\ Start thread > >> > /bff37000\ Start thread > >> > /bff36000\ Start thread > >> > /bff35000\ Start thread > >> > /bff34000\ Start thread > >> > /bff33000\ Start thread > >> > |bff47000| XHCI port #4: 0x00200e03, powered, enabled, pls 0, speed 3 > >> > [High] > >> > |bff47000| xhci_alloc_pipe: usbdev 0xbff538a0, ring 0xbff9e400, slotid > >> > 0, > >> > epid 1 > >> > |bff47000| xhci_cmd_enable_slot: > >> > |bff47000| xhci_trb_queue: ring 0xbff9ed00 [nidx 1, len 0] > >> > |bff47000| xhci_process_events: status change port #4 > >> > |bff47000| xhci_process_events: status change port #2 > >> > |bff47000| xhci_process_events: status change port #4 > >> > |bff47000| xhci_process_events: ring 0xbff9ed00 [trb 0xbff9ed00, evt > >> > 0xbff9ee00, type 33, eidx 1, cc 1] > >> > |bff47000| xhci_alloc_pipe: enable slot: got slotid 1 > >> > |bff47000| xhci_cmd_address_device: slotid 1 > >> > |bff47000| xhci_trb_queue: ring 0xbff9ed00 [nidx 2, len 0] > >> > |bff38000| usb_hid_setup 0xbff4ec10 > >> > |bff38000| USB keyboard initialized > >> > \bff38000/ End thread > >> > \bff3d000/ End thread > >> > \bff52000/ End thread > >> > \bff41000/ End thread > >> > \bff45000/ End thread > >> > \bff4a000/ End thread > >> > \bff40000/ End thread > >> > \bff49000/ End thread > >> > \bff3c000/ End thread > >> > \bff3e000/ End thread > >> > \bff42000/ End thread > >> > \bff46000/ End thread > >> > \bff4f000/ End thread > >> > \bff4c000/ End thread > >> > \bff34000/ End thread > >> > \bff37000/ End thread > >> > \bff3a000/ End thread > >> > \bff3f000/ End thread > >> > \bff43000/ End thread > >> > \bff33000/ End thread > >> > \bff35000/ End thread > >> > \bff3b000/ End thread > >> > \bff48000/ End thread > >> > \bff36000/ End thread > >> > \bff39000/ End thread > >> > \bff50000/ End thread > >> > \bff4d000/ End thread > >> > \bff4b000/ End thread > >> > |bff47000| WARNING - Timeout at xhci_event_wait:692! > >> > |bff47000| xhci_alloc_pipe: address device: failed (cc -1) > >> > \bff47000/ End thread > >> > |bff44000| XHCI port #2: 0x00021203, powered, enabled, pls 0, speed 4 > >> > [Super] > >> > |bff44000| xhci_alloc_pipe: usbdev 0xbff53250, ring 0xbff9e900, slotid > >> > 0, > >> > epid 1 > >> > |bff44000| xhci_cmd_enable_slot: > >> > |bff44000| xhci_trb_queue: ring 0xbff9ed00 [nidx 3, len 0] > >> > |bff44000| WARNING - Timeout at xhci_event_wait:692! > >> > |bff44000| xhci_alloc_pipe: enable slot: failed > >> > \bff44000/ End thread > >> > |bff51000| XHCI no devices found > >> > |bff51000| WARNING - Timeout at wait_bit:310! > >> > \bff51000/ End thread > >> > All threads complete. > >> > Scan for option roms > >> > Searching bootorder for: /pci@i0cf8/*@1,1 > >> > --------------------------- > >> > > >> > ________________________________ > >> > From: fishbaoz(a)hotmail.com > >> > To: vidwer(a)gmail.com; seabios(a)seabios.org > >> > Date: Tue, 25 Aug 2015 08:33:00 +0000 > >> > Subject: Re: [SeaBIOS] : USB 3.0 port failed if a USB 3.0 device is > >> > attached > >> > when power up > >> > > >> > > >> > New finding. > >> > > >> > If I cold power up the board, the Hispeed USB harddrive works. > >> > If I press the reset buttong, it doesn't work. > >> > I need to unplug and plug the power cable to make it work again. > >> > > >> > Do you have any idea about that? > >> > > >> > Zheng > >> > > >> > > >> > ________________________________ > >> > From: fishbaoz(a)hotmail.com > >> > To: vidwer(a)gmail.com; seabios(a)seabios.org > >> > Date: Tue, 25 Aug 2015 06:11:53 +0000 > >> > Subject: Re: [SeaBIOS] : USB 3.0 port failed if a USB 3.0 device is > >> > attached > >> > when power up > >> > > >> > I tried with Parmer, which I assume is close to ASUS F2A85-M, and got > >> > the > >> > same result. > >> > :( > >> > > >> > ----------------------------------- > >> > hudson_enable() > >> > PCI: 00:10.0 [1022/7812] enabled > >> > hudson_enable() > >> > ---------------------------------------------- > >> > > >> > SeaBIOS (version rel-1.8.0-0-g4c59f5d-dirty-20150825_015821-supersrv) > >> > Found coreboot cbmem console @ bffde000 > >> > Found mainboard AMD Parmer > >> > Relocating init from 0x000e7b40 to 0xbff55050 (size 40688) > >> > Found CBFS header at 0xfffffc60 > >> > CPU Mhz=2498 > >> > Found 23 PCI devices (max PCI bus is 02) > >> > Copying SMBIOS entry point from 0xbffa7000 to 0x000f1a10 > >> > Copying ACPI RSDP from 0xbffb8000 to 0x000f19e0 > >> > Copying MPTABLE from 0xbffdc000/bffdc010 to 0x000f17b0 > >> > Copying PIR from 0xbffdd000 to 0x000f1780 > >> > Using pmtimer, ioport 0x818 > >> > Scan for VGA option rom > >> > Running option rom at c000:0003 > >> > Turning on vga text mode console > >> > SeaBIOS (version rel-1.8.0-0-g4c59f5d-dirty-20150825_015821-supersrv) > >> > /bff52000\ Start thread > >> > |bff52000| XHCI init on dev 00:10.0: regs @ 0xf0248000, 4 ports, 32 > >> > slots, > >> > 32 byte contexts > >> > |bff52000| XHCI extcap 0x1 @ f0248500 > >> > |bff52000| XHCI protocol USB 3.00, 2 ports (offset 1), def 0 > >> > |bff52000| XHCI protocol USB 2.00, 2 ports (offset 3), def 0 > >> > /bff51000\ Start thread > >> > |bff51000| configure_xhci: resetting > >> > Found 1 serial ports > >> > AHCI controller at 11.0, iobase f024d000, irq 0 > >> > AHCI: cap 0xf3309f05, ports_impl 0x3f > >> > /bff50000\ Start thread > >> > |bff50000| AHCI/0: probing > >> > |bff50000| AHCI/0: link up > >> > |bff52000| EHCI init on dev 00:12.2 (regs=0xf024d820) > >> > /bff4f000\ Start thread > >> > /bff4d000\ Start thread > >> > |bff4d000| AHCI/1: probing > >> > |bff50000| AHCI/0: ... finished, status 0x51, ERROR 0x4 > >> > |bff52000| EHCI init on dev 00:13.2 (regs=0xf024d920) > >> > /bff4c000\ Start thread > >> > /bff4b000\ Start thread > >> > |bff4b000| AHCI/2: probing > >> > |bff4d000| AHCI/1: link down > >> > |bff52000| OHCI init on dev 00:12.0 (regs=0xf024a000) > >> > /bff4a000\ Start thread > >> > /bff49000\ Start thread > >> > /bff48000\ Start thread > >> > /bff46000\ Start thread > >> > |bff46000| AHCI/3: probing > >> > |bff4b000| AHCI/2: link down > >> > \bff4d000/ End thread > >> > |bff50000| Searching bootorder for: /pci@i0cf8/*@11/drive@0/disk@0 > >> > |bff52000| OHCI init on dev 00:13.0 (regs=0xf024b000) > >> > /bff4d000\ Start thread > >> > /bff45000\ Start thread > >> > /bff44000\ Start thread > >> > /bff43000\ Start thread > >> > /bff42000\ Start thread > >> > |bff42000| AHCI/4: probing > >> > |bff46000| AHCI/3: link down > >> > \bff4b000/ End thread > >> > |bff50000| AHCI/0: registering: "AHCI/0: ST3250620NS ATA-7 Hard-Disk > >> > (232 > >> > GiBytes)" > >> > \bff50000/ End thread > >> > |bff52000| OHCI init on dev 00:14.5 (regs=0xf024c000) > >> > /bff50000\ Start thread > >> > /bff4b000\ Start thread > >> > /bff41000\ Start thread > >> > /bff40000\ Start thread > >> > /bff3f000\ Start thread > >> > |bff3f000| AHCI/5: probing > >> > |bff42000| AHCI/4: link down > >> > \bff46000/ End thread > >> > \bff52000/ End thread > >> > /bff46000\ Start thread > >> > /bff3e000\ Start thread > >> > \bff3e000/ End thread > >> > /bff3e000\ Start thread > >> > /bff3d000\ Start thread > >> > |bff3d000| xhci_hub_reset port #4: 0x000202e1, powered, pls 7, speed 0 [ > >> > - ] > >> > |bff3f000| AHCI/5: link down > >> > \bff42000/ End thread > >> > /bff47000\ Start thread > >> > /bff42000\ Start thread > >> > /bff3c000\ Start thread > >> > /bff3b000\ Start thread > >> > \bff3f000/ End thread > >> > /bff3f000\ Start thread > >> > /bff3a000\ Start thread > >> > /bff39000\ Start thread > >> > /bff38000\ Start thread > >> > /bff37000\ Start thread > >> > /bff36000\ Start thread > >> > /bff35000\ Start thread > >> > /bff34000\ Start thread > >> > /bff33000\ Start thread > >> > /bff32000\ Start thread > >> > |bff3d000| XHCI port #4: 0x00200e03, powered, enabled, pls 0, speed 3 > >> > [High] > >> > |bff3d000| xhci_alloc_pipe: usbdev 0xbff52f20, ring 0xbff9be00, slotid > >> > 0, > >> > epid 1 > >> > |bff3d000| xhci_cmd_enable_slot: > >> > |bff3d000| xhci_trb_queue: ring 0xbff9ed00 [nidx 1, len 0] > >> > |bff3d000| xhci_process_events: status change port #4 > >> > |bff3d000| xhci_process_events: status change port #2 > >> > |bff3d000| xhci_process_events: status change port #4 > >> > |bff3d000| xhci_process_events: ring 0xbff9ed00 [trb 0xbff9ed00, evt > >> > 0xbff9ee00, type 33, eidx 1, cc 1] > >> > |bff3d000| xhci_alloc_pipe: enable slot: got slotid 1 > >> > |bff3d000| xhci_cmd_address_device: slotid 1 > >> > |bff3d000| xhci_trb_queue: ring 0xbff9ed00 [nidx 2, len 0] > >> > |bff37000| usb_hid_setup 0xbff52a40 > >> > |bff37000| USB keyboard initialized > >> > \bff37000/ End thread > >> > \bff3b000/ End thread > >> > \bff3e000/ End thread > >> > \bff41000/ End thread > >> > \bff44000/ End thread > >> > \bff49000/ End thread > >> > \bff40000/ End thread > >> > \bff48000/ End thread > >> > \bff4f000/ End thread > >> > \bff39000/ End thread > >> > \bff3c000/ End thread > >> > \bff4b000/ End thread > >> > \bff45000/ End thread > >> > \bff4c000/ End thread > >> > \bff33000/ End thread > >> > \bff36000/ End thread > >> > \bff3a000/ End thread > >> > \bff42000/ End thread > >> > \bff46000/ End thread > >> > \bff4a000/ End thread > >> > \bff32000/ End thread > >> > \bff34000/ End thread > >> > \bff3f000/ End thread > >> > \bff47000/ End thread > >> > \bff4d000/ End thread > >> > \bff35000/ End thread > >> > \bff38000/ End thread > >> > \bff50000/ End thread > >> > |bff3d000| WARNING - Timeout at xhci_event_wait:692! > >> > |bff3d000| xhci_alloc_pipe: address device: failed (cc -1) > >> > \bff3d000/ End thread > >> > |bff43000| XHCI port #2: 0x00021203, powered, enabled, pls 0, speed 4 > >> > [Super] > >> > |bff43000| xhci_alloc_pipe: usbdev 0xbff4efe0, ring 0xbff9e900, slotid > >> > 0, > >> > epid 1 > >> > |bff43000| xhci_cmd_enable_slot: > >> > |bff43000| xhci_trb_queue: ring 0xbff9ed00 [nidx 3, len 0] > >> > |bff43000| WARNING - Timeout at xhci_event_wait:692! > >> > |bff43000| xhci_alloc_pipe: enable slot: failed > >> > \bff43000/ End thread > >> > |bff51000| XHCI no devices found > >> > |bff51000| WARNING - Timeout at wait_bit:310! > >> > \bff51000/ End thread > >> > All threads complete. > >> > Scan for option roms > >> > Searching bootorder for: /pci@i0cf8/*@1,1 > >> > > >> > Press F12 for boot menu. > >> > > >> > Select boot device: > >> > > >> > 1. AHCI/0: ST3250620NS ATA-7 Hard-Disk (232 GiBytes) > >> > 2. Legacy option rom > >> > > >> > Zheng > >> > > >> > > >> >> Date: Mon, 24 Aug 2015 15:12:13 +0200 > >> >> From: vidwer(a)gmail.com > >> >> To: seabios(a)seabios.org > >> >> Subject: Re: [SeaBIOS] : USB 3.0 port failed if a USB 3.0 device is > >> >> attached when power up > >> >> > >> >> 2015-08-24 14:19 GMT+02:00 Zheng Bao <fishbaoz(a)hotmail.com>: > >> >> > Hi, > >> >> > Please review the debug message below. > >> >> > > >> >> > Seabios message if USB3 harddrive is plugged in USB3 port. > >> >> > -------------------------------------------- > >> >> > SeaBIOS (version rel-1.7.5-0-ge51488c-dirty-20150824_081102-supersrv) > >> >> > >> >> FWIW, I'm using the version from github master, 1.8.0 > >> >> > >> >> > Found coreboot cbmem console @ affde000 > >> >> > Found mainboard AMD FP4 > >> >> > Relocating init from 0x000e6d99 to 0xaff54770 (size 42948) > >> >> > Found CBFS header at 0xfffffc60 > >> >> > CPU Mhz=2101 > >> >> > Found 26 PCI devices (max PCI bus is 01) > >> >> > Copying SMBIOS entry point from 0xaffa7000 to 0x000f1540 > >> >> > Copying ACPI RSDP from 0xaffb8000 to 0x000f1510 > >> >> > Copying MPTABLE from 0xaffdc000/affdc010 to 0x000f1340 > >> >> > Copying PIR from 0xaffdd000 to 0x000f1310 > >> >> > Using pmtimer, ioport 0x818 > >> >> > Scan for VGA option rom > >> >> > Running option rom at c000:0003 > >> >> > Turning on vga text mode console > >> >> > SeaBIOS (version rel-1.7.5-0-ge51488c-dirty-20150824_081102-supersrv) > >> >> > /aff51000\ Start thread > >> >> > |aff51000| XHCI init on dev 00:10.0: regs @ 0xf0b8a000, 8 ports, 32 > >> >> > slots, > >> >> > 32 byte contexts > >> >> > |aff51000| XHCI extcap 0x1 @ f0b8a500 > >> >> > |aff51000| XHCI protocol USB 3.00, 4 ports (offset 1), def 0 > >> >> > |aff51000| XHCI protocol USB 2.00, 4 ports (offset 5), def 18 > >> >> > |aff51000| XHCI extcap 0xa @ f0b8a540 > >> >> > /aff50000\ Start thread > >> >> > >> >> > /aff4f000\ Start thread > >> >> > |aff4f000| WARNING - Timeout at i8042_flush:71! > >> >> > \aff4f000/ End thread > >> >> > >> >> Where does that belong to? > >> >> > >> >> > |aff51000| EHCI init on dev 00:12.0 (regs=0xf0b8d520) > >> >> > /aff4f000\ Start thread > >> >> > /aff4d000\ Start thread > >> >> > Found 0 lpt ports > >> >> > Found 1 serial ports > >> >> > AHCI controller at 11.0, iobase f0b8d000, irq 0 > >> >> > AHCI: cap 0xf733ff01, ports_impl 0x3 > >> >> > /aff4c000\ Start thread > >> >> > |aff4c000| AHCI/0: probing > >> >> > |aff51000| EHCI init on dev 01:00.4 (regs=0xf0818020) > >> >> > /aff4b000\ Start thread > >> >> > /aff4a000\ Start thread > >> >> > /aff49000\ Start thread > >> >> > /aff47000\ Start thread > >> >> > |aff47000| AHCI/1: probing > >> >> > |aff47000| AHCI/1: link up > >> >> > |aff4c000| AHCI/0: link down > >> >> > |aff47000| AHCI/1: ... finished, status 0x51, ERROR 0x4 > >> >> > \aff4c000/ End thread > >> >> > |aff47000| Searching bootorder for: /pci@i0cf8/*@11/drive@1/disk@0 > >> >> > \aff4a000/ End thread > >> >> > \aff49000/ End thread > >> >> > |aff47000| AHCI/1: registering: "AHCI/1: PLEXTOR PX-128M6G-2280 ATA-8 > >> >> > Hard-Disk (119 GiBytes)" > >> >> > \aff47000/ End thread > >> >> > \aff51000/ End thread > >> >> > /aff4c000\ Start thread > >> >> > /aff4a000\ Start thread > >> >> > /aff49000\ Start thread > >> >> > /aff48000\ Start thread > >> >> > /aff47000\ Start thread > >> >> > \aff47000/ End thread > >> >> > /aff47000\ Start thread > >> >> > \aff47000/ End thread > >> >> > /aff47000\ Start thread > >> >> > \aff47000/ End thread > >> >> > /aff47000\ Start thread > >> >> > \aff47000/ End thread > >> >> > /aff47000\ Start thread > >> >> > /aff46000\ Start thread > >> >> > \aff46000/ End thread > >> >> > /aff46000\ Start thread > >> >> > \aff46000/ End thread > >> >> > /aff46000\ Start thread > >> >> > \aff46000/ End thread > >> >> > |aff4a000| usb_hid_setup 0xaff51c50 > >> >> > |aff4b000| WARNING - Timeout at ehci_waittick:186! > >> >> > >> >> I haven't seen this before. > >> >> > >> >> > |aff4a000| USB keyboard initialized > >> >> > \aff4a000/ End thread > >> >> > \aff4b000/ End thread > >> >> > |aff47000| WARNING - Timeout at wait_bit:484! > >> >> > \aff47000/ End thread > >> >> > |aff50000| XHCI no devices found > >> >> > \aff50000/ End thread > >> >> > \aff4c000/ End thread > >> >> > \aff48000/ End thread > >> >> > \aff49000/ End thread > >> >> > |aff4d000| Initialized USB HUB (1 ports used) > >> >> > \aff4d000/ End thread > >> >> > \aff4f000/ End thread > >> >> > All threads complete. > >> >> > Scan for option roms > >> >> > > >> >> > Press F12 for boot menu. > >> >> > > >> >> > Select boot device: > >> >> > > >> >> > 1. AHCI/1: PLEXTOR PX-128M6G-2280 ATA-8 Hard-Disk (119 GiBytes > >> >> > > >> >> > > >> >> > > >> >> > Seabios message if USB3 hard drive is plugged in USB2 port. > >> >> > ------------------------------ > >> >> > SeaBIOS (version rel-1.7.5-0-ge51488c-dirty-20150824_081102-supersrv) > >> >> > Found coreboot cbmem console @ affde000 > >> >> > Found mainboard AMD FP4 > >> >> > Relocating init from 0x000e6d99 to 0xaff54770 (size 42948) > >> >> > Found CBFS header at 0xfffffc60 > >> >> > CPU Mhz=2100 > >> >> > Found 26 PCI devices (max PCI bus is 01) > >> >> > Copying SMBIOS entry point from 0xaffa7000 to 0x000f1540 > >> >> > Copying ACPI RSDP from 0xaffb8000 to 0x000f1510 > >> >> > Copying MPTABLE from 0xaffdc000/affdc010 to 0x000f1340 > >> >> > Copying PIR from 0xaffdd000 to 0x000f1310 > >> >> > Using pmtimer, ioport 0x818 > >> >> > Scan for VGA option rom > >> >> > Running option rom at c000:0003 > >> >> > Turning on vga text mode console > >> >> > SeaBIOS (version rel-1.7.5-0-ge51488c-dirty-20150824_081102-supersrv) > >> >> > /aff51000\ Start thread > >> >> > |aff51000| XHCI init on dev 00:10.0: regs @ 0xf0b8a000, 8 ports, 32 > >> >> > slots, > >> >> > 32 byte contexts > >> >> > |aff51000| XHCI extcap 0x1 @ f0b8a500 > >> >> > |aff51000| XHCI protocol USB 3.00, 4 ports (offset 1), def 0 > >> >> > |aff51000| XHCI protocol USB 2.00, 4 ports (offset 5), def 18 > >> >> > |aff51000| XHCI extcap 0xa @ f0b8a540 > >> >> > /aff50000\ Start thread > >> >> > /aff4f000\ Start thread > >> >> > |aff4f000| WARNING - Timeout at i8042_flush:71! > >> >> > \aff4f000/ End thread > >> >> > |aff51000| EHCI init on dev 00:12.0 (regs=0xf0b8d520) > >> >> > /aff4f000\ Start thread > >> >> > /aff4d000\ Start thread > >> >> > Found 0 lpt ports > >> >> > Found 1 serial ports > >> >> > AHCI controller at 11.0, iobase f0b8d000, irq 0 > >> >> > AHCI: cap 0xf733ff01, ports_impl 0x3 > >> >> > /aff4c000\ Start thread > >> >> > |aff4c000| AHCI/0: probing > >> >> > |aff51000| EHCI init on dev 01:00.4 (regs=0xf0818020) > >> >> > /aff4b000\ Start thread > >> >> > /aff4a000\ Start thread > >> >> > /aff49000\ Start thread > >> >> > /aff47000\ Start thread > >> >> > |aff47000| AHCI/1: probing > >> >> > |aff47000| AHCI/1: link up > >> >> > |aff4c000| AHCI/0: link down > >> >> > |aff47000| AHCI/1: ... finished, status 0x51, ERROR 0x4 > >> >> > \aff4c000/ End thread > >> >> > |aff47000| Searching bootorder for: /pci@i0cf8/*@11/drive@1/disk@0 > >> >> > \aff4a000/ End thread > >> >> > \aff49000/ End thread > >> >> > |aff47000| AHCI/1: registering: "AHCI/1: PLEXTOR PX-128M6G-2280 ATA-8 > >> >> > Hard-Disk (119 GiBytes)" > >> >> > \aff47000/ End thread > >> >> > \aff51000/ End thread > >> >> > /aff4c000\ Start thread > >> >> > /aff4a000\ Start thread > >> >> > /aff49000\ Start thread > >> >> > /aff48000\ Start thread > >> >> > /aff47000\ Start thread > >> >> > \aff47000/ End thread > >> >> > /aff47000\ Start thread > >> >> > \aff47000/ End thread > >> >> > /aff47000\ Start thread > >> >> > \aff47000/ End thread > >> >> > /aff47000\ Start thread > >> >> > \aff47000/ End thread > >> >> > /aff47000\ Start thread > >> >> > \aff47000/ End thread > >> >> > /aff47000\ Start thread > >> >> > \aff47000/ End thread > >> >> > /aff47000\ Start thread > >> >> > \aff47000/ End thread > >> >> > /aff47000\ Start thread > >> >> > \aff47000/ End thread > >> >> > |aff50000| XHCI no devices found > >> >> > \aff50000/ End thread > >> >> > |aff4b000| WARNING - Timeout at ehci_waittick:186! > >> >> > \aff4b000/ End thread > >> >> > |aff4c000| Searching bootorder for: > >> >> > /pci@i0cf8/usb@12/hub@1/storage@1/*@0/*@0,0 > >> >> > |aff4c000| Searching bootorder for: /pci@i0cf8/usb@12/hub@1/usb-*@1 > >> >> > |aff4c000| USB MSC vendor='Seagate' product='FA GoFlex Pro' > >> >> > rev='0210' > >> >> > type=0 removable=0 > >> >> > |aff4c000| USB MSC blksize=512 sectors=976773167 > >> >> > \aff4c000/ End thread > >> >> > |aff4a000| usb_hid_setup 0xaff521d0 > >> >> > |aff4a000| USB keyboard initialized > >> >> > \aff4a000/ End thread > >> >> > \aff48000/ End thread > >> >> > \aff49000/ End thread > >> >> > |aff4d000| Initialized USB HUB (2 ports used) > >> >> > \aff4d000/ End thread > >> >> > \aff4f000/ End thread > >> >> > All threads complete. > >> >> > Scan for option roms > >> >> > > >> >> > Press F12 for boot menu. > >> >> > > >> >> > Select boot device: > >> >> > > >> >> > 1. AHCI/1: PLEXTOR PX-128M6G-2280 ATA-8 Hard-Disk (119 GiBytes > >> >> > 2. USB MSC Drive Seagate FA GoFlex Pro 0210 > >> >> > > >> >> > > >> >> >> Date: Thu, 20 Aug 2015 13:14:54 +0200 > >> >> >> From: vidwer(a)gmail.com > >> >> >> To: seabios(a)seabios.org > >> >> > > >> >> >> Subject: Re: [SeaBIOS] : USB 3.0 port failed if a USB 3.0 device is > >> >> >> attached when power up > >> >> >> > >> >> >> 2015-08-07 23:21 GMT+02:00 Kevin O'Connor <kevin(a)koconnor.net>: > >> >> >> > On Thu, Aug 06, 2015 at 11:51:04AM +0000, Zheng Bao wrote: > >> >> >> >> Board: Bettong > >> >> >> >> USB3 controller: Hudson on Carrizo > >> >> >> >> USB3 device: Seagate USB hard drive. That is the only USB 3.0 > >> >> >> >> device > >> >> >> >> I > >> >> >> >> can get. > >> >> >> > > >> >> >> > Thanks. The problem looks very similar to one reported in the past > >> >> >> > by > >> >> >> > Idwer. Unfortunately, Idwer also didn't have access to any other > >> >> >> > USB3 > >> >> >> > devices - that would have been a great test to see if the quirky > >> >> >> > behavior was due to the controller or due to the device. > >> >> >> > >> >> >> The board I have is an Hudson-D4? board, ASUS F2A85-M with the lspci > >> >> >> ID: > >> >> >> 00:10.0 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] > >> >> >> FCH > >> >> >> USB XHCI Controller [1022:7812] (rev 03) > >> >> >> 00:10.1 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] > >> >> >> FCH > >> >> >> USB XHCI Controller [1022:7812] (rev 03) > >> >> >> > >> >> >> Zheng, can you recompile SeaBIOS with CONFIG_THREADS=y and > >> >> >> CONFIG_DEBUG_LEVEL=2 and try booting off the superspeed device > >> >> >> you're > >> >> >> using? > >> >> >> The experience I had was that, with those settings, this superspeed > >> >> >> SATA dock showed up in the device menu (press ESCape). > >> >> >> > >> >> >> If that won't make the device show up - be sure to post that > >> >> >> cbmem/console output - change USB_TIME_SIGATT in src/hw/usb.h to at > >> >> >> least 1000. > >> >> >> > >> >> >> HTH, > >> >> >> > >> >> >> Idwer > >> >> >> > >> >> >> > > >> >> >> > Can you provide the output from "lspci", "lsusb", and "lsusb -t". > >> >> >> > > >> >> >> > -Kevin > >> >> >> > > >> >> >> >> > >> >> >> >> Joe > >> >> >> >> > >> >> >> >> > Date: Wed, 5 Aug 2015 06:25:13 -0400 > >> >> >> >> > From: kevin(a)koconnor.net > >> >> >> >> > To: fishbaoz(a)hotmail.com > >> >> >> >> > CC: seabios(a)seabios.org > >> >> >> >> > Subject: Re: [SeaBIOS]: USB 3.0 port failed if a USB 3.0 device > >> >> >> >> > is > >> >> >> >> > attached when power up > >> >> >> >> > > >> >> >> >> > On Wed, Aug 05, 2015 at 07:40:50AM +0000, Zheng Bao wrote: > >> >> >> >> > > hi, Kevin, > >> >> >> >> > > I am debugging the coreboot on AMD board. > >> >> >> >> > > > >> >> >> >> > > I found if a device is populated on USB 3.0 port during > >> >> >> >> > > system > >> >> >> >> > > power up, the USB3.0 function fail after OS boot up. > >> >> >> >> > > If a USB 2.0 device is plugged, the port is OK. > >> >> >> >> > > Can you take a look at this? > >> >> >> >> > > >> >> >> >> > What board is this, what USB3 controller is it, and what USB3 > >> >> >> >> > device > >> >> >> >> > did the problem occur with? Does the problem occur with > >> >> >> >> > multiple/all > >> >> >> >> > USB3 devices or just one? > >> >> >> >> > > >> >> >> >> > -Kevin > >> >> >> >> > >> >> >> > >> >> >> _______________________________________________ > >> >> >> SeaBIOS mailing list > >> >> >> SeaBIOS(a)seabios.org > >> >> >> http://www.seabios.org/mailman/listinfo/seabios > >> >> > >> >> _______________________________________________ > >> >> SeaBIOS mailing list > >> >> SeaBIOS(a)seabios.org > >> >> http://www.seabios.org/mailman/listinfo/seabios > >> > > >> > _______________________________________________ SeaBIOS mailing list > >> > SeaBIOS(a)seabios.org http://www.seabios.org/mailman/listinfo/seabios > >> > > >> > _______________________________________________ SeaBIOS mailing list > >> > SeaBIOS(a)seabios.org http://www.seabios.org/mailman/listinfo/seabios > >> > > >> > _______________________________________________ SeaBIOS mailing list > >> > SeaBIOS(a)seabios.org http://www.seabios.org/mailman/listinfo/seabios > >> > > >> > _______________________________________________ SeaBIOS mailing list > >> > SeaBIOS(a)seabios.org http://www.seabios.org/mailman/listinfo/seabios > >> > >> _______________________________________________ > >> SeaBIOS mailing list > >> SeaBIOS(a)seabios.org > >> http://www.seabios.org/mailman/listinfo/seabios > > _______________________________________________ > SeaBIOS mailing list > SeaBIOS(a)seabios.org > http://www.seabios.org/mailman/listinfo/seabios

1 0

[PATCH] megasas: Fix outw, outl argument order
by Stefan Weil 03 Sep '15

03 Sep '15

The value is the first argument and the port is the second, but the code was using the opposite order. Cc: Hannes Reinecke <hare(a)suse.de> Signed-off-by: Stefan Weil <sw(a)weilnetz.de> --- The outw statement looks strange, because there is also an outl statement with the same arguments. Maybe both statements should either use outw or outl. Regards Stefan src/hw/megasas.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/hw/megasas.c b/src/hw/megasas.c index 5a07ab3..c009951 100644 --- a/src/hw/megasas.c +++ b/src/hw/megasas.c @@ -301,9 +301,9 @@ static int megasas_transition_to_ready(struct pci_device *pci, u32 ioaddr) pci->device == PCI_DEVICE_ID_LSI_SAS2008 || pci->device == PCI_DEVICE_ID_LSI_SAS2208 || pci->device == PCI_DEVICE_ID_LSI_SAS3108) { - outl(ioaddr + MFI_DB, mfi_flags); + outl(mfi_flags, ioaddr + MFI_DB); } else { - outl(ioaddr + MFI_IDB, mfi_flags); + outl(mfi_flags, ioaddr + MFI_IDB); } break; case MFI_STATE_OPERATIONAL: @@ -312,7 +312,7 @@ static int megasas_transition_to_ready(struct pci_device *pci, u32 ioaddr) pci->device == PCI_DEVICE_ID_LSI_SAS2008 || pci->device == PCI_DEVICE_ID_LSI_SAS2208 || pci->device == PCI_DEVICE_ID_LSI_SAS3108) { - outl(ioaddr + MFI_DB, mfi_flags); + outl(mfi_flags, ioaddr + MFI_DB); if (pci->device == PCI_DEVICE_ID_LSI_SAS2208 || pci->device == PCI_DEVICE_ID_LSI_SAS3108) { int j = 0; @@ -327,7 +327,7 @@ static int megasas_transition_to_ready(struct pci_device *pci, u32 ioaddr) } } } else { - outw(ioaddr + MFI_IDB, mfi_flags); + outw(mfi_flags, ioaddr + MFI_IDB); } break; case MFI_STATE_READY: -- 2.1.4

3 2

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

SeaBIOS