Re: [SeaBIOS] VT-d not enabled on Chromebook Pixel 2013 Link & Chromebook Pixel 2015 Samus

[Kevin O'Connor]

On Fri, Oct 09, 2015 at 04:36:02PM +0100, edward wandasiewicz wrote:
> Basically, we are missing a DMAR table in the BIOS

[...]
> $ acpidump -s
>
> ACPI: RSDP 0x00000000000F48E0 000024 (v02 CORE  )
> ACPI: RSDT 0x000000007CF44030 000038 (v01 CORE   COREBOOT 00000000
> CORE 00000000)
> ACPI: XSDT 0x000000007CF440E0 00004C (v01 CORE   COREBOOT 00000000
> CORE 00000000)
> ACPI: DSDT 0x000000007CF44250 004720 (v02 COREv4 COREBOOT 20110725
> INTL 20130117)
> ACPI: FACS 0x000000007CF44210 000040
> ACPI: FACP 0x000000007CF48970 0000F4 (v05 CORE   COREBOOT 00000000
> CORE 00000001)
> ACPI: HPET 0x000000007CF48A70 000038 (v01 CORE   COREBOOT 00000000
> CORE 00000000)
> ACPI: APIC 0x000000007CF48AB0 00006C (v01 CORE   COREBOOT 00000000
> CORE 00000000)
> ACPI: MCFG 0x000000007CF48B20 00003C (v01 CORE   COREBOOT 00000000
> CORE 00000000)
> ACPI: SSDT 0x000000007CF49BC0 000FF8 (v02 CORE   COREBOOT 0000002A
> CORE 0000002A)
>
> I get the same output, both before running qemu for the first time,
> after a fresh reboot, and whilst running qemu - on the off chance, if
> VT-x is enabled whilst running qemu, then maybe the DMAR tables for
> VT-d might be available at the same time, but alas, no, it wasn't to
> be.
>
> For VT-d to work, we would need a DMAR table in the BIOS.
>
> Is this at all possible?

SeaBIOS just passes along the ACPI tables generated by coreboot.  If
you want to change those tables it needs to be done in the coreboot
code - see: http://coreboot.org/

-Kevin